CS-425 Mid-term exam

Transcript

1 CS-425 Mid-term exam Tuesday November 8th, 2005, 5-8 p.m. Aids: Non-programmable pocket calculator Only ONE problem solution PER PAGE! Put your NAME on each sheet. NUMBER each sheet. Mobile phones are not allowed at any time during the exam! The mid-term consists of a number of problems that together yields 40 points. 32 points are required for full score. Motivate all answers and solutions thoroughly. Your solution must be tidy and easy to follow. State all your eventual assumptions clearly. Failure to follow these guidelines will result in a substantial reduction of total score. Answer in either Greek or English. GOOD LUCK! Problem 1 a) What is Amdahl s law? Define all variables etc.! (1 p) b) The compiler is a key component in a computer system. In what ways, according to Hennessy&Patterson, can the designer of an instruction set architecture make it easier for the compiler? (4 p) c) Why can it be meaningful to measure the mix of instructions that are executed in a program? Is it normally enough to use one program or should one use more programs? How should you select programs if you use many? (2 p) d) State the fundamental equation for execution time that has been used in the course. Define all variables etc. and briefly explain what aspects of a computer system that influence them. (3 p) 1

2 Problem 2 Assume you have a MIPS-processor that executes integer instructions using a static, non superscalar, five stage pipeline, i.e., no dynamic issue or out-of-order execution, with the normal stages, IF, ID, EXE, MEM, WB, forwarding and delayed branches with one branch delay slot. We extend the pipeline above to support floating point instructions. The resulting pipeline is outlined in the figure below: In such a pipeline two new types of hazards can occur: WAW and WAR. Explain WAW and WAR hazards. For each hazard (WAW and WAR), present one instruction sequence that causes the hazard to occur. Briefly discuss how the two hazards can be easiest solved. (4 p) Problem 3 This problem consists of a number of multiple choice questions. Only one alternative is correct. Every correct answer yields one point (+1 p), every false answer yields one point being removed (-1 p). Minimum points for the entire problem is 0p. You do not have to motivate your answers in this problem. Answer only with the alternative you choose. a) A common way to manage structural hazards in a pipeline is to (1) stall parts of the pipeline until the hazard is resolved. (X) make results of instructions available earlier in the pipeline. (2) predict the result of the execution. b) Big Endian is the order in which (1) instructions are executed in a pipeline. (X) parts of words longer than the words in memory must be stored. (2) parts of words longer than the word length of the ALU is processed during arithmetic operations. c) A processor that use a superpipeline (1) can start several different instructions every clock cycle (X) has an extra long pipeline. (2) has a particularly powerful ALU. d) The MIPS64 architecture can address (1) 2^64 words. (X) 2^61 words. (2) 2^64 bytes. 2

3 Problem 4 α) ώστε έναν απλό ορισµό του precise interrupt/exception. (1 p) β) Εξηγήσετε γιατί τα delayed branches δυσκολεύουν την ύπαρξη ενός precise exception point. (2 p) γ) Εξηγήσετε την σχέση µεταξύ precise exceptions και υποστήριξη branch prediction. Ποια δοµή hardware υποστηρίζει και τους δύο µηχανισµούς. (2 p) δ) Τι είναι checkpoint και πως χρησιµοποιείται σε µία µηχανή µε branch prediction. (1 p) Problem 5 Θεωρήστε ότι έχουµε µία superpipelined αρχιτεκτονική και ότι οι καθυστερήσεις µεταξύ των εντολών είναι Εντολή που Εντολή που Stalls δηµιουργεί τιµή την χρησιµοποιεί mult.d add.d 5 l.d mult.d 2 l.d add.d 2 add.d s.d 3 int op s.d/l.d 0 project: l.d F2,0(r1) mult.d F10,F2,F0 l.d F4,4(r1) add.d F12,F10,F4 st.d 0(r2),F12 addiu r1,r1,#8 addiu r2,r2,#4 addiu r3,r3,#-1 bnez r3, project nop a) Πόσους κύκλους έχουµε ανά επανάλυψη; είξτε τα stalls στον παραπάνω κώδικα. (3 p) b) Κάντε schedule τον κώδικα για να τρέχει σε όσους λιγότερους κύκλους ανά επανάλυψη γίνεται. Μήν κάνετε unroll ή software pipeline it. Πόσους κύκλους ανά επανάλυψη έχουµε τώρα; είξτε τον τελικό κώδικα. (5 p) 3

4 Problem 6 Έστω ότι υλοποιούµε σε µια Tomasulo µηχανή µία Floating Point Unit (FPU) µε reorder buffer που έχει τους παρακάτω περιορισµούς : Μία µόνο έντολή µπορεί να γίνεται issue ανά κύκλο. Ο Reorder buffer έχει 8 θέσεις. Υπάρχουν δύο floating-point multiplier units. Υπάρχει ένας floating-point divider. Υπάρχουν δύο floating-point adder units. Υπάρχει ένας load buffer. Οι FP πολλαπλασιασµοί και διαιρέσεις παίρνουν 6 κύκλους για να εκτελεστούν. Οι FP προσθέσεις παίρνουν 2 κύκλους για να εκτελεστούν. Τα load/stores παίρνουν 1 κύκλο εκτέλεσης. Θεωρήστε ότι έχουµε τον παρακάτω κώδικα: Start: l.d F0,0(R12) add.d F0,F0,F4 mult.d F2,F4,F6 div.d F6,F2,F8 l.d F6,10(R1) add.d F12,F6,F14 sub.d F2,F8,F16 add.d F8,F10,F6 Παρακάτω φαίνεται η κατάσταση της µηχανής µετά τον κύκλο 2. είξτε την κατάσταση της µηχανής όταν το div.d τελειώνει την εκτέλεση (µπάινει στο WR στάδιο). (8 p) Reorder Buffer Dest. Value Instruction Issue Exec WR Commit Done? F0 l.d F0,0(R12) 1 2 N ROB1 F0 add.d F0,F0,F4 2 N ROB2 ROB3 ROB4 ROB5 ROB6 ROB7 ROB8 4

5 Reservation Stations Mult1 Mult2 Divide Add1 ROB2 add ROB1, R(F4) Add2 load ROB1 0+R1 Register Result Status F0 F2 F4 F6 F8 F10 F12 F14 F16 ROB2 5