GigaDevice Semiconductor Inc. GD32150R-EVAL Evaluation Board. User Manual

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1 GigaDevice Semiconductor Inc. GD0R-EVAL Evaluation Board User Manual

2 GD0R-EVAL Table of Contents List of Figures... Introduction... Function pin assignment... Getting started... Hardware layout overview.... Power supply.... Boot option.... LED Key USART RS RS8_CMP_SELECT ADC/DAC IS IC SPI-TF CARD SPI-TFT LCD TFCARD-IS-Select.... USB.... COMPARATOR....6 HDMI-CEC....7 TSI....8 IR....9 BEEP....0 RTC.... Extension.... MCU... Revision history... 6 / 7

3 GD0R-EVAL List of Figures Figure Schematic diagram of power supply... Figure. Schematic diagram of boot option... Figure. Schematic diagram of LED function... 6 Figure. Schematic diagram of Key function... 6 Figure. Schematic diagram of USART function... 7 Figure 6. Schematic diagram of RS-8 function... 7 Figure 7. Schematic diagram of RS8_CMP_SELECT function... 8 Figure 8. Schematic diagram of ADC/DAC function... 8 Figure 9. Schematic diagram of IS function... 9 Figure 0. Schematic diagram of IC function... 9 Figure. Schematic diagram of SPI-TF CARD function... 0 Figure. Schematic diagram of SPI-TFT LCD function... 0 Figure. Schematic diagram of TFCARD-IS-Select function... Figure. Schematic diagram of USB function... Figure. Schematic diagram of RTC function... Figure 6. Schematic diagram of HDMI-CEC function... Figure 7. Schematic diagram of TSI function... Figure 8. Schematic diagram of IR function... Figure 9. Schematic diagram of Beep function... Figure 0. Schematic diagram of RTC function... Figure. Schematic diagram of Extension pins... Figure. Schematic diagram of MCU... / 7

4 GD0R-EVAL Introduction GD0R-EVAL evaluation board uses GDF0R8T6 as the main controller. As a complete development platform of GDFx0 value line powered by ARM Cortex -M core, the board supports full range of peripherals. It uses mini-usb interface to supply V power. SWD, Reset, Boot, User button key, LED, IC, IS, USART, RS-8, TFT-LCD, HDMI-CEC, LDR, TSI, IR LED, IR Receiver, RTC, SPI, USB, ADC, DAC and Extension Pin are also included. This document details its hardware schematic and the relevant applications. Function pin assignment Table. Pin assignment Function Pin Description PC0 LED LED PC LED PC LED PD LED RESET K-Reset PA0 K-Wakeup KEY PC K-Temper PF7 K-User Key BEEP PC7 BEEP_CTL PA USBDM USB PA USBDP PC USBDP pull up pin IR PC6 IR_RX PB9 IR_TX IC PB6 IC_SCL PB7 IC_SDA PA IS_WS PA IS_CK PA7 IS_DIN IS PA MSEL PB MCLK PB MDIN PA6 IS_MCK USART PA9 USART_TX PA0 USART_RX PA RS8_TX RS-8 PA RS8_RX PA RS8_DIR / 7

5 GD0R-EVAL Function Pin Description TSI SPI PB PB PB PB PC PB0 PB PB PB PF PF PC TSI_G6_IO TSI_G6_IO TSI_G6_IO TSI_G6_IO TSI_G_IO TSI_G_IO SPI_SCK SPI_MISO SPI_MOSI TFT_CS TF_CARD_CS TFT_RESET ADC PC ADC_IN HDMI-CEC PB8 CEC CMP PA CMP_INP DAC PA DAC_OUT Getting started The EVAL Board uses Mini USB connecter to get power, the hardware system power is +.V. A Mini USB cable and a J-Link tool are necessary to down programs. Select the correct boot mode and then power on, the LED6 will turn on, which indicates the power supply is ready. / 7

6 Hardware layout overview User Manual GD0R-EVAL. Power supply Figure Schematic diagram of power supply +UV +V +UV P SMD0P00TF 6V/0uF,AVX E U LM7-. Vin Vout C0 0V/0.uF G E6 C 0V/0.uF 6V/0uF,AVX TP TP R 70Ω LED6 LED060 CN Mini-USB VBUS DM DP ID shield 6 R Ω R Ω R.KΩ R7 MΩ C 0V/700pF PA PA PC L EBLS608-RK R6 0Ω VDDA C 0V/0.uF VSSA. Boot option Figure. Schematic diagram of boot option JP BOOT0 R8 0KΩ BOOT0 BOOT BOOT0 Boot Mode - User memory Default - System memory Changed by ISP - SRAM memory / 7

7 GD0R-EVAL. LED Figure. Schematic diagram of LED function LED PC0 R LED PC PC PD 680Ω R6 680Ω R7 680Ω R8 680Ω LED060 LED LED060 LED LED060 LED LED060. Key Figure. Schematic diagram of Key function KEY PA0 R9 0KΩ K PF7 R0 0KΩ K PC R 0KΩ K K-0B C7 K-0B C8 K-0B C9 0V/0.uF 0V/0.uF 0V/0.uF 6 / 7

8 GD0R-EVAL. USART Figure. Schematic diagram of USART function RS 0V/0.uFC6 U MAXCSE+ C+ C- 0V/0.uFC8 C+ C- 6 VCC ROUT 9 ROUT 0V/0.uF C 0V/0.uF C V+ C7 V- 6 0V/0.uF PA9 RS_TX RS_TX TIN TOUT 0 7 TIN TOUT PA0RS_RX RS_RX RIN 8 RIN J COM.6 RS-8 Figure 6. Schematic diagram of RS-8 function PA RS8_DIR PA RS8_RX RS8_DIR RS8_TX RS8 U6 RO RE DE DI Vcc B A ST8ABDR C9 0V/0.uF R8 0R JP9 HEADER 7 / 7

9 GD0R-EVAL.7 RS8_CMP_SELECT Figure 7. Schematic diagram of RS8_CMP_SELECT function JP HEADER COMINP PA RS8_DIR.8 ADC/DAC Figure 8. Schematic diagram of ADC/DAC function ADC TP PC TP ADin R KΩ C VR 0K 0V/0.uF TP PA TP DAin JP HEADER DAC 8 / 7

10 GD0R-EVAL.9 IS Figure 9. Schematic diagram of IS function IS PA IS_WS PA7 IS_DIN PA IS_CK NRST E 6V/0uF,AVX U LRCK DATA BCK PD A 6 H 7 Vcom 8 HoutR PCM770 PM SCKI 6 MS MC MD VCC Vhp AIN 0 HoutL 9 IS_MCK MSEL MCLK MDIN PA6 PA IS_MCLK IS_MDIN E 0V/0uF,AVX E 0V/0uF,AVX 6V/0uF,AVX C 0V/0.uF E J HeadPhone R7 6R R8 6R C C6 0V/0.uF 0V/0.uF.0 IC Figure 0. Schematic diagram of IC function IC C U 0V/0.uF A0 VCC 8 7 A WP 6 A SCL SDA ATC0C-SSHM-T R.7KΩ R6.7KΩ PB6 PB7 9 / 7

11 GD0R-EVAL. SPI-TF CARD Figure. Schematic diagram of SPI-TF CARD function PB R9 0 SD/LCD_SPI_CLK SD/LCD_SPI_MOSI PF R0 0 R 0K C 0V/0.uF CN 9 8 CD 7 D 6 D0 CLK VCC CMD D D TF_CARD_SOCKET MicroSD card. SPI-TFT LCD Figure. Schematic diagram of SPI-TFT LCD function C0 0V/0.uF CN PF R 0KΩ VCC TFT_CS PC RESET RESET PC SD/LCD_SPI_MOSI 6 D/C SDI(MOSI) SD/LCD_SPI_CLK 7 SCK 8 LED PB 9 SDO(MISO) SPI_LCD_Interface 0 / 7

12 GD0R-EVAL. TFCARD-IS-Select Figure. Schematic diagram of TFCARD-IS-Select function JP0 HEADER SD/LCD_SPI_MOSI PB IS_MDIN JP HEADER SD/LCD_SPI_CLK PB IS_MCLK. USB Figure. Schematic diagram of USB function +UV CN VBUS DM DP ID R Ω R Ω R.KΩ PA PA PC shield 6 R7 MΩ Mini-USB C 0V/700pF. COMPARATOR Figure. Schematic diagram of RTC function BT VBAT Battety JP0 Vbat select / 7

13 GD0R-EVAL.6 HDMI-CEC Figure 6. Schematic diagram of HDMI-CEC function PB8 R 7KΩ JP7 HEADER HDMI-CEC.7 TSI Figure 7. Schematic diagram of TSI function PB PB PB R 0KΩ R 0KΩ C8 7nF PB R 0KΩ A- B C A- PC R.KΩ TSI TSI-line-KEY PB0 ACTIVE SHIELD C9 0nF / 7

14 GD0R-EVAL.8 IR Figure 8. Schematic diagram of IR function R9 00Ω PB9 R0 KΩ R 0KΩ LED KD-0R Q 800 PC6 +V C 0V/.7uF R 00Ω JP HS008B.9 BEEP Figure 9. Schematic diagram of Beep function +UV R 00O BZ BUZZER-V PC7 R KO Q 800 R 0KO / 7

15 GD0R-EVAL.0 RTC Figure 0. Schematic diagram of RTC function BT VBAT Battety JP Vbat select. Extension Figure. Schematic diagram of Extension pins PA PC PD PB PB6 BOOT0 PB9 PC PC PC PA JP HEADER 6X PA PC0 PC PB PB PB7 PB8 PC PC PC PC0 PA0 PA PF6 PA PA0 PA8 PC8 PC6 PB PB PB0 PB PC PA7 PA PF PA JP HEADER 6X PF7 PA PA PA9 PC9 PC7 PB PB PB PB PB0 PC PA6 PA PF EXTENTION / 7

16 GD0R-EVAL. MCU Figure. Schematic diagram of MCU PA PA PC0 PC PC PD PB PB PB PB6 PB7 BOOT0 PB8 PB PA PA PC0 PC PC PD PB PB PB PB6 PB7 BOOT0 PB8 PB9 VSS_ VDD_ PF7 8 PF6 7 PA 6 PA PA PA0 PA9 PA8 PC9 0 PC8 9 PC7 8 PC6 7 PB 6 PB PB PB VBAT PC - TAMPER - WKUP PC - OSC_IN PC - OSC_OUT PF0 - OSC_IN PF - OSC_OUT NRST PC0 PC PC PC VSSA / VREF- VDDA / VREF+ PA0 - TAMPER - WKUP PA PA VDD_ VSS_ PB PB0 PB PB PB0 PC PC PA7 PA6 PA PA PF PF PA PF7 PF6 PA PA PA PA0 PA9 PA8 PC9 PC8 PC7 PC6 PB PB PB PB U GD0R8T6 PB PB0 PB PB PB0 PC PC PA7 PA6 PA PA PF PF PA VBAT PC PC PC OSC8_IN OSC8_OUT NRST PC0 PC PC PC PA0 PA PA VSSA VDDA / 7

17 Revision history User Manual GD0R-EVAL Table. Revision history Revision No. Description Date.0 Initial Release Mar. 8, 0 6 / 7

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