Κεφάλαιο 3 Η Αριθμητική των Υπολογιστών (Arithmetic for Computers) 1
Αριθμοί και Υπολογιστές Computer words are composed of bits words are represented as binary numbers Binary numbers (base 2) 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001... Of course it gets more complicated: numbers are finite (overflow) What is the largest number that can be represented? fractions and real numbers negative numbers e.g., no MIPS subi instruction; addi can add a negative number How do we represent negative numbers? i.e., which bit patterns will represent which numbers? 2
Συνοπτική Επισκόπηση In any number base, the decimal value of the i th digit d is d *Base i Ex., (10101) 2 = (1*2 4 ) + (0*2 3 ) + (1*2 2 ) + (0*2 1 ) + (1*2 0 ) = 16 + 0 + 4 + 0 + 1 = (21) 10 What s the cost (in # of bits) to represent 1,000,000 in ASCII code? What s the cost in binary? Overflow: Occurs when a number cannot be represented by some specific number of bits, MSB(s) overflow. O/S handles this. Signed (προσημασμένοι) and Unsigned (μηπροσημασμένοι) numbers 3
Συστήματα Αναπαράστασης Αριθμών (1) Sign Magnitude (2) One's Complement (3) Two's Complement 000 = +0 000 = +0 000 = +0 001 = +1 001 = +1 001 = +1 010 = +2 010 = +2 010 = +2 011 = +3 011 = +3 011 = +3 100 = -0 100 = -3 100 = -4 101 = -1 101 = -2 101 = -3 110 = -2 110 = -1 110 = -2 111 = -3 111 = -0 111 = -1 (1) has many problems: where to put the sign, complicate h/w for add/sub, both +0 and -0 exist (2) still has both +0 and -0 Which one is best? Why? 4
Αριθμοί στη MIPS (singed 2 s Complement) 32 bit signed numbers: 0000 0000 0000 0000 0000 0000 0000 0000 2 = 0 10 0000 0000 0000 0000 0000 0000 0000 0001 2 = + 1 10 0000 0000 0000 0000 0000 0000 0000 0010 2 = + 2 10... 0111 1111 1111 1111 1111 1111 1111 1110 2 = + 2,147,483,6 10 0111 1111 1111 1111 1111 1111 1111 1111 2 = + 2,147,483,7 10 1000 0000 0000 0000 0000 0000 0000 0000 2 = 2,147,483,8 10 1000 0000 0000 0000 0000 0000 0000 0001 2 = 2,147,483,7 10 1000 0000 0000 0000 0000 0000 0000 0010 2 = 2,147,483,6 10... 1111 1111 1111 1111 1111 1111 1111 1101 2 = 3 10 1111 1111 1111 1111 1111 1111 1111 1110 2 = 2 10 1111 1111 1111 1111 1111 1111 1111 1111 2 = 1 10 maxint minint 5
Λειτουργία του Two's Complement Negating a two's complement number: invert all bits and add 1 ( negate invert ) Do you remember another shortcut for this? Converting n bit numbers into numbers with more than n bits: MIPS 16-bit immediate gets converted to 32-bits for arithmetic copy the MSB (sign bit) into the other bits, called sign extension" 0010 -> 0000 0010 1010 -> 1111 1010 lbu # load byte unsigned (used mainly to load characters), lb uses singed arithmetic 6
Signed vs Unsigned A processor needs to be able to handle both singed and unsigned numbers (e.g., signed for numbers, unsigned for addresses) C has int (for signed numbers) and unsigned int (for only positive numbers) Consider: $s0 = 1111 1111 1111 1111 1111 1111 1111 1111 $s1 = 0000 0000 0000 0000 0000 0000 0000 0001 slt $t0, $s0, $s1 sltu $t1, $s0, $s1 $s0 =? $s1 =? 7
Πρόσθεση και Αφαίρεση Just like in grade school (carry/borrow 1s) 0111 0111 0110 + 0110-0110 - 0101 1101(=13 10 ) 0001 (=1 10 ) 1111 (=-1 10 ) Two's complement operations easy subtraction using addition of negative numbers 0111 + 1010 (=-6 10 ) 0001 Overflow (result too large for finite computer word): e.g., adding two n-bit numbers does not yield an n-bit number 111 + 001 1000 8
Ανίχνευση Υπερχείλισης (Overflow) No overflow when adding a positive and a negative number No overflow when signs are the same for subtraction Overflow occurs when the value affects the sign: overflow when adding two positives yields a negative or, adding two negatives gives a positive or, subtract a negative from a positive and get a negative or, subtract a positive from a negative and get a positive Thus, the carry out/ borrow bit overwrites the sign bit! Consider the operations A + B, and A B Can overflow occur if B is 0? Can overflow occur if A is 0? 9
Επιπτώσεις Υπερχείλισης To recognize overflow detection: An exception (interrupt) occurs, caused by add, addi, or sub Control jumps to predefined address for exception routine Interrupted address is saved for possible resumption $epc (exception program counter) register holds the address of the instruction causing the exception mfco $t0, $epc # copy $epc to register Details based on software system / language example: flight control vs. homework assignment Don't always want to detect overflow, ex., for unsigned integers (used for memory addresses) overflow is ignored New MIPS instructions: addu, addiu, subu note: addiu still sign-extends! note: sltu, sltiu for unsigned comparisons 10
Πολλαπλασιασμός More complicated than addition, subtraction accomplished via shifting and addition More time and more area Let's look at a version based on the gradeschool algorithm 0010 (multiplicand) (multiplier) x 1011 0010 0010 0000 +0010 0010110 (product) Negative numbers: convert and multiply there are better techniques, we won t look at them at this point 11
Ακολουθιακή Υλοποίηση Πολλαπλασιαστή Start Multiplication is performed by a series of shifts and -bit additions Simple but slow! Which part is the Datapath? Multiplier[0]=1 Add Multiplicand to Product, save result in Product Test Multiplier[0] Multiplier[0]=0 Multiplicand -bit ALU Product Shift left Shift right Multiplier Controller 32 Shift Multiplicand left Shift Multiplier right 32 nd iteration? Done Yes No Control Flow (Ροή Μονάδας Ελέγχου) 12
Ακολουθιακή Υλοποίηση Πολλαπλασιαστή (Θεωρήστε 4-μπιτο πολλαπλασιασμό) 0010 (multiplicand) x 1001 0010 0000 0000 + 0010 0010010 (product) (multiplier) Multiplier[0]=1 Add Multiplicand to Product, save result in Product Start Test Multiplier[0] Multiplier[0]=0 0010 -bit ALU 1001 0 Controller Shift left Shift right 32 Shift Multiplicand left Shift Multiplier right 32 nd iteration? Done Yes No Control Flow (Ροή Μονάδας Ελέγχου) 13
Ακολουθιακή Υλοποίηση Πολλαπλασιαστή (Θεωρήστε 4-μπιτο πολλαπλασιασμό) (συν.) 0010 (multiplicand) x 1001 0010 0000 0000 + 0010 0010010 (product) (multiplier) Multiplier[0]=1 Add Multiplicand to Product, save result in Product Start Test Multiplier[0] Multiplier[0]=0 00100 -bit ALU 100 0010 Controller Shift left Shift right 32 Shift Multiplicand left Shift Multiplier right 32 nd iteration? Done Yes No Control Flow (Ροή Μονάδας Ελέγχου) 14
Ακολουθιακή Υλοποίηση Πολλαπλασιαστή (Θεωρήστε 4-μπιτο πολλαπλασιασμό) (συν.) 0010 (multiplicand) x 1001 0010 0000 0000 + 0010 0010010 (product) (multiplier) Multiplier[0]=1 Add Multiplicand to Product, save result in Product Start Test Multiplier[0] Multiplier[0]=0 001000 -bit ALU 10 0010 Controller Shift left Shift right 32 Shift Multiplicand left Shift Multiplier right 32 nd iteration? Done Yes No Control Flow (Ροή Μονάδας Ελέγχου) 15
Ακολουθιακή Υλοποίηση Πολλαπλασιαστή (Θεωρήστε 4-μπιτο πολλαπλασιασμό) (συν.) 0010 (multiplicand) x 1001 0010 0000 0000 + 0010 0010010 (product) (multiplier) Multiplier[0]=1 Add Multiplicand to Product, save result in Product Start Test Multiplier[0] Multiplier[0]=0 0010000 -bit ALU 0010 Controller Shift left Shift right 1 32 Shift Multiplicand left Shift Multiplier right 32 nd iteration? Done Yes No Control Flow (Ροή Μονάδας Ελέγχου) 16
Ακολουθιακή Υλοποίηση Πολλαπλασιαστή (Θεωρήστε 4-μπιτο πολλαπλασιασμό) (συν.) 0010 (multiplicand) x 1001 0010 0000 0000 + 0010000 0010010 (product) (multiplier) Multiplier[0]=1 Add Multiplicand to Product, save result in Product Start Test Multiplier[0] Multiplier[0]=0 Shift left 00100000 Shift right Shift Multiplicand left Shift Multiplier right -bit ALU 0010010 Controller 32 32 nd iteration? Done Yes No Control Flow (Ροή Μονάδας Ελέγχου) 17
Υλοποίηση καλύτερης απόδοσης Requires 1 clock cycle per step increase performance Operations performed in parallel: multiplier and multiplicand shifted while multiplicand is added to product. Product[0]=1 Multiplier starts in right half of Product Issues: test correct multiplier bit (before shift) use pre-shifted contents of multiplicand Multiplicand? Start Test Product[0] Product[0]=0 32 Shift Product right 32-bit ALU 32 32 nd iteration? No Product shift right write Controller Yes Done Control Flow (Ροή Μονάδας Ελέγχου) 18
Πολλαπλασιασμός Προσημασμένων Αριθμών Can this be used for signed numbers? What changes do we need? Shift left Multiplicand -bit ALU Product Shift right Multiplier 32 Controller 19
Διαίρεση Even more complicated than multiplication Must handle division by 0 Remember the gradeschool decimal algorithm: 54 1001 Quotient (Πηλίκο) Divisor 3 163 1000 1001010 Dividend (Διαιρετέος) (Διαιρέτης) -15-1000 13 10-12 101 1 1010-1000 10 Remainder(Υπόλοιπο) Dividend = Quotient x Divisor + Remainder 163 / 3 = 54x3 +1, 1,001,010 / 1000 = 1001x1000 + 10 20
Αλγόριθμος Διαίρεσης και Υλοποίηση Start Quotient initialized to 0 Remainder initialized to Dividend Subtract Divisor from Remainder, place result in Remainder Check if divisor < dividend Remainder >= 0 Test Remainder < 0 Quotient bit 1 Remainder Quotient bit 0 Shift right Divisor Shift Quotient left, set rightmost bit to 1 Shift left Restore original value by adding Divisor to Remainder, place sum in Remainder. Shift Quotient left, set its LSB to 0 -bit ALU Quotient 32 bits Shift Divisor right Remainder Controller 33 rd iteration? No Done Yes 21
Υλοποίηση καλύτερης απόδοσης Shifts and subtract are performed in parallel Half the size for Divisor and ALU Quotient in lower half of Remainder, shift left Remainder in upper half, shift right Divisor 32 32-bit ALU 32 shift right Remainder shift left write Controller 22
Πολλαπλασιασμός και Διαίρεση στη MIPS MIPS provides a separate pair of registers to contain the -bit Product or Remainder, and 2 new instructions Resisters Hi and Lo mflo $s1 # s1 = Lo, get a copy of Lo mfhi $s1 # s1 = Hi, get a copy of Hi 4 new pseudoinstructions for multiplication and division: mult $s2, $s3 # instruction for signed multiplication # Hi,Lo=$s2 x $s3, -bit product in Hi,Lo multu $s2, $s3 # instruction for unsigned multiplication # -bit product in Hi,Lo=$s2 x $s3 div $s2, $s3 # instruction for signed division # Quotient in Lo = $s2 / $s3, Remainder in Hi = $s2 mod $s3 divu $s2, $s3 # instruction for unsigned division # Quotient in Lo = $s2 / $s3, Remainder in Hi = $s2 mod $s3 23
Αριθμητική Κινητής Υποδιαστολής (Floating Point Arithmetic) We need a way to represent: numbers with fractions, e.g., 3.1416 very small numbers, e.g.,.000000001 or 1.0 10-9 very large numbers, e.g., 3,155,760,000 or 3.15576 10 9 Scientific Νotation (Επιστημονικός Συμβολισμός) Single digit to the left of decimal point Last two examples above are shown in scientific notation Normalized (ΚανονικοποίησηTιμής) A number in scientific notation with no leading 0s Ex., 1.0 10-9 is normalized, 0.10 10-8 is not normalized 24
Περιγραφή Δυαδικών με Κινητή Υποδιαστολή 25
Κινητή Υποδιαστολή στη MIPS 26
Κινητή Υποδιαστολή στη MIPS (συν.) Overflow (for floating point) (Υπερχείλιση) Positive exponent too large to fit in E field E > 2 7-1 (=127) for single precision E > 2 10-1 (=1023) for double precision Underflow (for floating point) Negative exponent too large to fit in E E < -2-7 -2 (= -126) for single precision E < -2-10 -2 (= -1022) for double precision 27
Πρότυπο IEEE 754 για αριθμητική κινητής υποδιαστολής Used by almost any computer invented since 1980 for floating-point arithmetic Leading 1 of normalized number is implied Fraction field contains only the fractional part New Fraction field increases by 1 bit (23-bits for single precision and 52-bits for double precision) Define Significand= 1 + Fraction 0 is represented by 00.002 (NOT in normalized scientific notation!) Rest of the numbers are represented by: (-1) Sign (1+Fraction) 2 Exponent 28
Πρότυπο IEEE 754 για αριθμητική κινητής υποδιαστολής (συν.) The IEEE 754 encoding of floating-point numbers. A separate sign bit determines the sign. Denormalized numbers refer to higher precision numbers. Exponent is BIASED (coming up!) 29
Αρνητικοί Εκθέτες 30
Αρνητικοί Εκθέτες (συν.) What if we want a floating-point representation that could be easily processed by integer comparisons, ex. for sorting? Representation of previous slide complicates this Solution: Use E=000000002 as most negative exponent Use E=111111112 as most positive exponent Biased Notation Bias is the number subtracted from the 8-bit unsigned representation to calculate the actual exponent IEEE 754 uses 127 as bias for single precision (and 1023 for double precision): -1-1+127 = 126 = 011111102 +1 1+127 = 128 = 100000002 Use(-1) Sign (1+Fraction) 2 (Exponent Bias) 31
Αντιπροσώπευση κινητής υποδιαστολής Παράδειγμα 1 Consider -0.75 10 = -0.11 2 and single precision arithmetic: -0.11 2 2 0 -- scientific notation -1.1 2 2-1 -- normalized Represented in IEEE 754 as (-1) Sign (1+Fraction) 2 Biased_Exponent Sign = 1 Fraction= 10000000000000000000000 Exponent= -1 Bias= 127 Biased_Exponent= Exponent + Bias = -1 + 127 = 126 = 01111110 32
Αντιπροσώπευση κινητής υποδιαστολής Παράδειγμα 2 Consider +1.25 10 = +1.01 2 and single precision arithmetic: 1.01 2 2 0 -- scientific notation 1.10 2 2 0 -- normalized Represented in IEEE 754 as (-1) Sign (1+Fraction) 2 Biased_Exponent Sign = 0 Fraction= 01000000000000000000000 Exponent= 0 Bias= 127 Biased_Exponent= Exponent + Bias = 0 + 127 = 01111111 33
Αντιπροσώπευση κινητής υποδιαστολής Παράδειγμα 3 What s the decimal value of the following single precision floats? 34
Πρόσθεση Κινητής Υποδιαστολής 35
Υλοποίηση 36
Πολλαπλασιασμός Κινητής Υποδιαστολής 37
Εντολές Κινητής Υποδιαστολής για MIPS 32 new registers for floating point arithmetic: $f0, $f1, $f2,, $f31 (used in pairs for double-precision) Add / Subtract / Multiply / Divide add.s $f0, $f4, $f6 # add, single precision add.d $f0, $f4, $f6 # add, double precision sub.s $f0, $f4, $f6 # subtract, single precision sub.d $f0, $f4, $f6 # subtract, double precision mul.s $f0, $f4, $f6 # multiply, single precision mul.d $f0, $f4, $f6 # multiply, double precision div.s $f0, $f4, $f6 # divide, single precision div.d $f0, $f4, $f6 # divide, double precision Double-precision register: an even-odd pair of single precision floating point registers, with the even register number as its name, ex. $f2,$f3 named $f2 38
Εντολές Κινητής Υποδιαστολής για MIPS (συν.) Comparison c.eq.s $f2, $f4 # compare if equal, single precision # set cond=1 if True, cond=0 if False c.eq.d $f2, $f4 # compare if equal, double precision c.neq.s $f2, $f4 # compare if NOT equal, single precision c.neq.d $f2, $f4 # compare if NOT equal, double precision c.lt.s $f2, $f4 # compare if less than, single precision c.lt.d $f2, $f4 # compare if less than, double precision c.le.s $f2, $f4 # compare if less than or equal, single precision c.le.d $f2, $f4 # compare if less than or equal, double precision c.gt.s $f2, $f4 # compare if greater than, single precision c.gt.d $f2, $f4 # compare if greater than, double precision c.ge.s $f2, $f4 # compare if greater than or equal, single precision c.ge.d $f2, $f4 # compare if greater than or equal, double precision 39
Εντολές Κινητής Υποδιαστολής για MIPS (συν.) Branch $bc1t 25 # if cond==1 (True) branch to address $bc1f 25 # if cond==0 (False) branch to address Use with comparison instructions Load / Store $lwc1 $f1, 100($s2) # f1 = Memory[s2+100] $swc1 $f1, 100($s2) # Memory[s2+100] = f1 Base registers remain integer Example to load 2 single precision numbers, add them, and store the sum in memory: $lwc1 $f4, x($sp) # load f4 = Memory[sp+ x] $lwc1 $f6, y($sp) # load f6 = Memory[sp+ y] $add.s $f2, $f4, $f6 # f2 = f4 + f6 $swc1 $f2, z($sp) # store Memory[sp+ z] = f2 40
Παράδειγμα: C MIPS Simple program to convert temperature from Fahrenheit to Celsius: float f2c (float fahr) { return ( (5.0/9.0) * (fahr 32.0) ); } Fahr $f12, result $f0 lwc1 $f16, const5($gp) # f16 = 5 lwc1 $f18, const9($gp) # f18 = 9 div.s $f16, $f16, $f18 # f16 = 5/9 lwc1 $f18, const32($gp) # f18 = 32 sub.s $f18, $f12, $f18 # f18 = fahr-32 mul.s $f0, $f16, $f18 # f0 = (5/9)*(fahr 32) jr $ra # return 41
Αριθμητική Ακριβείας When it comes to floating point, a number is basically an approximation of the actual number. This occurs due to limited precision. We need accurate rounding methods! IEEE 754 keeps two extra bits, guard and round, for every intermediate representation (if not extra bits No rounding) four rounding modes positive divided by zero yields infinity zero divide by zero yields not a number other complexities exists Implementing the IEEE 754 standard can be tricky Not using the standard can be even worse see text for description of 80x86 and Pentium bug! 42
Περίληψη 3 ου Κεφαλαίου Κύρια Σημεία Computer arithmetic is constrained by limited precision Bit patterns have no inherent meaning but standards do exist two s complement IEEE 754 floating point Computer instructions determine meaning of the bit patterns Performance and accuracy are important so there are many complexities in real machines Algorithm choice is important and may lead to hardware optimizations for both space and time (e.g., multiplication) 43