ΒΙΟΓΡΑΦΙΚΟ ΣΗΜΕΙΩΜΑ ΚΩΝ/ΝΟΥ Η. ΓΚΟΥΤΗ ΚΑΘΗΓΗΤΗΣ ΤΜΗΜΑΤΟΣ ΗΛΕΚΤΡΟΛΟΓΩΝ ΜΗΧΑΝΙΚΩΝ ΚΑΙ ΤΕΧΝΟΛΟΓΙΑΣ ΥΠΟΛΟΓΙΣΤΩΝ ΠΟΛΥΤΕΧΝΙΚΗ ΣΧΟΛΗ ΠΑΝΕΠΙΣΤΗΜΙΟ ΠΑΤΡΩΝ

ΒΙΟΓΡΑΦΙΚΟ ΣΗΜΕΙΩΜΑ ΚΩΝ/ΝΟΥ Η. ΓΚΟΥΤΗ ΚΑΘΗΓΗΤΗΣ ΤΜΗΜΑΤΟΣ ΗΛΕΚΤΡΟΛΟΓΩΝ ΜΗΧΑΝΙΚΩΝ ΚΑΙ ΤΕΧΝΟΛΟΓΙΑΣ ΥΠΟΛΟΓΙΣΤΩΝ ΠΟΛΥΤΕΧΝΙΚΗ ΣΧΟΛΗ ΠΑΝΕΠΙΣΤΗΜΙΟ ΠΑΤΡΩΝ ΣΕΠΤΕΜΒΡΙΟΣ 2010 1

1. ΠΡΟΣΩΠΙΚΑ ΣΤΟΙΧΕΙΑ ΕΠΩΝΥΜΟ: ΓΚΟΥΤΗΣ ΟΝΟΜΑ: ΚΩΝΣΤΑΝΤΙΝΟΣ ΠΑΤΡΩΝΥΜΟ: ΗΛΙΑΣ ΗΜ/ΝΙΑ ΓΕΝΝΗΣΗΣ: 7 Μαΐου 1943 ΟΙΚΟΓ. ΚΑΤΑΣΤΑΣΗ: Έγγαμος ΕΘΝΙΚΟΤΗΤΑ: Ελληνική ΕΠΑΓ/ΚΗ ΘΕΣΗ: Καθηγητής Τμήματος Ηλεκτρολόγων Μηχανικών & Τεχνολογίας Υπολογιστών, Πολυτεχνική Σχολή, Πανεπιστήμιο Πατρών ΔΙΕΥΘΥΝΣΗ ΕΡΓΑΣΙΑΣ: Εργ. Σχεδιασμού Ολοκληρωμένων Κυκλωμάτων Τομέας Ηλεκ/κής & Υπολογιστών Τμήμα Ηλεκτρολόγων Μηχανικών & Τεχνολογίας Υπολογιστών Πολυτεχνική Σχολή Πανεπιστήμιο Πατρών Τ.Κ. 26110 Πάτρα Τηλ.: +30 2610 996442, +30 2610 997340 FAX: +30 2610 994798 E-Mail: goutis@ece.upatras.gr ΔΙΕΥΘΥΝΣΗ ΟΙΚΙΑΣ: 25 ης Μαρτίου 39 Τ.Κ. 26500 Πάτρα Τηλ.: +30 2610 992 748 2. ΣΠΟΥΔΕΣ: 1961-66: Πτυχίο Φυσικού, Πανεπιστήμιο Αθηνών 1970-72: Master στη Ραδιοηλεκτρολογία, Πανεπιστήμιο Αθηνών 1973-1974: Master of Science στις Ψηφιακές τεχνικές στις Τηλεπικοινωνίες και τον Αυτοματισμό, Heriot-Watt University, Σκωτία. 1974-1978: Διδακτορική διατριβή στην Περιοχή Επεξεργασίας Εικόνων με θέμα «Constrained optimisation algorithms for digital image reconstruction», Southampton University, Αγγλία 2

3. ΕΡΕΥΝΗΤΙΚΑ ΕΝΔΙΑΦΕΡΟΝΤΑ Σχεδίαση VLSI Κυκλωμάτων και συστημάτων σε τεχνολογίες ASIC και FPGA Συ-σχεδίαση Υλικού και Λογισμικού Μεθοδολογίες Εύρεσης Αρχιτεκτονικής VLSI συστημάτων και απεικόνισης Μεθοδολογίες Διαχείρισης Μνήμης Μετασχηματισμοί προγραμμάτων και αλγορίθμων για βέλτιστη υλοποίηση Μοντέλα μνημών, κρυφές μνήμες, scrachpad μνήμες Σχεδίαση και υλοποίηση CAD εργαλείων Αλγόριθμοι αναζήτησης και εξερεύνησης (constraint and integer programming) Τεχνικές Μεταγλωττιστών για ενσωματωμένα συστήματα VLSI σχεδίαση για χαμηλή κατανάλωση 4. ΕΠΑΓΓΕΛΜΑΤΙΚΗ ΔΡΑΣΤΗΡΙΟΤΗΤΑ 1970-1972: Βοηθός στη Φυσικομαθηματική Σχολή του Πανεπιστημίου Αθηνών, Ελλάδα 1973-1974: Τεχνικός Διευθυντής στον Οργανισμό Τηλεπικοινωνιών Ελλάδος (ΟΤΕ) υπεύθυνος για όλα τα τηλεπικοινωνιακά κέντρα του Νομού Μεσσηνίας 1976-1979: Ερευνητής στο Τμήμα Ηλεκτρολόγων Μηχανικών του Πανεπιστημίου Strathclyde, Αγγλία 1979-1985: Λέκτορας στο Τμήμα Ηλεκτρολόγων και Ηλεκτρονικών Μηχανικών του Πανεπιστημίου Newcastle upon Tyne, Αγγλία. 1985-1989: Αναπληρωτής Καθηγητής στο Τμήμα Ηλεκτρολόγων Μηχανικών του Πανεπιστημίου Πατρών, Ελλάδα. 1989-1991: Εθνικός εκπρόσωπος στο RACE 1989-σήμερα: Καθηγητής στο Τμήμα Ηλεκτρολόγων Μηχανικών του Πανεπιστημίου Πατρών, Ελλάδα. 1985-2009: Διευθυντής του Εργαστηρίου Σχεδιασμού Ολοκληρωμένων Κυκλωμάτων (VLSI Design) του Τμήματος Ηλεκτρολόγων Μηχανικών του Πανεπιστημίου Πατρών, Ελλάδα. Λοιπή επαγγελματική δραστηριότητα: Μέλος της εθνικής επιτροπής για έρευνα και ανάπτυηξη (ΓΓΕΤ) Κριτής έργων σε Ευρώπη και Ελλάδα Έχει υπηρετήσει στο πρώτο διοικητικό συμβούλιο της Europractice, ένας οργανισμός που προμηθεύει εργαλεία λογισμικού καθώς και κυκλώματα υλικού σε Ευρωπαϊκά Πανεπιστήμια και Ινστιτούτα. Συμμετείχε ως ιδρυτικό μέλος της ΕΝΕΒΗ, Ένωση Ελληνικών Βιομηχανιών Ημιαγωγών. 5. ΕΚΠΑΙΔΕΥΤΙΚΟ & ΔΙΔΑΚΤΙΚΟ ΕΡΓΟ 5.1. Διδασκαλία Προπτυχιακών Μαθημάτων: Έχει διδάξει μεγάλο αριθμό μαθημάτων εκ των οποίων ορισμένα είναι στο: Τμήμα Ηλεκτρολόγων Μηχ/κών & Τεχνολογίας Υπολογιστών, Παν/μίο Πατρών 3

o Σχεδιασμός Ολοκληρωμένων Κυκλωμάτων (VLSI) Ι o Σχεδιασμός Ολοκληρωμένων Κυκλωμάτων (VLSI) ΙΙ o Σχεδίαση Ολοκληρωμένων. Συστημάτων με Τεχνικές VLSI" 5.2. Διδασκαλία Μεταπτυχιακών Μαθημάτων: Έχει διδάξει μεγάλο αριθμό μαθημάτων εκ των οποίων ορισμένα είναι στο: Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικής, Παν/μίο Πατρών o Μεταφραστές για Ενσωματωμένα Συστήματα o Συστήματα σε Ολοκληρωμένα Κυκλώματα 5.3. Επίβλεψη Μεταπτυχιακών Φοιτητών: Έχει επιβλέψει 25 μεταπτυχιακούς φοιτητές διδακτορικού στο: Τμήμα Ηλεκτρολόγων Μηχ/κών & Τεχνολογίας Υπολογιστών, Παν/μίο Πατρών: o Από τους οποίους 6 σήμερα είναι μέλη ΔΕΠ σε Πανεπιστήμια. o Από τους οποίους 2 είναι καθηγητές σε ΑΤΕΙ. Τμήμα Ηλεκτρολόγων και Ηλεκτρονικών Μηχανικών του Πανεπιστημίου Newcastle upon Tyne, Αγγλία: o Από τους οποίους 2 είναι καθηγητές στο εξωτερικό σε Αμερική και Ευρώπη. και αρκετοί από τους υπόλοιπους έχουν ιδρύσει πετυχημένες εταιρίες. 5.4. Ίδρυση Εργαστηρίου Σχεδιασμού Ολοκληρωμένων Κυκλωμάτων: Δημιούργησε και ανάπτυξε το εργαστήριο αποκτώντας ανταγωνιστικά ερευνητικά και αναπτυξιακά προγράμματα. Το εργαστήριο έχει σήμερα περίπου είκοσι ερευνητές. 5.5. Ίδρυση Μεταπτυχιακού Προγράμματος Ειδίκευσης Ολοκληρωμένα Συστήματα Υλικού και Λογισμικού: Πετυχημένο ΜΔΕ το οποίο προσελκύει φοιτητές από όλη την Ελλάδα και τελειοφοίτοι έχουν δημιουργήσει έναν αριθμό εταιρίων. 6. ΣΥΝΕΡΓΑΣΙΑ ΜΕ ΑΚΑΔΗΜΑΙΚΑ ΙΔΡΥΜΑΤΑ Συνεργάζεται με μεγάλο αριθμό συναδέλφων επιστημών από διάφορα πανεπιστήμια ορισμένα εκ των οποίων είναι: 6.1 Ελλάδα: Εθνικό Μετσόβιο Παν/μίο, Τμήμα Ηλεκ/γων Μηχ/κών: Αναπλ. Καθηγ. Δ. Σούντρης. Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικής, Παν/μίο Πατρών: Καθηγ. Δ. Νικολός, Αν. Καθηγ. Δ. Λιούπης. Πανεπιστήμιο Πελοποννήσου, Τμήμα Επιστήμης και Τεχνολογίας Υπολογιστών: Αν. Καθηγ. Κ. Μασσέλος, Αν. Καθηγ. Σ. Μπλιώνας Αριστοτέλειο Πανεπιστήμιο Θεσσαλονίκης, Τμήμα Φυσικής: Καθηγ. Σ. Νικολαίδης. 6.2 Εξωτερικό: Katholieke Univ. Leuven, Belgium, Prof. F. Catthoor. University of Torino: Dept. of Electrical and Computer Engineering, Prof. E. Macci. Southern Illinois University Carbondale, Dept. of Electrical and Computer Engineering, Prof. S. Tragoudas. University of Porto, Prof. J. Franca 4

University of Pavia, Prof. Maloberti Έχει επίσης συνεργαστεί με ένα μεγάλο αριθμό άλλων καθηγητών μέσω Ευρωπαικών προγραμμάτων. 7. ΣΥΝΕΡΓΑΣΙΑ ΜΕ ΕΡΕΥΝΗΤΙΚΑ ΚΕΝΤΡΑ 7.1 Ελλάδα Ινστιτούτο Βιομηχανικών Συστημάτων, Καθηγ. Δ. Σερπάνος Ινστιτούτο Μικροηλεκτρονικής Δημόκριτος, Α. Νασιοπούλου 7.2 Εξωτερικό IMEC, Leuven, Belgium, Prof. F. Catthoor. 8. ΣΥΝΕΡΓΑΣΙΑ ΜΕ ΕΤΑΙΡΙΕΣ 8.1. Ελλάδα: Ο κ. Γκούτης έχει στενή συνεργασία με πολλές ελληνικές εταιρίες, εκ των οποίων ορισμένες είναι: Micrel (USA): Σχεδιάστηκε ένας υπολογιστής για αντλία έκχυσης φαρμάκων σε ασθενείς. Intracom: Σχεδιασμός baseband ασύρματου τηλεφώνου (DECT) ΕΑΒ: Έχει σχεδιάσει έναν αριθμό ολοκληρωμένων κυκλωμάτων (chip) για κρυπτογραφία Micro2gen: Συνεργασία σε LabonChip για αρχιτεκτονικές ελέγχου και μέτρηση παραμέτρων για DNA ALMA: Σχεδίαση τμημάτων ολοκληρωμένων κυκλωμάτων σε επεξεργασία εικόνας και βίντεο (IPcores) ANTcore: Συνεργασία στην ανάπτυξη ηλεκτρονικών διαδραστικών διαφημίσεων. 8.2. Εξωτερικό STMicroelect: Η μεγαλύτερη εταιρία κατασκευής chip στην Ευρώπη με την οποία συνεργάστηκε σε μεγάλο αριθμό ερευνητικών έργων. British Gas (Μεγάλη Βρετανία): Newcastle, Αγγλία. Joyce Loeble Ltd (Μεγάλη Βρετανία): Αγγλία. G.N. Danavox (Δανίας): Πρωτοπόρος εταιρία για ακουστικά βαρυκοίας για την οποία σχεδιάστηκε στο Εργαστήριο Σχεδιασμού Ολοκληρωμένων Κυκλωμάτων ένας ειδικού σκοπού επεξεργαστής χαμηλής κατανάλωσης ισχύος για ακουστικά βαρηκοΐας. ELMOS: Εταιρία κατσκευής ολοκληρωμένων κυκλωμάτων, Γερμανία. Έχει επίσης συνεργαστεί με ένα μεγάλο αριθμό Ευρωπαικών Εταιριών μέσω Ευρωπαικών προγραμμάτων. 9. ΕΡΕΥΝΗΤΙΚΑ ΚΑΙ ΑΝΑΠΤΥΞΙΑΚΑ ΠΡΟΓΡΑΜΜΑΤΑ Από τα ερευνητικά προγράμματα που έφερε στο Εργαστηρίο Σχεδιασμού Ολοκληρωμένων Κυκλωμάτων, τα μεγαλύτερα είναι: 1. " Αρχιτεκτονική και υλοποίηση φασματικού αναλυτή με VLSI ", 2. " CAD εργαλεία για φίλτρα διαμόρφωσης δέλτα ", 3. STRIDE HELLAS 187, "Hellenic design and fabrication environment of VLSI integrated circuits" 5

4. STRIDE HELLAS 141, "Development and extension of the Hellenic telemedical systems and services" 5. STRIDE/LIGHT, "Fabric fault detection via computer vision techniques" 6. "Special purpose integrated circuit design for acoustic signals digital equalizer" 7. "Computing systems architectures for automatic control algorithms", 8. LPGD A low-power design methodology/flow and its applications to the implementation of a DCS 1800-GSM/DECT modulator-demodulator 9. AMIED, Asynchronous low-power methodology and implementation of an encryption decryption system 10. SOFLOPO, Low power software development for embedded applications 11. Leonardo, Leonardo Micromedia Pilot Project 12. ΠΕΝΕΔ 99, «Μεθοδολογία διαχείρισης μνήμης για πραγματικού χρόνου και χαμηλής κατανάλωσης ενσωματωμένα συστήματα πολυμέσων» 13. ΥΠΕΡ, «Ανάπτυξη μεθόδων για υλοποίηση αλγορίθμων κρυπτογράφησης με ολοκληρωμένα κυκλώματα» 14. ASCIS (ESPRIT #3281), "Synthesis of Complex Integrated Systems", 15. TELEMED (RACE), "Medical Applications" 16. HVLSI-DPE I (ESPRIT # 5692), "Hellenic Design Prototyping Environment - I" 17. HVLSI-DPE II (ESPRIT # 7503), "Hellenic Design Environment -II"' 18. QUICKCHIPS III (ESPRIT #6043), "A system supporting ASIC design and providing rapid turnaround prototyping" 19. HEAR (ESPRIT # 8560), "Design of hearing - aid processors" 20. "Human mobility and capital" 21. MEDCHIP, Basic Research Project 8010 22. ΠΕΝΕΔ: ΜΕΘΟΔΟΛΟΓΙΕΣ ΕΥΡΕΣΗΣ ΑΡΧΙΤΕΚΤΟΝΙΚΩΝ ΕΤΕΡΟΓΕΝΩΝ ΣΥΣΤΗΜΑΤΩΝ ΣΕ ΟΛΟΚΛΗΡΩΜΕΝΟ ΚΥΚΛΩΜΑ ΜΕ ΕΠΑΝΑΠΡΟΣΔΙΟΡΙΖΟΜΕΝΕΣ ΑΡΧΙΤΕΚΤΟΝΙΚΕΣ ΠΙΝΑΚΑ, ΓΙΑ ΕΦΑΡΜΟΓΕΣ ΚΥΡΙΑΡΧΟΥΜΕΝΕΣ ΑΠΟ ΔΕΔΟΜΕΝΑ. 23. ΗΡΑΚΛΕΙΤΟΣ: 24. ΠΥΘΑΓΟΡΑΣ: Μεθοδολογίες εύρεσης αρχιτεκτονικών επαναδιατασσόμενων ενσωματωμένων συστημάτων 25. Μεταπτυχιακό Πρόγραμμα Ειδίκευσης (Master) «Ολοκληρωμένα Συστήματα Υλικού και Λογισμικού (ΟΣΥΛ)» 26. EASY: EASY/Energy Aware System on chip design of T6E HIPERLAN 2 Standard 27. INTRALED: INTRALED/Industry-driven Training for Low-power European Designers 28. MARLOW: MARLOW/A central Market place for dissemination of Low power micro-electronics design knowledge 29. END: Models. Solutions, Methods and Tools for Energy Aware Design. ENIAC, Nov.2009 10. ΕΠΙΣΤΗΜΟΝΙΚΕΣ ΔΙΑΚΡΙΣΕΙΣ Η ερευνητική του ομάδα έχει βραβευτεί από: 6

Best Paper Award: M. D. Galanis, G. Dimitroulakos, C. E. Goutis, «Improving Performance and Energy Consumption in Embedded Microprocessor Platforms with a Flexible Custom Coprocessor Data-path», ACM Great Lakes Symposium on VLSI (GLSVLSI 2007)Stresa-Lago Maggiore, Italy, March 11-13, 2007. Best Student Paper Award. M. D. Galanis, G. Dimitroulakos, A. P. Kakarountas, C. E. Goutis, «Speedups from Partitioning Software Kernels to FPGA Hardware in Embedded SoCs», IEEE Workshop on Signal Processing Systems (SIPS 2005), Athens, Greece, November 2-4, 2005 την ΙΕΕΕ MESA Conference με οικονομική υποστήριξη της ΙΒΜ και INTEL για τη σχεδίαση τμήματος κινητού τηλεφώνου το DATE (το μεγαλύτερο συνέδριο στη Μικροηλεκτρονική στην Ευρώπη) για το έργο του στη σχεδίαση επεξεργαστή για κρίσιμες εφαρμογές την SUN Computers και Mentor Graphics (μία από τις μεγαλύτερες εταιρίες σε CAD εργαλεία για σχεδίαση κυκλωμάτων και συστημάτων) σε διεθνή διαγωνισμό. 11. ΚΡΙΤΗΣ ΣΕ ΔΙΕΘΝΗ ΕΠΙΣΤΗΜΟΝΙΚΑ ΠΕΡΙΟΔΙΚΑ & ΣΥΝΕΔΡΙΑ Έχει οργανώσει το συνέδριο CAVE, έχει οργανώσει και προεδρεύσει μεγάλο αριθμό συνεδρίων. Έχει συμμετάσχει σε panel συνεδρίων. Έχει υπάρξει κριτής σε περισσότερα από 15 διεθνή επιστημονικά περιοδικά. 12. ΔΗΜΟΣΙΕΥΣΕΙΣ ΣΕ ΔΙΕΘΝΗ ΠΕΡΙΟΔΙΚΑ: (Έχει δημοσιεύσει 100 εργασίες ) 1. Durrani T.S. and Goutis C.E., "Optimization techniques for digital image reconstruction from their projections", IEE Proc.- Computers and Digital Techniques, Vol. 127, No. 5, pp. 161-169, 1980. 2. Goutis C.E. and Durrani T.S., "Constrained optimization algorithms for divergent ray Tomography", IEEE Trans. on Nuclear Sci., v. NS-28, No. 4 pp. 3620-3627, 1981. 3. Goutis C.E. and Durrani T.S., "Tomographic algorithms for general line integrals", IEEE Trans. Nucl. Sci. vol. NS-29 No. 5, pp. 1399-1404, Nov. 1982. 4. Goutis C.E. and Ibrahim M.K., "A new algorithm for spectrum estimation and an associated VLSI design", IEE Proc., Part F, Vol. 130, No. 3, pp. 250-255, April 1983. 5. Goutis C.E. and Drosos S.N., "A fast reconstruction algorithm for reconstruction from divergent ray projections", IEE Proc. Part. E, Vol. 131, pp. 89-96, 1984. 6. Goutis C.E., "Special purpose processor for block circulant sparse matrices with elliptical structure", in Digital Techniques in Simulation, Communications and Control, North Holland, pp. 207-212, 1985. 7. Goutis C.E., "Unified dual optimisation and algorithms for image recinstruction and spectral estimation", invited paper in Mathematics and Computers in Simulation, Vol. 27, pp. 623-634, 1985. 8. Leahy R. M. and Goutis C.E., "An Optimal Technique for Contraint-Based Image Restoration and Reconstruction", IEEE Trans. on ASSP, Vol. ASSP-34, No. 6, pp. 1629-1642, 1986. 9. Metafas D.E. and Goutis C.E., "A DSP Processor with a Powerful Set of Elementary Arithmetic Operations Based on CORDIC and CCM Algorithms", Journal of Microprocessing and Microprogramming 30, pp. 51-58, 1990. 10. Kyrloglou N.A., Koufopavlou O.G. and Goutis C.E., "A Generator for a Number Format Conversions IC", Journal of Microprocessing and Microprogramming 30, pp.237-240, 1990. 7

11. Mourjopoulos J.N., Kyriakis-Bitzaros E.D. and. Goutis C.E, "Theory and Real-Time Implementation of Time Varying Digital Audio Filters", 86th AES Convention, preprint 2773(R-S), Hamburg, Germany, March 1989 and Journal of the Audio Engineering Society, Vol. 38, No. 7-8, pp. 523-536, 1990. 12. Soudris D.J., Birbas M.K., Goutis C.E., "Mapping Iterative Algorithms on Regular Processor Arrays without Using Uniform Recurrent Equations", Journal of Microprocessing and Microprogramming 31, pp. 53-58, 1991. 13. Koufopavlou O.G., Kyrloglou N.A., and Goutis C.E., "A Parametric Area, Automated Adder/Subtractor VLSI Design", International Journal of Electronics, Vol. 70, No. 1, pp. 35-42, 1991. 14. Koufopavlou O.G., Metafas D.E. and Goutis C.E., "Architectures and VLSI Module Generator for Expressing Digital Signals in Decibels", International Journal of Electronics, Vol. 71, No.2, pp. 297-307, 1991. 15. Kyrloglou N.A., Koutroubinas S., Koyandis A., and Goutis C.E., "A Placing and Routing Tool Implemented in Prolog", Microprocessing and Microprogramming 32, pp.425-434, 1991. 16. Blionas S.V., Stravrakakis G.N. and Goutis C.E., "Dynamic Source Parameters of the 1981 Gulf of Corinth (Central Greece) Earthquake sequence Based on FFT and Iterative Maximum Entropy Techniques", Tectonophysics, Vol. 3, No.4, pp.261-275, 1991. 17. Kyrloglou N.A., Koufopavlou O.G. and Goutis C.E., Number Format Conversion Algorithm and VLSI Module Generator, International Journal of Electronics, Vol. 73, iss. 1, pp. 145-156, 1992 18. Horianopoulos S.L., Metafas D.E., Goutis C.E. and Deliyannis T., "A VLSI Synthesis Tool for Complementary Output Delta Modulation FIR Filters", Journal of Microprocessing and Microprogramming 34, pp. 139-142,1992. 19. Kyriakis-Bitzaros E.D. and Goutis C.E., "An Efficient Decomposition Technique for Mapping Nested Loops with Constant Dependencies into Regular Processor Arrays", Journal of Parallel and Distributed Computing, 16, Academic Press, pp.258-264, 1992. 20. Kyrloglou N.A., Koufopavlou O.G. and Goutis C.E., "ASCARID: A Standard Cell Automated Design Rule Independent Module Generator Environment", Journal of Microcomputer Applications, 15, pp. 103-119, 1992. 21. Kyriakis-Bitzaros E.D. and Goutis C.E., "A Systematic Partitioning Method for Designing Fixed-Size Processor Arrays", Journal of Circuits, Systems and Computers, Vol. 2, No. 1, pp. 75-80,1992. 22. Koufopavlou O.G. and Goutis C.E., "Image Reconstruction on a Special Purpose Array Processor", Image and Vision Computing Vol. 10, No. 7, pp. 479-484, September 1992. 23. Metafas D.E., Nikolaidis S.S. and Goutis C.E., "Real Time Cepstrum Computation Based in an Advanced CORDIC Processor", Microprocessing and Microprogramming 37, pp. 57-60, 1993. 24. Nikolaidis S.S., Mourjopoulos J.N., Goutis C.E., "A Dedicated Processor for Time-Varying Digital Audio Filters", IEEE Transactions on Circuits and Systems II, Vol. CAS-40, pp. 452-455, July 1993. 25. Economou G.-P., Nikolaidis S.S., Metafas D.E., and Goutis C.E., "Development of a Technology Independent Library", presented in Euromicro '93 and Journal of Microprocessing and Microprogramming 39, pp. 241-244, 1993. 26. Economou G.-P.K., Economopoulos N.M., Lymberopoulos D. and Goutis C.E., Experiences Accumulated towards Medical Decision Support Systems, J. of Microprocessing and Microprogramming, vol. 40, pp. 883-886, 1994. 27. Tatsaki A., Burekas B. and Goutis C.E., An Efficient Bit-Serial VLSI Implementation of the 4x4-point Discrete Cosine Transform, International Journal of Electronics, Vol. 77, No. 2, pp. 259-267, 1994. 8

28. Nikolaidis S., Theodoridis S., Goutis C.E., Array Processor for Brock Adaptive LS FIR Filtering, Signal Processing (North Holland), Vol. 39, pp. 215-222, 1994. 29. Tatsaki A., Dre C., Stouraitis T. and Goutis C.E., On the Computation of the prime factor 1-D discrete sine transform Journal Signal Processing North-Holland Publications, vol 42, No. 3, pp. 231-236, 1995. 30. Psychalinos C. and Goutis C.E., Improved Switched-Current (Si) Bilinear Integrator Circuit, IEE Electronics Letters, Vol. 31, No. 1, pp. 26-27, 1995. 31. Economou G.-P., Lymberopoulos D. and Goutis C.E., An ANNs-based System for the Diagnosis and Treatment of Diseases, Neural Processing Letters, Vol. 2, No. 1, pp. 22-26, January 1995. 32. Tatsaki A., Dre C., Stouraitis T. and Goutis C.E., Prime Factor DCT Algorithms, IEEE Transactions on Signal Processing, Vol. 43, No. 3, pp. 772-776, March 1995. 33. Tatsaki A., Stouraitis T. and Goutis C.E., Image Coder Based on Residue Number System for Progressive Transmission, IEE Electronics Letters, Vol. 31, No. 6, pp. 442-443, March 1995. 34. Dre C., Alexopoulou N., Goutis C.E., "Multi-stage Hierarchical Address Vector Quantization for Image Coding", International Journal of Electronics, vol. 78, no. 5, pp. 865-872, May 1995. 35. D.J. Soudris, P.D. Georgakopoulos, and C.E. Goutis, "A Systematic Methodology for Designing Multilevel Array Architectures", Inter. Journal of Electronics, vol. 79, no. 5, pp. 507-518, 1995. 36. Metafas and C.E. Goutis, "A Floating Point Advanced Cordic Processor", Journal of VLSI Signal Processing, Vol. 10, pp. 53-65, 1995. 37. L. Bisdounis, G. Panagiotaras, O. Koufopavlou, C. E. Goutis, CMOS Multi-input Gate Implementations for Low-Power Digital Design, International Journal of Electronics, vol. 79, no. 5, pp. 641-653, November 1995. 38. Kyriakis-Bitzaros E.D., Soudris D.J. and Goutis C.E., Transformation of Nested Loops into Uniform Recurrences and Their Mappings to Regular Processor Arrays, Journal of Circuits, Systems and Computers, Vol. 6, No.3, pp. 243-265, World Scientific Publ. Cp., 1996. 39. Soudris D., V. Paliouras, T. Stouraitis, and C.E. Goutis, "A VLSI Design Methodology for RNS Full Adder-Based Inner Product Architectures, IEEE Transactions on Circuits and Systems II, Vol. 44, No. 4, pp. 315-318, April 1997. 40. Masselos K., Merakos P. Stouraitis T., Goutis C. E., Trade-Off Analysis of a Low-Power Image Coding Algorithm, Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology, Special Issue on Systematic Trade-Off Analysis in Signal Processing Systems Design, Kluwer Academic Publishers, Vol. 18, No. 1, pp. 65-80, January 1998. 41. Soudris D., Poechmueller P., Kyriakis-Bitzaros E.D., Birbas M., Goutis C.E. and Thanailakis A., Design Methodology for systematic derivation of fault-tolerant processor array architectures, International Journal of Electronics, vol. 84, no. 6, pp. 615-624, Taylor & Francis, 1998. 42. Masselos K., Merakos P., Stouraitis T., Goutis C. E, A Novel Algorithm for Low Power Image and Video Coding, IEEE Transactions on Circuits and Systems for Video Technology, Vol. 8, No. 3, pp. 258-263, June 1998. 43. Theodoridis G., Theoharis S., Soudris D., and Goutis C.Ε., Method for Minimizing the Switching Activity of Two-Level Logic Circuits, IEE Proceedings on Computers & Digital Techniques, Vol. 145, No. 5, pp. 357-363, September 1998. 44. Masselos K., Stouraitis T., Goutis C. E., "Novel Scheme for Low-Power Classified Vector Quantization Image Coding", IEE proceedings on Vision, Image and Signal Processing, Vol. 145, No. 6, pp. 408-414, December 1998. 9

45. Masselos K., Merakos P., Stouraitis T., Goutis C. E., Novel Vector Quantization Based Algorithms for Low-Power Image Coding and Decoding, IEEE Trans. On Circuits and Systems II, Vol. 46, No. 2, pp. 193-198, February 1999. 46. Theodoridis G., Theoharis S., Soudris D., and Goutis C.Ε., A New Method for Low Power Design of Two Level Logic Circuits, VLSI Design Journal, Vol. 9, No. 2, pp. 147-157, 1999. 47. Danckaert K., Masselos K., Catthoor F., DeMan H., Goutis C.E., Strategy for Power Efficient Design of Parallel Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 7, No. 2, pp. 258-265, June 1999. 48. Kyriakis-Bitzaros E.D., Goutis C.E., A Space-Time Representation Method of Iterative Algorithms for the Design of Processor Arrays, Journal of VLSI Signal Procesing, Kluwer Academic Publishers, Vol. 22, No. 3, pp. 151-162, September 1999. 49. Masselos K., Merakos P., Stouraitis T., Goutis C.E., Novel Techniques for Bus Power Consumption Reduction in Realizations of Sum-of-Product Computation, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 7, No. 4, pp. 492-497, December 1999. 50. Masselos K., Merakos. P., Stouraitis T., Goutis C.E., Low Power Architectures for Digital Signal Processing, Journal of Systems Architecture, Elsevier Publlishers B.V., Vol. 46, Issue 7, pp. 551-571, March 2000. 51. Masselos K., Merakos. P., Stouraitis T., Goutis C.E., Computation Reordering: A Novel Transformation for Low Power DSP Synthesis, VLSI Design Journal, Gordon and Breach Science Publishwers SA, Vol. 10, No. 2, pp. 177-202, 2000. 52. Theoharis S., Theodoridis G., Merakos P.K. and Goutis C.E., Accurate Data Path Models for Fast RT-Level Power Estimation, IEE Proceedings-Computers and Digital Techniques, Vol. 147, No. 4, pp. 209-214, July 2000. 53. Masselos K., Danckaert K., Catthoor F., Zervas N., Goutis C.E. and De Man H., A Specification Refinement Methodology for Power Efficient Partitioning of Data-Dominated Algorithms Within Performance Constraints, Journal of VLSI Signal Processing 26, Kluwer Academic Publishers, Vol. 26, No. 3, pp. 291-317, November 2000. 54. Theodoridis G., Theoharis S., Soudris D. and Goutis C.E., Switching Activity Estimation Under Real- Gate Delay Using Timed Boolean Functions, IEE Proceedings Comp.Digit. Techn., Vol. 147, No.6, November 2000. 55. Theodoridis G. Theoharis S., Soudris D., Goutis C.E., A Probabilistic Power Estimation Method for Combinational Circuits Under Real Gate Delay Model, in VLSI Design, Journal of Custom-Chip Design, Simulation and Testing, Taylor & Francis, Vol. 12, No. 1, pp. 69-79 (invited paper), 2001. 56. Theodoridis G. Theoharis S., Soudris D., Goutis C.E., A Fast and Accurate Method of Power Estimation for Logic Level Networks, in VLSI Design, Journal of Custom-Chip Design, Simulation and Testing, Taylor & Francis, Vol. 12, No. 2, pp. 205-219 (special issue on Low-Power Design), 2001. 57. Zervas N.D., Anagnostopoulos G.P., Spiliotopoulos V., Andreopoulos Y. and Goutis C.E., Evaluation of Design Alternatives for the 2-D-Discrete Wavelet Transform, IEEE Transactions on Circuits and Systems for Video Technology, Vol. 11, No. 12, pp. 1246-1262, December 2001. 58. Zervas N.D., Perakis M., Soudris D.J., Metaxakis E.G., Tzimas A., Kalivas G.A., Goutis C.E., Low- Power Design of Direct Conversion Baseband DECT Receiver, IEEE Transactions on Circuits and Systems-II, Vol. 48, No. 12, pp. 1121-1131, December 2001. 10

59. Merakos P., Masselos K., Goutis C. E., "Power Efficient Hierarchical Scheduling for DSP Transformations", VLSI Design Journal, Gordon and Breach Science Publishers SA, Vol. 14(2), pp.203-217, 2002. 60. Zervas N. D., Masselos K., Karayiannis Y. A., Goutis C.E, "Energy Minimization under Area and Performance Constraints for Multimedia Applications Realized on Embedded Cores", VLSI Design Journal, Gordon and Breach Science Publishers SA, Vol. 14(3), pp. 273-286, 2002. 61. Masselos K., Catthoor F., Goutis C. E., DeMan H., A Systematic Methodology for the Application of Data Transfer and Storage Optimizing Code Transformations for Power Consumption and Execution Time Reduction in Realizations of Multimedia Algorithms on Programmable Processors, IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Volume 10, Issue 4 (August 2002) 62. Masselos K., Theoharis S., Merakos P., Stouraitis T., Goutis C. E., "Memory Accesses Reordering for Interconnect Power Reduction in Sum-of-Products Computations", ", IEEE Transactions on Signal Processing, Vol. 50, No. 11, Nov. 2002. 63. Theoharis S., Theodoridis G., Soudris D., Goutis C.E., Thanailakis A., A Fast and Accurate Delay Method for Switching Estimation of Large Combinatorial Circuits, Journal of Systems Architecture, Elsevier Science Publ., Vol. 48, pp. 113-124, 2002. 64. Nikolaidis S., Karaolis E., Kakarountas A., Papadomanolakis K. and Goutis C.E., A Methodology for Calculating the Undetactable Double-Faults in Self-Checking Circuits, Journal of Circuits, Systems and Computers, World Scientific, Vol. 12, No. 1, pp. 75-91, February 2003. 65. Masselos K., Merakos P., Theoharis S., Stouraitis T. and Goutis C.E., Power Efficient Data Path Synthesis of Sum-of-Product Computations, IEEE Trans. On Very Large Scale Integration (VLSI) Systems, Vol. 11, No. 3, pp.446-450, June 2003. 66. Milidonis A., Dimitroulakos G., Galanis M. D., Kakarountas T., Theodoridis G., Goutis C.E., and Catthoor F., A Framework for Data Partitioning for C++ Data-Intensive Applications" Journal of Design Automation for Embedded Systems (DAES), Springer Science+Business Media B.V., No. 2, pp. 101-121, June 2005. 67. Galanis M. D., Theodoridis G., Tragoudas S., Goutis C.E., A Reconfigurable Coarse-Grain Data-Path for Accelerating Computational Intensive Kernels, Journal of Circuits, Systems, and Computers (JCSC), World Scientific Publishers, vol. 14, no. 9, pp. 877-893, August 2005. 68. Dimitroulakos G., Galanis M. D., Milidonis A., and Goutis C.E., A High-Throughput, Memory Efficient Architecture for computing the Tile-Based Two Dimensional Discrete Wavelet Transform for the JPEG2000, INTEGRATION, the VLSI Journal, Elsevier Publishers, vol. 39, no. 1, pp. 1-11, Sept. 2005. 69. Galanis M. D., Kitsos P., Kostopoulos G., Sklavos N., and Goutis C.E., Comparison of the Hardware Implementation of Stream Ciphers, IAJIT Journal, Colleges of Information and Computer Society, Vol. 2, No. 4, pp.267-274, Oct. 2005. 70. A.P. Kakarountas, H. Michail, A. Milidonis, G. Theodoridis, C.E Goutis, High-Speed FPGA Implementation of Secure Hash Algorithm for IPSec and VPN Applications, Journal of Supercomputing, Springer Science + Business Media, vol. 37, pp. 179 195, 2006. 71. M. D. Galanis, A. Milidonis, G. Theodoridis, D. Soudris, C. E. Goutis, A Method for Partitioning Applications in Hybrid Reconfigurable Architectures, Design Automation for Embedded Systems (DAES), Springer, vol. 10, no.1, pp. 27-47, 2006. 72. M. D. Galanis, G. Dimitroulakos, C. E. Goutis, Performance Improvements of DSP Applications on a Generic Reconfigurable Platform, International Journal of Signal Processing (IJSP), World Enformatica Society, vol. 3, no. 2, 2006. 11

73. H.E. Michail, A.P. Kakarountas, A.Milidonis, C.E. Goutis, Efficient FPGA Implementation of Novel Cryptographic Hashing Core, Computing Letters, VSP/Brill Publishing, vol. 2, num. 1-2, pp. 21-27(7), 2006. 74. I. Yiakoumis, M. Papadonikolakis, H.E. Michail, A.P. Kakarountas, C.E. Goutis Maximizing the hash function of authentication codes, IEEE Potentials, vol. 25, iss. 2, pp. 9 12, March-April 2006. 75. M.D. Galanis, A. Milidonis, A.P. Kakarountas, and C.E. Goutis, A Design Flow for Speeding-up DSP Applications in Heterogeneous Reconfigurable Systems, Microelectronics Journal, Elsevier, vol 37, pp. 554-564, June 2006. 76. Galanis M.D., Dimitroulakos G, Goutis C.E., Partitioning Methodology for Heterogeneous Reconfigurable Functional Units, Journal of Supercomputing, Springer, Vol 38, No. 1, Oct. 2006. 77. Kakarountas A.P., Spiliotopoulos V., Galanis M., Nikolaidis S., Goutis C.E., Automating Evaluation of the Totally Self-Checking Property Targeting Concurrent On-line Testing, submitted for publication to IEEE Transactions on Computer-Aided Design. 78. Galanis, M.D.; Theodoridis, G.; Tragoudas, S.; Goutis, C.E. A high-performance data path for synthesizing DSP kernels, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Volume 25, Issue 6, June 2006 Page(s):1154-1162 Digital Object Identifier 10.1109/TCAD.2005.855965 79. M.D. Galanis, A. Milidonis, G. Theodoridis, D. Soudris, C.E. Goutis, Automated Framework for Partitioning DSP Applications in Hybrid Reconfigurable Platforms, Microprocessors and Microsystems 31(1) pp. 1-14, Feb. 2007 80. Galanis M. D., Dimitroulakos G., Goutis C. E., Exploring the Speedups pf Embedded Systems Utilizing a High-Performance Coprocessor Data-Path, Journal of Supercomputing, Springer, Vol. 39, pp. 17-34, Jan. 2007. 81. Michail H.E., Kakarountas A.P., Goutis C.E., Server Side Hashing Core Exceding 3 Gbps of Throughput, International Journal of Network Security (Special Issue), Vol. 1, No. 1-2-3, pp. 43-53, 2007. 82. Galanis M.D., Dimitroulakos G., Goutis C.E., Performance Optimization of Embedded Applications in a Hybrid Reconfigurable Platform, Lecture Notes in Computer Science, 4644LNCS, pp. 352-362, 2007. 83. Galanis M.D., Dimitroulakos G., Goutis C.E., Speedups and Energy Reductions from Mapping DSP Applications on a Embedded Reconfigurable System, IEEE Trans. On Very Large Scale Integration (VLSI) Systems, 15(12), pp. 1362-1366, 2007. 84. M.D. Galanis, G. Dimitroulakos, S. Tragoudas, C.E. Goutis, Speedups in Embedded Systems with a High-Performance Coprocessor Data-Path, ACM Trans. on Design Automation of Electronic Systems 12 (3) 85. G. Dimitroulakos, M.D. Galanis, C.E. Goutis, Design Space Exploration of an Optimized Compiler Approach for a Generic Reconfigurable Array Archtecture, Journal of Supercomputing, Springer, 40 (2), pp. 127-157, May 2007. 86. Harris E. Michail, George A. Panagiotakopoulos, Vasilis N. Thanasoulis, Athanasios Kakarountas, Costas E. Goutis: Server side hashing core exceeding 3 Gbps of throughput. IJSN 2(3/4):228-238 (2007) 87. Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture. The Journal of Supercomputing 40(2): pp.127-157 (2007) 12

88. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path. The Journal of Supercomputing 39(3): 251-271 (2007) 89. Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: Automated framework for partitioning DSP applications in hybrid reconfigurable platforms. Microprocessors and Microsystems 31(1): pp.1-14 (2007) 90. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System. IEEE Trans. VLSI Syst. 15(12): pp.1362-1366 (2007) 91. Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms CoRR abs/0710.4844: (2007) 92. Michalis D. Galanis, Gregory Dimitroulakos, Spyros Tragoudas, Costas E. Goutis: Speedups in embedded systems with a high-performance coprocessor datapath. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007) 93. Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis: Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path. Signal Processing Systems 50(2): pp.179-200 (2008) 94. Michalis D. Galanis, Costas E. Goutis: Speedups from extending embedded processors with a highperformance coarse-grained reconfigurable data-path. Journal of Systems Architecture - Embedded Systems Design 54(5): pp.479-490 (2008) 95. Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis: Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays. The Journal of Supercomputing 48(2): pp.115-151 (2009) 96. Grigoris Dimitroulakos, Stavros Georgiopoulos, Michalis D. Galanis, Costas E. Goutis: Resource aware mapping on coarse grained reconfigurable arrays. Microprocessors and Microsystems - Embedded Hardware Design 33(2): pp.91-105 (2009) 97. Athanasios Kakarountas, Harris E. Michail, Costas E. Goutis, Abdoul M. Rjoub: High-throughput implementation of the RIPEMD-160. International Journal of Internet Technology and Secured Transactions, Vol. 1, No. 3-4, pp. 309-316 (2009) 98. Harris E. Michail, Athanasios Kakarountas, Athanasios Milidonis, Costas E. Goutis: A Top-Down Design Methodology for Ultrahigh-Performance Hashing Cores. IEEE Trans. Dependable Sec. Comput. (TDSC) 6(4): pp.255-268 (2009) 99. Nicolaos Alachiotis, Vasileios I. Kelefouras, George S. Athanasiou,Harris E. Michail, Angeliki S. Kritikakou and Costas E. Goutis: A data locality methodology for matrix-matrix multiplication algorithm. J. Supercomput., DOI 10.1007/s11227-010-0474-3, (Sept. 2010) 100.Harris E. Michail, George S. Athanasiou, Andreas A. Gregoriades, Chris L. Panagiotou and Costas E. Goutis: High Throughput Hardware/Software Co-Design Approach for SHA-256 Hashing Cryptographic Module in IPSec/IPv6. Global Journal of Computer and Technology (GJCST) Vol. 10 (4) pp. 54 59 (2010) 13. ΔΗΜΟΣΙΕΥΣΕΙΣ ΣΕ ΔΙΕΘΝΗ ΣΥΝΕΔΡΙΑ: (Έχει δημοσιεύσει 189 εργασίες) 13

1. Durrani T.S. and Goutis C.E., "Fourier domain techniques for digital image reconstruction from their projections" in "Digital image processing and analysis" Editors J.C. Simon and A. Rosenfeld, Noordholf, Publ., E20, pp. 93-99, 1977. 2. Goutis C.E. and Durrani T.S., "New algorithms for image reconstruction from fan beam projections" in "Pattern recognition and signal processing" Ed. C.H. Chen, Sijthoff and Noordholf publ., pp. 505-519, 1978. 3. Durrani T.S. and. Goutis C.E, "Multi-dimensional image reconstruction from projections using constraint optimisation", IEE Symposium on current trends in digital image processing, Portsmouth Polytechnic, March, 1976. 4. Goutis C.E. and Durrani T.S., "Recursive algorithms for digital reconstructions of images from their projections", IEE International Conference on Information Science and Systems, Patras, Greece, August 1976. 5. Goutis C.E. and Durrani T.S., "Digital image reconstruction by circulant like algorithms", Proc. of IERE Conf. on Digital Processing of Signals in Communications, Loughborough, IERE, Conf. Proc., No. 37, pp. 285-292. 6. Taylor R.G., Durrani T.S. and Goutis C.E., "Block processing on pulse Doppler Radar", Proceedings of IEE Con. Radar 77, Savoy Place, UK, pp. 134-140, 1977. 7. Goutis C.E. and Durrani T.S., Report on "High resolution techniques for radar data processing", AT/2065/029 ASWE Contract, June 1977. 8. Goutis C.E. and Durrani T.S., "Constraint optimisation techniques for fan beam projection imaging", Proc. of University of Patras/IEEE Conf. "Applications of Information and Control Systems", Edited by D.E. Lainiotis and N.S. Tzannes, Reidel Publication Netherland, pp. 29-37, 1980. 9. Durrani T.S. and Goutis C.E., "A new class of algorithms for digital tomographic reconstruction", IEE Colloquium on "Tomographic Reconstruction Techniques", London, pp. 5.1-2, 6th May 1981. 10. Goutis C.E., Allen C.R. and Ibrahim M.K., "Speeding up Fougere's algorithm and its VLSI implementation", Proc. of Internat. Conf. on Spectral Analysis and its Use in Underwater acoustics, Institute of Acoustics, Imperial College, England, pp. 15.1-9, April 1982. 11. Goutis C.E. and Durrani T.S., "An optimal technique for tomographic image reconstruction from curved ray projections", ICASSP - 82, pp. 1549-1552, April 1982. 12. Goutis C.E., Leahy R.M. and Drosos S.N., "Reconstruction algorithms for limited view projection data", ICASSP-83, pp. 143-146, April 1983. 13. Leahy R.M., Goutis C.E. and Drosos S.N., "Tomographic and spectral analysis using noise statistics, in Proc. ICASSP-84, pp. 4.3.1-4, USA. 14. Goutis C.E., Leahy R.M. and Cassidy P.G., "Spectra using data distribution and covariance modelling", in Proc. ICASSP-84, pp. 31.7.1-4, USA. 15. Sheblee J.S. and Goutis C.E., "A processor for linear systems for block circulant sparse matrices", on VLSI Special Purpose Computers and Applications, pp. 8.1-4, London, Feb. 1985. 16. Ibrahim M.K. and Goutis C.E., "Detection algorithm using prediction error-additive noise orthogonality and noise covariance characteristics", in Proc. ICASSP-85, pp. 17.8.1-4, USA. 17. Goutis C.E. and Sheblee J.S., "A 2-D array processor having a controlled pipeline architecture for elliptically sparse matrices", in Proc. ICASSP-85, pp. 36.9.1-4, USA. 14

18. Leahy R.M. and Goutis C.E., "Optimal techniques for constraint based signal restoration and image reconstruction", in Proc. ICASSP-85, pp. 18.4.1-4, USA. 19. Goutis C.E. and Durrani T.S., "Orthogonal transformations for tomographic reconstructions", IEE colloquium on "Transform Techniques in Image Processing", Savoy Place, pp. 8.1-4, May 1983. 20. Goutis C.E., Ibrahim M.K. and Cassidy P.G., "Maximum likelihood spectra for non Toeplitz measured covariance matrices", published in Proc. of MECO, 6th IASTED International Symposium, Athens, pp. 198-201, Aug. 1983. 21. Leahy R.M. and Goutis C.E., "Knowledge based spectral estimation using modelling", Proc. of the Intern. Conference on Radar, Paris, pp. 374-379, May 1984. 22. Leahy R.M. and Goutis C.E., "Tomographic and spectral analysis. A unified approach", Intern. Conf. on Signal Porcessing, DSP-84, Florence, pp. 149-151, 1984. 23. Goutis C.E., Ibrahim M.K. and Leahy R.M., "Optimisation for convolution Kernels with an application to detection of burried pipes", Intern. Conf. on Digital Processing of Signals in Communications, Loughborough, England, April 1985. 24. Makhlouf M.A.R., Goutis C.E., Yung C.H. and Allen C.R., "Concurrent VLSI architecture for covariance-lattice computations in maximum entropy spectrum estimation", Intern. Conf. on Digital Processing of Signals in Communications, Loughborough, England, April 1985. 25. Yung C.H. and Goutis C.E., "Recursive methodology and VLSI parametrised modules for signal processing", presented in CAVE Workshop, Chester, England, Dec. 1985. 26. Goutis C.E. and Sheblee J.M., "Design, simulation and layout of an array processor for matrix manipulation", presented in CAVE Workshop, Belgium, May 1985. 27. Drosos S.N. and Goutis C.E., "Fast algorithms for positron emission tomography", appeared in Melecon '85, Spain. 28. Goutis C.E. and Blionas S.V., "Array Processor for solving noisy Toeplitz systems", in Proceedings of Conference in Integrated Circuits Technology I, Limerick, Ireland, pp. 65-72, 1986. 29. Goutis C.E., Birbas M.K., Kyriakis-Bitzaros E.D. and Soudris D.J., "Rule-Based Mapping of Iterative Primitives on Their Architectures", CAVE Workshop, Beligrate, Milano, Italy, December 1988. 30. Koufopavlou O.G., Goutis C.E., Nikolaidis S. and Vallidras K., "Integrated Circuits to Control PWM- Power Inverters", presented in two-day conference of Technical Chamber of Greece "Power Electronics, Production-Application-Education", Athens, Greece, February 1989. 31. Kyriakis-Bitzaros E.D. and Goutis C.E., "An Efficient Decomposition Technique for Mapping Uniform Recurences onto Regular Array Processors", Int. Workshop on Algorithms and Parallel VLSI Architectures, France, Part B, pp. 94-100, June 1990. 32. Birbas M.K., Soudris D.J. and Goutis C.E., "A New Method for Mapping Iterative Algorithms on Regular Arrays", Proceedings of Bilkent International Conference on New Trends on Communications, Control and Signal Processing, Vol. II, pp. 1121-1127, Ankara, Turkey, July 1990. 33. Birbas M.K,, Soudris D.J. and Goutis C.E., "A New Method for Mapping Matrix Computation Algorithms on Regular Processor Arrays", PARCELLA'91, International Workshop on Parallel Processing by Cellular Automata and Arrays, Berlin, Germany, 17-21, 1990. 15

34. Birbas M.K., Soudris D.J. and Goutis C.E., "Modelling and Direct Mapping of Iterative Algorithms on Regular Processor Arrays", Proceedings of International Workshop on Algorithms and Parallel VLSI Architecture, Vol. II, pp. 83-88, Pont-a-Mousson, France, 1990. 35. Soudris D.J., Poechmueller P., Kyriakis-Bitzaros E.D., Birbas M.K., Goutis C.E., Glessner M., "Design Methodology for Systematic Derivation of Fault-Tolerant Array Processors", presented in CompEuro'90. 36. Soudris D.J., Birbas M.K. and Goutis C.E., "Design Methodology for Mapping Iterative Algorithms on Piecewise Regular Processor Arrays", Proceedings of CompEuro'91, pp.373-377, Bologna, Italy, May 13-16, 1991. 37. Soudris D.J., Birbas M.K. and Goutis C.E., "Design Methodology for Mapping of Nested Loops on Array Architectures", CAVE Workshop, Agia Pelaghia, Heraklion Greece, May 22-24, 1991. 38. Horianopoulos S.L., Metafas D.E., Goutis C.E. and Deliyannis T., "A Delta Modulation FIR Filter High Level Synthesis Tool", CAVE Workshop, Agia Pelaghia, Heraklion, Greece, May 22-24, 1991. 39. Nikolaidis S., Koufopavlou O.G., Theodoridis S. and Goutis C.E., "An Array Processor for LS FIR System Identification", Proceedings of EUROMICRO'91, Vienna, Austria, pp.557-564 and Microprocessing and Microprogramming 32, pp. 557-564, 1991. 40. Birbas M.K., Kyriakis-Bitzaros E.D., Soudris D.J. and Goutis C.E., "Direct Mapping of Nested Loops and Efficient Decomposition on Uniform Recurrences for Implementation on Array Architectures", Algorithms and Parallel VLSI Architectures, Editor Deprettere, North-Holland, pp.343-352, 1991. 41. Soudris D.J., Birbas M.K., Koufopavlou O.G., Metafas D.E., Nikolaidis S.S., Goutis C.E. and Theodoridis S., "All-Digital Spectrum Analyzer Based on a Parallel Algorithm", Proceedings of IEEE MELECON'91, Ljubljana, Jugoslavia, pp. 408-411, May 22-24, 1991. 42. Soudris D.J., Birbas M.K. and Goutis C.E., "Direct Mapping of Nested Loops on Piecewise Regular Processor Arrays", Proceedings of International Workshop on Algorithms and Parallel VLSI Architectures II, Chateau de Bonas, France, pp. 145-150, June 3-6, 1991. 43. Birbas M.K., Soudris D.J. and Goutis C.E., "Design Methodology for Mapping Iterative Algorithms on Array Architectures", Proceedings of ISCAS, Singapore, pp. 3058-3061, June 1-14, 1991. 44. Kyriakis-Bitzaros E.D. and Goutis C.E., "A New Partitioning Method for Mapping Uniform Recurrences into Fixed Size Processor Arrays", Proceedings of the Fourth ISMM International Conference on Parallel and Distributed Computing and Systems, USA, pp. 39-40, 1991. 45. Horianopoulos S.L., Metafas D.E., Goutis C.E. and Deliyannis T., "A Delta Modulation FIR Filter High Level Synthesis Tool", Proceedings of the Fourth ISMM International Conference on Parallel and Distributed Computing and Systems, USA, pp. 95-99, 1991. 46. Metafas D.E., Krikis G. and Goutis C.E., "VLSI Design of an 8-Bit Fixed-Point CORDIC Processor with Extended Operation Set", Proceedings of EURO ASIC'91, Paris, pp. 158-161, May 27-1, 1991. 47. Metafas D.E. and Goutis C.E., "A Floating Point Pipeline CORDIC Processor with Extended Operation Set", Proceedings of ISCAS'91, Singapore, pp. 3066-3069, June 11-14, 1991. 48. Nikolaidis S.S., Mourjopoulos J.N. and Goutis C.E., "A Processor Architecture for Time-Varying Digital Audio Filters", presented in the International Conference on DSP Applications and Technology, Berlin, October 1991. 49. Kyrloglou N.A., Koutroubinas S., Kogiadis A., and Goutis C.E., "Artificial Inteligence and Integrated Circuits Design", Third Panhellenic Conference on Informatics, Athens, May 1991 (In Greek). 16

50. Soudris D.J., Poechmueller P., Kyriakis-Bitzaros E.D., Birbas M.K., Goutis C.E., Glesner M., Design Methodology for Systematic Derivation of Fault-Tolerant Array Processors, CompEuro 1992, pp. 562-567, 1992. 51. Nikolaidis S.S., Mourjopoulos J.N., and Goutis C.E., "A Processor for Time-Varying Digital Audio Filters with Special Transition Properties", 4th Euromicro Workshop on Real Time Systems, Athens, pp. 15-20, June 3-5, 1992. 52. Nikolaidis S.S., Metafas D.E., and Goutis C.E., "CORDIC Based Pipeline Architecture for All-Pass Filters", IEEE Proceedings of ISCAS'93, Vol 3/4, pp.1917-1920, 1993. 53. Soudris D.J., Paliouras V., Stouraitis T., Skavantzos A., and Goutis C.E., "Systematic Design of Full Adder-Based Architectures for Convolution", IEEE Proceedings of ICASSP'93, Vol. I/V, pp. 389-392, 1993. 54. Kyriakis-Bitzaros E.D., Koufopavlou O.G. and Goutis C.E., Space-Time Representation of Iterative Algorithms and the Design of Regular Processor Arrays, IBM Research Report, RC 19000, May 1993. 55. Metafas D.E., Mariatos E., Nicolaidis S.S. and Goutis C.E., "Implementaion of Given's Rotation Processors for DSP Real-Time Applications", presented in Euromicro '93 and Journal of Microprocessing and Microprogramming 38, pp. 351-357, 1993. 56. Economou G.-P. K., Nikolaidis S.S., Metafas D.E., Goutis C.E., "Technology Independent Library For Fast Turn-Arround ASIC Design", Proceedings of 4th EUROCHIP Workshop in VLSI Design Training, Toledo, Spain, pp. 356-361, Sept.-Oct. 1993. 57. Kyriakis-Bitzaros E.D., Koufopavlou O.G. and Goutis C.E., "Space-Time Representation of Iterative Algorithms and the Design of Regular Processor Arrays", International Conference on Parallel Processing, Vol.III, pp. 2-9, 1993. 58. Dre C., Tatsaki A., Stouraitis T. and Goutis C.E., "A Novel Prime Factor Algorithm for the 1-D and 2- D Discrete Cosine Transform", Proceedings of European Conference on Circuit Theory and Design (ECCTD'93), Davos, pp. 797-802, August 1993. 59. Kyriakis-Bitzaros E.D., Koufopavlou O.G. and Goutis C.E., Space-Time Representation of Iterative Algorithms and the Design of Regular Processor Arrays, Proceedings of the International Conference on Parallel Processing, St. Charles, Illinois, USA, Volume III, pp. 2-9, August 16-20, 1993. 60. Hallas J.A., Birbas M.K., Kikidis J.C., Birbas A.N. and Goutis C.E., Near-Lossless Compression of Continuous-Tone Still Images Using Fuzzy Logic notions and the Binary Arithmetic Coder (Q- Coder), Proceedings of ISCAS'94, London, UK, Vol. 3/6, pp. 125-128, 1994. 61. Mariatos E., Metafas D.E., Hallas J.A. and Goutis C.E., A Fast D.C.T. Processor, Based on Special Purpose CORDIC Rotators, Proceedings of ISCAS'94, London, UK, Vol. 4/6, 271-274, 1994. 62. Hallas J.A., Mariatos E.P., Birbas M.K., Birbas A.N. and Goutis C.E., A CAD tool for the development of an Extra-Fast Fuzzy Logic Controller based on FPGAs and memory modules, Proceedings of FPL'94, Prague, Chech Republique, 1994. 63. Paliouras V., Kyriakis-Bitzaros E.D., Stouraitis T. Goutis C.E., Modelling of Algorithms and Processor Arrays Based on Cellllular Automata, Modelling Techniques and Tools for Computer Performance Evaluation 1994, Vienna, pp. 63-66, May 1994. 64. Economou G.-P.K., Anagnostopoulos G.C. and Goutis C.E., Experiences Accumulated by the Simulation of an Application Specific Analog Integrated Circuit, 5th Eurochip Workshop on VLSI Design Training, Dresden, Germany, pp. 406-411, October 1994. 17

65. Tatsaki A., Stouraitis T. and Goutis C.E., An Efficient Pyramid VQ-based Image Compression Algorithm, IEEE Data Compression Conference (DCC'94), Snowbird Utah, pp.479, March 1994. 66. Dre C., Gianopoulou S. and Goutis C.E., A Fast Algorithm for Vector Quantization Codebook Generation, SPIE VCIP'94, Chicago USA, Vol. SPIE 2308, pp. 199-208, September 1994. 67. Tatsaki A. and Goutis C.E., A Bit-Serial VLSI Architecture for the 2-D Discrete Cosine Transform, Euromicro'94, Liverpool, England, 1994 and Journal of Microprocessing and Microprogramming, North- Holland, Vol. 40, pp. 829-832, 1994. 68. Dre C., Branis G. and Goutis C.E., Image Compression using Vector Quantization of Wavelet Coefficients", Euromicro'94, 4-9 September 1994, Liverpool, England and Microprocessing and Microprogramming 40, pp. 927-930, 1994. 69. Economou G.-P. K., Anagnostopoulos G.C., Theofilou D.T., Stouraitis T. and Goutis C.E., Non-Linear Optimization: Artificial Neural Network Solution Techniques Applied to the Optimum Linear Feedback Control of Linear Discrete-Time Dynamic Systems, 20th Euromicro Conference: System Architecture and Integration, Liverpool, U.K., pp. 637-643, September 1994. 70. Economou G.-P.K., Spiropoulos C., Economopoulos N.M., Charokopos N., Lymberopoulos D., Spiliopoulou M., Haralambopoulou C. and Goutis C.E., Medical Diagnosis and Artificial Neural Networks: A Medical Expert System Applied to Pulmonary Diseases, 1994 IEEE International Workshop on Neural Networks for Signal Processing, Ermioni, Greece, pp. 482-489, September 1994. 71. Economou G.-P.K., Mariatos E.P., Economopoulos N.M., Lymberopoulos D., and Goutis C.E., FPGA Implementation of Artificial Neural Networks: An Application on Medical Expert Systems, 4th International Conference on Microelectronics for Neural Networks and Fuzzy Systems, Torino, Italy, pp. 287-293, September 1994. 72. Economou G.-P.K., Spiropoulos C., Economopoulos N.M., Charocopos N., Lymberopoulos D., Spiliopoulou M., Haralambopulu C. and Goutis C.E., Medical Decision Making Systems in Pulmonology: A Creative Environment based on Artificial Neural Networks, 1994 IEEE Conference on Systems, Man and Cybernetics: Humans, Information and Technology, San Antonio, USA, pp. 975-980,October 1994. 73. Economou G.-P.K.., Spiropoulos C., Economopoulos N.M., Charokopos N., Zikos P., Lymberopoulos Dand Goutis C.E., Decision Supporting Systems in Medical Diseases Diagnosis: An Artificial Neural Networks Approach, 1994 Annual Fall Meeting of the Biomedical Society, Tempe, Arizona, 14-16/10/1994. 74. Economou G.-P.K., Economopoulos N.M., Charokopos N., Zikos P., Lymberopoulos D., Spiropoulos C. and Goutis C.E., Suggesting Diagnosis of Diseases and Treatment: How Far Artificial Neural Networks Can Go?, 1994 IEEE ISANN, Tainan, Taiwan, 15-17/12/1994. 75. Dre C., Tatsaki A. T., Stouraitis T., Goutis C.E., "Alternative Architectures for the 2-D DCT Algorithm", IEEE International Symposium on Circuits and Systems (ISCAS'95), pp. 2156-2159, March 1995. 76. Tatsaki A., Stouraitis T., and Goutis C.E., A Progressive Image Compression Scheme based on Lattice Vector Quantization, presented in EUROPTO, The European Symposium on Advanced Networks and Services, Compression Technologies and Standards for Image and Video Communications, Amsterdam, March 1995. 77. Dre C. and Goutis C.E., An Efficient Address-Vector-Quantization based Image Coding Scheme, presented in EUROPTO, The European Symposium on Advanced Networks and Services, Compression Technologies and Standards for Image and Video Communications, Amsterdam, March 1995. 18