First International omputer,inc Protable omputer roup HW epartment oard name : Mother oard chematic. chematic Page escription : Project : T. PI & IRQ & M escription : Version : 0. Initial ate : eptember, 00. lock iagram :. Nat name escription :. oard tack up escription :. chematic modify Item and History :. power on & off & equence :. Layout uideline :. switch setting Manager ign by: ngus Ho rawing by : asy Wang LN ircuit check by : Jimmys Ho udio ircuit check by : Jimmys Ho Total confirm by : First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev 0. Monday, January 0, 00 ate: heet of
. chematic Page escription :.. chematic Page escription. lock iagram. NNOTTION. chematic Modify. Timing iagram. PU Layout uideline. R & LK EN Layout uideline. mfcp othan (/) 0. mfcp othan (/). POWER (PU ORE). Thermal / FN NN. LVIO (/)(LV/PI/V/TV). LVIO (/)(MI/LK/PM). LVIO (/)(R II). LVIO (/)(HOT). LVIO (/)(POWER). LVIO (/)(/NTF). IH-M (/)(PI/PU/IRQ/LN) 0. IH-M (/)(IE//U/PMU/PIO). IH-M (/)(POWER). IH-M (/)(ROUN). lock enerator. R O-IMM. R O-IMM. WITH & TV_OUT. TI (IEE). TI (RU). RU POWER W./NN 0. Firm Ware Hub (FWH). LE INITER & L NN. LP PMU0. U NN. U NN. RT / MU. T / -ROM NN. alexico MINI PI. PEEP/WITH. LP K MX 0. PI / LP Pull Up/own. IP/LI W; REW. Reset ircuit. Over Voltage Protect. Power (R.V/ 0.VM). Power (.V/V/.VM/.VM). IN&IN. Power (V/V/VM/VM). M NN. OE (L) 0. UIO MP / PEKER. HEPHONE & PIF. MIIN. Power (VP/.VM). PTOR IN & attery Voltage ense. harge ircuit. RT PORT. PE & NN. LN M0 & M. TRNFORMER & RJ, RJ. PI & IRQ & M escription : IEL HIP Mini PI(Wireless LN) ardus (TI 0) PIINT IRQ IRQ IRQ IRQ HIP UMTER REQ REQ0 / NT0 REQ / NT REQ / NT REQ / NT LN EZ MiniPI/ardus MiniPI/ardus V/LN IH-M Embeded U.0 HIP MiniPI ardus Mini PI(Wireless LN) LN(EZ) IRQ hannel IRQ0 IRQ IRQ IRQ IRQ IRQ IRQ IRQ IRQ IRQ IRQ0 IRQ IRQ IRQ IRQ IRQ esciption ystem timer Keyboard (asacde) LN / MOEM erial Port UIO / V / U FLOPPY IK LPT RT PI MOEM/LN ardbus P/ mouse FPU H ROM M hannel M0 M M M M M M M evice MOEM / LN EP FLOPPY IK UIO (ascade) Unused Unused Unused First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev chematic Page & PI /IRQ/ M escription 0. Monday, January 0, 00 ate: heet of
. lock iagram : RT P TV Port P L P Thermal ensor MT P PE-M-P P PE U Intel othan/yonah Processor Host us Intel M uf P,0 P,,,,, MI Interface Mem us PU ORE P PU VP MHVRE P RII IMM(ocket) 00MHZ/MHZ RII IMM0(ocket) 00MHZ/MHZ P P LK I PI/LP Pull up/own LI/IP W MIN W NN Over Voltage Protect attery charger T ON FN NN P P0 P P P P P P IN P PMUV/V V/V V/V VM/VM.VM.V/.VM.VM R_.V R_0.VM U U P P P P P P P P P P T H P P U P U U U P U.0 P UIO MP P0 HEPHONE P Mic IN P K/ TRL T U U0 U0 P LP MX INT K/ ual Layout ZLI OE ' OE L P M NN P P P P IH-M 0 P,0,, -Link LP U FLH ROM ( F/W Hub) Mb/Mb P0 IE U LI it PI U Mini PI alexico LN M0 P P ROM P PMI TI () P, TP 0 P LP PMU0 P RJ NN P NN P IN RREER P RT REET PMI LOT0 P P P First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev LOK IRM 0. Monday, January 0, 00 ate: heet of
. Net name escription :.oard tack up escription Voltage Rails IN PMUV PMUV V V V V VM VM Vcore_PU VP Vcore_MH.VM.VM.V.V.VM R_.V R_0.VM Primary system power supply.0v always on power rail by LTH or IN.V always on power rail by LTH or IN.0V always on power rail by ON or PU0.V always on power rail by ON or PU0.V power rail.0v power rail.v switched power rail.0v switched power rail ore Voltage.V~0.V for PU.0V for TL Termination Voltage.0V or.v for LVIO core.v for PU PLL Voltage.V switched power rail.v power rail.v always on power rail.v power rail for MH IO.V power rail for RII POWER RIL 0.V RII Termination Voltage VORE_PU ETINTION othan P Layers Layer Layer Layer Layer Layer Layer Layer Layer Layers : epth.mm Impence ohms /- 0% VOLTE 0.~.0V 0 URRENT omponent ide, Microstrip signal Layer round Plane tripline Layer(High peed) tripline Layer(High peed) Power Plane tripline Layer(High peed) round Plane older ide,microstrip signal Layer VP othan.0v. VP_MH LVIO.0V 0. VORE_MH LVIO.0V.VM/.VM othan (PLL).V 0. Part Naming onventions N F L Q R RP U Y ignal onditioning Q L_ = = = = = = = = = = apacitor onnector iode Fuse Inductor Transistor Resistor Resistor Pack rbitrary Logic evice rystal and Osc Net Name uffix 0 = = = = ctive Low signal amped (by a resistor) Isolated (by a Q-switch) Filtered (by an inductor or bead) R_.V LVIO (R).V. R MOULE.VM LVIO.V. (LV, TV,PIE) (VM) IHM (ORE)(PLL)(MI)..V IHM.V (U/LN).V IHM (U).V.VM LVIO.V 0. (PIE_,LVIO,RT,HV) 0.VM R RM 0.V VM V V VM IHM (IO) LVIO (TV ) TI0 MiniPI FWH IO LP K OE LK EN LV TI0 MiniPI PMI V IHM (U) MP00 ROM H INT K/ INT M INVERTER.V.V.V 0. 0. 0. (Evaluation) 0.0 (Evaluation) 0.0 (Idle) 0. 0. 0. 0. 0.0 (Idle) 0. (Run) 0.0 (Idle) 0.~0.(Run) 0.0 (Idle) 0. (Run) 0.0 (Idle) 0. (Run) V V PMI V IHM U m First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- PMUV PMU0 0.0 PMUV PMU0 0.0 T < othan M IH-M > ize ocument Number Rev NNOTTION 0. Monday, January 0, 00 ate: heet of
.chematic modify Item and History : U ROOT UE OLUTION PHE IN HITORY: 0 First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev Version Notice 0. Monday, January 0, 00 ate: heet of
. power on & off & equence : Power On equencing Timing iagram IHM Timing VI.VM.V VR_ON Vcc-core PU_UP Vccp Vccp_UP Vccgmch Tsft_star_vcc Vboot Vid Tboot Tboot-vid-tr Tcpu_up Tvccp_up.VM MX elta Voltage=00mV.VM(LN).VM(LN) MX elta Voltage=00mV.V MX elta Voltage=00mV.V(LN).V(LN) MX elta Voltage=00mV MHPWR Tgmch_pwrgd.VM VREF_U LK_ENLE# VP V IMVP_PWR Tcpu_pwrgd MX elta Voltage=00mV MX elta Voltage=00mV VREF No Requirement VM MX elta Voltage=00mV VM<--->.VM.VM<--->.VM.VM<--->VREF.VM<--->VREF TTERY ONLY POWER ON TIMIN POWW0 UPEN N REUME TIMIN PMUV/PMUV POWW0 ON V MINW0_IH PMUV/PMUV ON V PM_RMRT0 PM_LP_0 H H H H PM_RTRT0 PM_LP_0/0/0 PM_LP_0/0 PU0 UTT_0 H H PU0 UTT_0 VM,V V VM PM_PWROK H PM_PWROK Y_PWROK VRON_VP Y_PWROK VP,.VM VRON_VP VP/.VM VORE_ON VORE_ON VR_ON VR_ON VORE_PU VORE_PU K0_PWR0 K0_PWR0 PM_VTE PM_VTE PU_PWROO PU_PWR PI_RT0 PI_RT0 TL_PURT0 To OEM/other PI device TL_PURT0 From OEM to PU First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev Timing iagram 0. Monday, January 0, 00 ate: heet of
. Layout uideline : ystem us ommon lock ignal Layout uide : #, NR#, PRI#, R0#, Y#, EFER#, PWR#, RY#, HIT#, HITM#, LOK#, R[..0]#, TRY#, REET#. Transmission Line Type Total Trace Length Normal Impedance pacing (mils) trip-line(int. Layer) Micro-strip(Ext. Layer).0 ~. inch /-0% & (Int. Layer) & 0(Ext. Layer) Topology : IERR#, FERR# PU L Topology : PROHOT# Receiver R L L VP Rtt L L 0." - " 0" -.0" 0." - " 0" -.0" L L L Rtt R Rtt 0" -.0" /-% /-% 0" -.0" /-% /-% Transmission Line Transmission Line Micro-strip trip-line ource ynchronous T : ignals Name ignals Matching trobes associated trobe Matching with the group T#[..0], INV0# /- 00 mils TP0#,TN0# /- mils T#[..], INV# /- 00 mils TP#,TN# /- mils T#[..], INV# /- 00 mils TP#,TN# /- mils T#[..], INV# /- 00 mils TP#,TN# /- mils PU L Topology : PWROO VP Receiver Rtt L Voltage Translation evice 0." - " 0." - " 0" -.0" 0" -.0" /-% /-% Micro-strip trip-line Topology: T#[..0], INV#[..0], TN#[..0], TP#[..0] Total Trace Length Normal pacing (mils) Transmission ignal Names Impedance Line Type ata to ata trobe to Min Max trobe to ata (inches) (inches) trobe T#[..0] trip-line 0.. /-0% & N INV#[..0] trip-line 0.. /-0% & N IH L Topology : THERMTRIP# MH L PU L PU L IH-M Rss L L VP Rtt VP Rtt L 0." - " 0." - " L 0." - " 0." - " L 0" -.0" 0" -.0" L 0" -.0" 0" -.0" Rtt 0 /-% 0 /-% Rtt /-% /-% Transmission Line Micro-strip trip-line Rss /-% /-% Transmission Line Micro-strip trip-line TN#[..0] TP#[..0] trip-line trip-line 0. 0... /-0% & /-0% & No trace witdth to trace space ratio requirement relaxation NOTE: allowedcomplementary strobes. The only recommended trace spacing ratio is : & & Topology: T#[..0], INV#[..0], TN#[..0], TP#[..0] Total Trace Length Normal pacing (mils) Transmission ignal Names Impedance Line Type ata to ata trobe to Min Max trobe to ata (inches) (inches) trobe T#[..0] trip-line 0..0 /-0% & N INV#[..0] trip-line 0..0 /-0% & N TN#[..0] trip-line 0..0 /-0% & & TP#[..0] trip-line 0..0 /-0% & & No trace witdth to trace space ratio requirement relaxation NOTE: allowedcomplementary strobes. The only recommended trace spacing ratio is : Topology : PULP# IH L L PU L L MH L L Transmission Line 0." - " 0." -.0" 0 Micro-strip 0." - " 0." -.0" 0 trip-line Topology : LINT / NMI, LINT0 / INTR, 0M#, INNE#, PLP#, MI#, TPLK# IH PU Rtest (No tuff) Topology : PU REET# without ITP IH L PU Transmission Line 0." - " Micro-strip 0." - " trip-line L " -." " -." Transmission Line Micro-strip trip-line Rtest Topology: T#[..0], INV#[..0], TN#[..0], TP#[..0] Total Trace Length Normal pacing (mils) Transmission ignal Names Impedance Line Type ata to ata trobe to Min Max trobe to ata (inches) (inches) trobe T#[..0] trip-line 0.. /-0% & N INV#[..0] trip-line 0.. /-0% & N TN#[..0] trip-line 0.. /-0% & & Topology : PU REET# with ITP MH L L VP Rtt Rs L PU ITP L L L L Rs.0" -.0".0" max 0." max. /-% Rtt. /-% TP#[..0] trip-line 0.. /-0% & No trace witdth to trace space ratio requirement relaxation NOTE: allowedcomplementary strobes. The only recommended trace spacing ratio is : & ifferential Impedance Targets for Routing : ource ynchronous RE : ddress#[..], REQ#[..0], T#[..0] Transmission Line Type trip-line Total Trace Length 0. ~. inch Normal Impedance /-0% pacing (mils) & ignal Type Host lock Routing eometry Impedance -mil trace width on - mil spacing 00 Ω /- % MI -mil trace width on - mil spacing 00 Ω /- % ignal Matching /- 0 mils /- mils ignals Name #[..], REQ#[..0] #[.. ignals Matching /- 00 mils /- 00 mils trobes associated with the group T0# T# trobe Matching /- 00 mils /- 00 mils EXT-PI VO -mil trace width on - mil spacing -mil trace width on - mil spacing 00 Ω /- % 00 Ω /- % /- 0 mils /- 0 mils LV -mil trace width on - mil spacing 00 Ω /- % /- 0 mils T -mil trace width on - mil spacing 00 Ω /- % /- 0 mils U.0 -mil trace width on - mil spacing 0 Ω /- % /- mil PI EXPRE -mil trace width on - mil spacing 00 Ω /- % /- mils First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- R -mil trace width on - mil spacing Ω /- % /- 0 mil T < othan M IH-M > ize ocument Number Rev PU Layout uideline 0. Monday, January 0, 00 ate: heet of
LVIO R Layout uidelines Note that all length matching formulas are based on MH die-pad to O-IMM pin total length roup locks ata ontrol R ignal roups ommand _M[:0] ; _M[:0] _[:0] ; _[:0] _R# _R# _# ; _# _WE# ; _WE# ompensation MROMPN MROMPP MLEWIN ; MLEWOUT MVREF[:0] Feedback _RVENOUT# ; _RVENOUT# _RVENIN# ; _RVENIN# Length Matching Formulas ignal Name ignal roup Minimum Length Maximum Length K[:0] ontrol to lock lock -.0" lock 0." K#[:0] ommand to lock lock -.0" lock.0" _Q[:0] _Q[:0] _Q[:0] ; _Q[:0] P to lock lock -.0" lock 0." _M[:0] ; _M[:0] trobe to lock lock -.0" lock 0." KE[:0] #[:0] ata to trobe trobe - mils trobe mils M_OT[:0] lock ignals Topologies and Routing uidelines ata trobe ignals Topologies and Routing uidelines // // // //0 O-IMM P L MH Pin P Package Length Range K0-M L L M L M L M R R L M L M L M L L L L L M PU,MH Minimum pacing to other R ignals : mils Minimum pacing to other non-r ignals : 0 mils Trace Width : mils inner layerl egment : mils,total Length < /= 000 mils inner layerl egment : mils,total Length > 000 mils outer layerl egment : mils Q to Q# pacing : mils outer layerl egment : mils Minmun Q to Q pacing : inner layerl egment : mils,total Length < /= 000 mils inner layerl egment : mils,total Length > 000 mils outer layerl egment : 0 mils Total Length --LL: Min 0.", Max." Trace Length L : Max 0.", : Max 00 mils Length Matching : Q to K/K# ( lock -.0") </= Q </= ( lock 0.") K0-M M M L L L L PU,MH M L M R MH Pin P Package Length Range // // //0 O-IMM P mil trace, mil pair space L L Min:0." Max:.0" ata ignals Topologies and Routing uidelines MH Pin P Package Length Range L L L O-IMM P ontrol ignals Topologies and Routing uidelines L / / M L L M /0 lock length tolerence within the pair : /- 0 mil lock to lock Length Matching : /- 0 mils Minimum Pair to Pair pacing :? mils Minimum pacing to other R ignals : mils Minimum pacing to other non-r ignals : 0 mils Trace Length L : Max 0.", : Max 00 mils Total Length --LL: Min 0.", Max.0" Minimum pacing to other R ignals : mils Minimum pacing to other non-r ignals : 0 mils Trace Width : mils inner layerl egment : mils,total Length < /= 000 mils inner layerl egment : mils,total Length > 000 mils outer layerl egment : mils Trace pacing : mils inner layerl egment : mils,total Length < /= 000 mils inner layerl egment : mils,total Length > 000 mils outer layerl egment : 0 mils Total Length --LL: Min 0.", Max." Trace Length L : Max 0.", : Max 00 mils Q/M to QLength Matching : /- 0 mils LOK HLKPU[..0] HLKN[..0] HLKITP[..0] R LK OT LK LENTH L : Max 0." L : Max 00mils L : Max 0." L : Min " Max " L : Max 0." L : Max 00mils L : Max 00 mils L : Min 00 mils Max " L : Max 0." L : Max 00mils L : Max 00 mils L : Min " Max 0" TRE / PE / mils / mils 0 mils (spacing to other) / mils mils (spacing to other) TRE MUTHIN L/L- : /- 0 mils L/L- /- 0 mils L/L- : /- 0 mils LLL /L- L- L- : /- 0 mils L/L- : 00 /- 0 mils (for P Topology) L/L- : 00 /- 0 mils (for Topology) LLL /L- L- L- : /- mils Rs ohms /- % ohms /- % to ohms /- % /- 0 mils ohms /- % Rt. ohms /- %. ohms /- %. ohms /- % IMPENE 00 ohms /- % differential mode ohms /- % single mode ohms /- % 00 ohms /- % KEW NOTE ifferentials pairs with 0ps Total the same length. (within 0 mil) udget.pu & N trace 00ps for flight mismatch within 0 mil skew 00ps for pin to* MLK_IH & PLK_MH pin skew PLK_TI 0ps for jitter Length mismatch within 00 mils N.Making PI length with minimum various.max skew = ns MH Pin P Package Length Range O-IMM P ommand ignals Topologies and Routing uidelines MH Pin P Package Length Range / / /,/0 L L L L L M L M ohm % L L L L L M L M O-IMM P ohm % Minimum TRL trace pacing : mils Minimum pacing to other R ignals : mils Minimum pacing to other non-r ignals : 0 mils Trace Length L : Max 0." L : Max." Total Length --LL: Min 0.", Max." TRL to K/K# Length Matching : (TRL-.") </= TRL </= ( LK.0") Minimum pacing to other R ignals : mils Minimum pacing to other non-r ignals : 0 mils Trace Width : mils inner layerl egment : mils,total Length < /= 000 mils inner layerl egment : mils,total Length > 000 mils outer layerl egment : mils Trace pacing : mils inner layerl egment : mils,total Length < /= 000 mils inner layerl egment : mils,total Length > 000 mils outer layerl egment : 0 mils Total Length --LL: Min 0.", Max." Trace Length L Max 0.", : Max 00 mils Trace Length L : Max." LOK U (MHZ) LK PI/PIF LK PLKIH PLKFWH PLKIO PLKLN MLK_IO MLK_IH MLK_ LENTH L : Max 0." L : Min " Max 0" L : Max 0." L : Min " Max 0" L : Z (0" to 0"),Max 0" L : Z (0" to "),Max 0" L : Max 0." L : Max " TRE / PE mils (stripline) 0 mils (spacing to other) mils (stripline) 0 mils (spacing to other) mils (stripline) 0 mils (spacing to other) TRE MUTHIN N N (LL) to IH-M must be within 00 nils to (LL) to IO/ R ohms /- %. ohms /- % ohms /- %. ohms /- % Rt IMPENE ohms /- % ohms /- % ohms /- % KEW NONE NONE FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- NOTE First International omputer, Inc. Length Matching : M to K/K# M OIMM0 PLL M, OIMM PLL Min : lock -.", Max : lock -.0" T < othan M IH-M > ize ocument Number Rev RII/LK en Layout uideline 0. Monday, January 0, 00 ate: heet of
E TL_H0[..] TL_H0[..0] () TL_H0[..] TL_H0[..0] () U- TL_H0 P TL_H0 # U TL_H00 TL_H0 # 0# V TL_H0 TL_H0 # # R TL_H0 TL_H0 # # V TL_H0 TL_H0 # # W TL_H0 TL_H0 # # T TL_H0 TL_H00 # # W TL_H0 TL_H0 0# # Y 0 TL_H0 TL_H0 # # Y 0 TL_H0 TL_H0 # # U TL_H0 TL_H0 # # TL_H00 TL_H0 # 0# Y E TL_H0 TL_H0 # # TL_H0 # # TL_H0 # E TL_H0 # TL_H0 () TL_T00 U T0# # TL_H0 # Y TL_H0 () TL_0 N # # TL_H0 # T TL_H0 () TL_NR0 L NR# # U TL_H0 # V TL_H0 # R TL_H0 () TL_R00 N R0# # R TL_H0 # R TL_H00 0# TL_H0 () TL_EFER0 L EFER# # U TL_H0 () TL_RY0 H RY# # V TL_H0 () TL_Y0 M Y# # U V TL_H0 # Y TL_H0 # TL_H0 () TL_HIT0 K HIT# # TL_H0 () TL_HITM0 K HITM# # Y (0,,,0,,,) Place testpoint on IERR# with a N 0." away () PU_0M0 0M# () PU_FERR0_O FERR# PM0# TL_PM00 () PU_INNE0 INNE# PM# TL_PM0 () PM# TL_PM0 () PM# TL_PM0 () PU_INTR LINT0 () PU_NMI LINT R 0 % /W 00(NU) () PU_MI0 MI# R# ITP_REET0 (0) () PU_TPLK0 TPLK# THRMTRIP0 should coonect to IH and LVIO without T-ing (No stub) () () PU_LK PU_LK0 (0,,,0,,,) () () THERM THERM () () VP VP TL_HREQ0[..0] () (,0) THRMTRIP0 (0,,,0,,,) TL_T0 () () () () PU_INIT0 TL_LOK0 () TL_R0[..0] TL_PURT0 PU_PWROO (,) PU_LP0 () PU_PLP0 () () VP TL_TRY0 TL_PRI0 TL_PWR0 R. % /W 00 R R % /W 00 TL_HREQ00 TL_HREQ0 TL_HREQ0 TL_HREQ0 TL_HREQ0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 PU_IERR0_O TL_R00 TL_R0 TL_R0 00 % /W 00 R P T P T F E E F E F E J H K L M E J REQ0# REQ# REQ# REQ# REQ# # # # 0# # # # # # # # # # 0# # T# IERR# INIT# LOK# R0# R# R# TRY# REET# PWROO LP# PLP# PRI# PWR# THERM THERM THERMTRIP# PROHOT# LK0 LK ddress roup0 ddress roup ontrol ignal Legacy PU Thermal Host LK ITP00 Port ata roup0 ata roup ata roup ata roup TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 PU_N_E PU_N_ PU_N_ PU_N_F PU_N_ TL_INV00 () TL_TN00 () TL_TP00 () TL_INV0 () TL_TN0 () TL_TP0 () TL_INV0 () TL_TN0 () TL_TP0 () TL_INV0 () TL_TN0 () TL_TP0 () TLREF = / VP Max Length : 0." PU_EL0 () PM_PI0 () IMVP POWER TTU INITOR PU_ITP_LK ITP_LK0 Place within " PU_ITP_LK0 ITP_LK R K % /W 00(NU) TET ITP_TK R K % /W 00(NU) R0 0 % /W 00 TK TET F ITP_TI TI ITP_TO_O TO ITP_TM TM ITP_TRT0 R0. % /W 00 TRT# OMP0 P R. % /W 00 OMP P R. % /W 00 TL_PRY0 0 PRY# OMP R. % /W 00 TL_PREQ0 0 PREQ# OMP omp(0,) must be routed width R Less than 0." mils Zo=.ohm,make trace. % /W 00 length shorter than 0." R KT Foxconn MT PZ0--0 (0,,,0,,,) VP 0 % /W 00 R R. % /W 00 0 % /W 00 0-0-0 INV0# TN0# TP0# # # # # 0# # # # # # # # # # 0# # INV# TN# TP# INV# TN# TP# # # 0# # # # # # # # # # 0# # # # INV# TN# TP# TLREF0/RV TLREF TLREF/PRTP# TLREF/RV RV0 RV RV/EL RV RV/EL0 RV/PI# H L M H F J M J L N M H N K J K L T W W 0 E F F0 E F F F 0 E E E F E K % /W 00 R R K % /W F 00 PU_EL () PU_PRTP0 () omp(,) must be routed width mils Zo= ohm,make trace length shorter than 0." VP (0,,,0,,,) First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev PU ( othan ) / 0. Wednesday, January, 00 ate: heet of E
(,,) VORE_PU (,,,0,,,) VP U- U- R 0 % /W 00 V0 VP0 0 0 00 R V VP 0 R V VP 0 R 0 V VP 0 T V VP E 0 T E V VP E 0 T E V VP E 0 0 T E V VP F0 0 T E V VP F 0 U E V VP F 0 U E V0 VP0 F 0 0 U F V VP K U F Intel Recommend Option V VP L V F V VP L V F0 V VP M V F V VP M V X 0UF & X 0UF 00 XR V VP N V V VP N W H V VP P W H V VP P W J V0 VP0 R 0 0 0 W J V VP R W K V VP T Y U V VP T Y V V VP U Y V V Y W V W V VQ0 P Note: othan Processor MHZ Y V VQ W TEP use both.v&.v Y V V0 othan Processor MHZ 0 0 0 V TEP only use.v V V V 0 % /W 00 R V.VM (,,,,,,) 0 V V V0 F 0 % /W 00(NU) R.VM (,,) V V V E N V V V E V V0 V E 0 0 0 V E0 V E V E V E V E 0 V E0 V E V E V F V0 F 0 0 V F V F V F 0 V F 0 V F V F V F V F V VI0 E VR_VI0 () F E V0 VI F VR_VI () F 0 0 E V VI F VR_VI () E V VI VR_VI () E V VI VR_VI () E V VI H VR_VI () E V F V H F0 V H F V H F V H F V0 Vsense E R J F. % /W 00(NU) 0 0 V J E J E J E J E0 KT Foxconn MT PZ0--0 K E K E K E 0-0-0 K E K E0 L 0 0 E L E Layout note : L F L F Provide a test point (with no stub) to connect a M F differential probe between VENE and ENE M F M F at the location where the two.ohm resistors M F terminate the ohm transmission line M F N F N 0 0 F N F N Layout note : N P VENE and ENE lines P should be of equal length P sense F R P. % /W 00(NU) R R E E 0 T0uF V ±0% mω MT LOW ER EEF0R PNONI 0.uF V 0% 00 XR 0.uF V 0% 00 XR 0.uF V 0% 00 XR 0.uF V 0% 00 XR 0.uF V 0% 00 XR(NU) 0.uF V 0% 00 XR(NU) 0.uF V 0% 00 XR(NU) 0.uF V 0% 00 XR(NU) 0.uF V 0% 00 XR 0.uF V 0% 00 XR 0 0 0 0 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO(NU) 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO(NU) 0.0uF V 0% 00 XR(NU) 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO(NU) 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO(NU) 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO(NU) 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO(NU) 0uF.V 0% 00 XR TIYO(NU) 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO(NU) 0 T-P 0uF V- to 0% MT P P EEFX00 PNONI 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO T-P 0uF V- to 0% MT P P EEFX00 PNONI(NU) T-P 0uF V- to 0% MT P P EEFX00 PNONI T-P 0uF V- to 0% MT P P EEFX00 PNONI T-P 0uF V- to 0% MT P P EEFX00 PNONI 0uF.V 0% 00 XR TIYO One round One Via First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev PU ( othan ) / 0. ate: Wednesday, January, 00 heet 0 of 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO(NU) 0uF.V 0% 00 XR TIYO 0uF.V 0% 00 XR TIYO(NU) 0uF.V 0% 00 XR TIYO(NU) KT Foxconn MT PZ0--0 0-0-0
VORE_PU (,,,,,) IN FUE V R00 MT.*.mm F VORE_N R 0 % /W 00 (,0) PM_VTE (,,0,,,,,,,,0,,,,,,,,0,,,,,0,,,,) VORE_N () (0) (0,) () (0) (0) (0) (0) (0) (0) VORE_N VORE_N VM VRON_VP PM_PRLPVR NU_ 0.UF 0V 0% MT00 XR TPPU0 PM_PI0 VR_VI0 VR_VI VR_VI VR_VI VR_VI VR_VI 00K % /W 00 R K 0.% /W 00 R R (,,,,,,,,,0,,,,).KΩ % /W MF MT00 00pF 0V 0% 00 XR 00KΩ % /W MF MT00 VORE_N R 0 % /W 00 R 0 % /W 00 0 UF 0V 0% MT00 XR R 0 % /W 00 R0 0 % /W 00(NU) R 0 % /W 00.K % /W 00 R R 0 0.0uF V 0% 00 XR TuF V ±0% 0mΩ TQM NYO(NU) R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R0 0 % /W 00 R 0 % /W 00.K % /W 00 R 0uF V ±0% MT0 X TMK0KL-T TIYO VORE_N NU_ 0.UF 0V 0% MT00 XR 00 R 0uF V ±0% MT0 X TMK0KL-T TIYO VM 0 % /W 00 VORE_N NU_00pF 0V 0% M00 XR R NU_0 % /W 00 0 0uF V ±0% MT0 X TMK0KL-T TIYO U V OUT V FET N EN REN EN# VI0 VI VI VI VI VI POO E OMP F 0uF V ±0% MT0 X TMK0KL-T TIYO 0.µF 0% V 00 XR VORE_N VT IEN PHE U OOT P L VP 0.0uF 0V ±0% MT00 N N N N N N VEN RV TV OET LNR-I ILV-T TOP PIN INTERIL 0 OFT 0 uf V 0% 0 XR VORE_N.uF V ±0% MT00 XR EJFEM PNONI IOE TKY HH-0 0V HENMKO P N K % /W 00 R VORE_N.K 0.% /0W MT00(NU) R R 0 % /W 00 uf 0V 0% 00 XR 0 0pF 0V % MT00 XR 0 00pF 0V 0% 00 XR 0mil 0.uF 0V 0% 00 XR R. % /W MT00 0.KΩ % /W F MT00 R0 VORE_N Q TR M-FET-N O0 0V TO- PIN O 0mil R.KΩ % /W MF MT00 0mil R KΩ % /W MT00 Lead-Free Q TRN M-FET-N O 0V TO- PIN O R mω 0% W MTRL0WT-R00-M YNTE Q TRN M-FET-N O 0V TO- PIN O IOE TKY M0 0V O- (M) EO 0.uH 0 PM0T-RM00 ±0% TK L 000pF 0V 0% 00 XR oost Voltage.V eeper leep Voltage 0.V R m % W 0 RL0WT-R00-J YNTE VORE_PU For anias eleren PU 0 uf 0-0% V 00 YV(NU) IOE ZENER RLZ..V 0.0 % 0.W VORE_PU (0,,) OP etting.iocset=.v/(.k.kk)=0u.isen=0u/(/)/0.=.u.isen*rsence=iocp*rds_on (Lowside) Iocp=(Isen*Rsence)/Rds_on (Lowside) R K % /W 00 R 0K % /W 00 Q0 TR M-FET-N N00E 0V OT- ILIONIX 0 % /W 00 R K0_PWR0 () Q TR M-FET-N N00E 0V OT- ILIONIX VORE_ON () R lose R VI VI VORE_N 0 % /W 00 IMVP IV Load line slope : -mv/ Vdroop : *mv/=mv Idroop : mv/.0k=.u.u/0./0. =.u Rds(on) *Io = Isen * Rsen (m/)*=.u*rsen R =.K First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev Vcore 0. Wednesday, January, 00 ate: heet of
THERML ENOR (,,,,,,,,,0,,,,) VM 0mil R0 Q0 *TRN M-FET-P I0 MT OT- VIHY-ILIONIX(NU) 0mil 0K % /W 00(NU) 0.uF V 0-0% 00 YV(NU) R K % /W 00 (NU) Trace=0mil and together () K_FN_ON Q NPN TWU 0V 00m MT ROHM(NU) E (,,,,,,,,,0,,,,) VM (,,,,,,,,,0,,,,) VM R (,) HOT_OWN () QMLK_PMU () QMT_PMU (,,,,,,,,,,,,) R 0 % /W 00 R 0mil 0K % /W 00 V R 0K % /W 00 R 0K % /W 00 0mil 0mil 0 U LNR-I U OP-L PIN MT Test V THERM# L FN F V THERM_ET XP N 0K % /W 00 TRE 0MIL 00MHZ 00Ω % MT00 H0K-0T0 ULL WILL L N L 00MHZ 00Ω % MT00 H0K-0T0 ULL WILL R00 0K % /W 00 R 00 % /0W 00 0.uF V 0-0% 00 YV ON ENTERY MT PIN P=. 0-0 0--00 V (,,,,,,,,,,) THERM () trace0mil and together 00pF 0V 0% 00 XR THERM ().Far away the RT,clock generator,memory bus,pi bus..s close PU as possible. N 0 mil 0 mil THERM MINIMUM 0 mil 0 mil THERM N LERT# (0) ULKO LK XP N N First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev Thermal / FN NN 0. Wednesday, January, 00 ate: heet of
(0,,,,,,).VM U Note: RT_Red,RT_reen,RT_lue (,) are groud reference (,) (,0) () () () () () () () () () () () () () () () () () () () () () () () () () () () TV TV TV VELK VET LUE LV_TXOUT_UP LV_TXOUT_UP LV_TXOUT_U0P LV_TXOUT_UN LV_TXOUT_UN LV_TXOUT_U0N LV_TXOUT_LP LV_TXOUT_LP LV_TXOUT_L0P LV_TXOUT_LN LV_TXOUT_LN LV_TXOUT_L0N () () REEN RE VYN HYN LV_ENL LV_ENKL _PT _PLK LV_TXLK_LN LV_TXLK_LP LV_TXLK_UN LV_TXLK_UP MH_LK_PLL0 MH_LK_PLL 0 % /W 00(NU) 0 % /W 00(NU) 0 % /W 00(NU) R R R 0 % /W 00(NU) 0 % /W 00(NU) 0 % /W 00(NU) N_L_RIHTNE N_LTL_LK N_LTL_T R R R LUE REEN RE R % /W 00 R % /W 00 R 0 % /W 00(NU) R 0 % /W 00(NU) R R0 R R0 R % 00 N_LVIO_H N_LVIO_H.K % /W MT00 LUE# REFET REEN# RE# LI N_M_ N_M_F N_M_F 0 % /W 00(NU) 0 % /W 00(NU) 0 % /W 00(NU) H H J E E E 0 0 H J0 F F F F E F F 0 VOTRL_T VOTRL_LK LKN LKP TV_ TV_ TV_ TV_REFET TV_IRTN TV_IRTN TV_IRTN LK T LUE LUE# REEN REEN# RE RE# VYN HYN REFET LI LV LVREFH LVREFL LVEN PNELKLTEN PNELKLTTL PT PLK LTLLK LTLT ILKN ILKP ILKN ILKP LTP LTP LTP0 LTN LTN LTN0 LTP LTP LTP0 LTN LTN LTN0 MI V TV LV PI-EXPRE RPHI EXP_OMPI EXP_IOMPO EXP_RXN0 EXP_RXN EXP_RXN EXP_RXN EXP_RXN EXP_RXN EXP_RXN EXP_RXN EXP_RXN EXP_RXN EXP_RXN0 EXP_RXN EXP_RXN EXP_RXN EXP_RXN EXP_RXN EXP_RXP0 EXP_RXP EXP_RXP EXP_RXP EXP_RXP EXP_RXP EXP_RXP EXP_RXP EXP_RXP EXP_RXP EXP_RXP0 EXP_RXP EXP_RXP EXP_RXP EXP_RXP EXP_RXP EXP_TXN0 EXP_TXN EXP_TXN EXP_TXN EXP_TXN EXP_TXN EXP_TXN EXP_TXN EXP_TXN EXP_TXN EXP_TXN0 EXP_TXN EXP_TXN EXP_TXN EXP_TXN EXP_TXN EXP_TXP0 EXP_TXP EXP_TXP EXP_TXP EXP_TXP EXP_TXP EXP_TXP EXP_TXP EXP_TXP EXP_TXP EXP_TXP0 EXP_TXP EXP_TXP EXP_TXP EXP_TXP EXP_TXP E0 F 0 H J0 K L0 M N0 P R0 T U0 V W0 Y 0 E F0 H0 J K0 L M0 N P0 R T0 U V0 W E F H J K L M N P R T U V W Y E F H J K L M N P R T U V W 0 0 0 R0. % /W MF 00 N_PE_RXP () N_PE_RXP () N_PE_RXP () N_PE_RXP () N_PE_RXP () N_PE_RXP0 () N_PE_RXP () N_PE_RXP () N_PE_RXP () N_PE_RXP () N_PE_RXP () N_PE_RXP () N_PE_RXP () N_PE_RXP () N_PE_RXP () N_PE_RXP0 () N_PE_RXN () N_PE_RXN () N_PE_RXN () N_PE_RXN () N_PE_RXN () N_PE_RXN0 () N_PE_RXN () N_PE_RXN () N_PE_RXN () N_PE_RXN () N_PE_RXN () N_PE_RXN () N_PE_RXN () N_PE_RXN () N_PE_RXN () N_PE_RXN0 () MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 MO-P 0.uF 0V 0% XR MT00 V_PE_RXP () V_PE_RXP () V_PE_RXP () V_PE_RXP () V_PE_RXP () V_PE_RXP0 () V_PE_RXP () V_PE_RXP () V_PE_RXP () V_PE_RXP () V_PE_RXP () V_PE_RXP () V_PE_RXP () V_PE_RXP () V_PE_RXP () V_PE_RXP0 () V_PE_RXN () V_PE_RXN () V_PE_RXN () V_PE_RXN () V_PE_RXN () V_PE_RXN0 () V_PE_RXN () V_PE_RXN () V_PE_RXN () V_PE_RXN () V_PE_RXN () V_PE_RXN () V_PE_RXN () V_PE_RXN () V_PE_RXN () V_PE_RXN0 () REFET LUE REEN RE LUE# REEN# RE# ().VM_RT R 0 % /W 00(NU) R00 0 % /W 00(NU) R0 0 % /W 00(NU) R0 0 % /W 00(NU) R0 0 % /W 00(NU) R 0 % /W 00 R0 0 % /W 00(NU) R 0 % /W 00 R0 0 % /W 00(NU) R 0 % /W 00 I LVIO MH F PIN INTEL.K % /W 00 R LI PM OM: R0, R, R, R 0ohm 00 R, R, R0 (NU) R, R00, R0, R0 0ohm 00 R0, R0, R0 0ohm 00 R, R, R, R (NU) R (NU) M OM: R, R, R 0ohm % R0.K % R, R00, R0, R0 (NU) R0, R0, R0 (NU) R, R, R 0ohm 00 R, R ohm % R, R (NU) R, R, R0 0ohm % R.Kohm % First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev LVIO(LV/PIE/V/TV/MI) 0. Wednesday, January, 00 ate: heet of
(,,) VP_MH For ITP Port used only TL_PM0 () TL_PM0 () () () () () Laout note: Route as short as possible MI_TXN[..0] MI_TXP[..0] MI_RXN[..0] MI_RXP[..0] () () () () R 0. % /W 00 () () () () () () (,) () MH_MLK_R0 MH_MLK_R MH_MLK_R MH_MLK_R MH_MLK_R00 MH_MLK_R0 MH_MLK_R0 MH_MLK_R0 () () () () () () () () (,,) MH_M_KE0 MH_M_KE MH_M_KE MH_M_KE MH_M_00 MH_M_0 MH_M_0 MH_M_0 M_OOMP0 M_OOMP MH_OT0 MH_OT MH_OT MH_OT R_VREF Laout note: Route as short as possible R 0. % /W 00 MI_TXN0 MI_TXN MI_TXN MI_TXN MI_TXP0 MI_TXP MI_TXP MI_TXP MI_RXN0 MI_RXN MI_RXN MI_RXN MI_RXP0 MI_RXP MI_RXP MI_RXP N_LVIO_E N_LVIO_0 N_LVIO_E0 N_LVIO_0 MH_ROMP0 MH_ROMP Y Y M L E J F 0 N K E0 J F 0 P M H K N M H F F P L M N0 K0 K F MH_MXLEW E E MH_MYLEW F F0 U MIRXN0 MIRXN MIRXN MIRXN MIRXP0 MIRXP MIRXP MIRXP MITXN0 MITXN MITXN MITXN MITXP0 MITXP MITXP MITXP M_K0 M_K M_K M_K M_K M_K M_K0# M_K# M_K# M_K# M_K# M_K# M_KE0 M_KE M_KE M_KE M_0# M_# M_# M_# M_OOMP0 M_OOMP M_OT0 M_OT M_OT M_OT MROMPN MROMPP MVREF0 MVREF MXLEWIN MXLEWOUT MYLEWIN MYLEWOUT MI R MUXIN N LK PM F/RV F0 F F F F F F F F F F0 F F F F F F F F F F0 RV RV RV RV RV RV RV M_UY# EXT_T0# EXT_T# THRMTRIP# PWROK RTIN# REFLKN REFLKP REF_LKN REF_LKP N0 N N N N N N N N N N0 H F F E J E E H H J H J 0 F0 F F F F F F F F0 F F F F F F F F F F0 RV RV RV RV RV RV RV R J J PM_EXTT00 H PM_EXTT0 F 0 E R 00 % /W 00 P N P P P N R 0K % /W 00 R 0 % /W 00(NU) 0 % /W 00(NU) N_LVIO_P N_LVIO_N N_LVIO_P N_LVIO_P N_LVIO_P N_LVIO_N N_LVIO_ N_LVIO_ N_LVIO_ N_LVIO_ N_LVIO_ T T T T T T T T T T0 T T T T T T T T T T0 T T T T T T T PM_MUY0 (0) PM_EXTT00 MH_EL () MH_EL0 () THRMTRIP0 (,0) PM_VTE (,0) PLT_RT0 (,0,,) F[:0] 0k ohms pull up or pull down or direct connect form processor T MO-P 0.uF 0V 0% XR MT00 INTEL UETE MH_REFLK0 () MH_REFLK () MH_LK0 () MH_LK () MH_LK MH_REFLK MH_REFLK0 MH_LK0 M OM: R, R0, R, R (NU) PM OM: R, R0, R, R 0ohm 00 (0,,,,,,).VM 0 % /W 00(NU) R R 0 % /W 00(NU) 0 % /W 00(NU) R R0 0 % /W 00(NU) (,,,,,).VM I LVIO MH F PIN INTEL (,,,,) R_.V R PM_EXTT00 0K % /W 00 R PM_EXTT0 0K % /W 00 F F LOW=MIx HIH=MIx R0.K % /W 00(NU) F R.K % /W 00 F F (V EL) R.K % /W 00(NU) (,,,,,) LOW=.0V HIH=.V.VM R K % /W 00(NU) F (R trap) LOW=R N=R F R 0. % 00 MH_ROMP0 MH_ROMP F F PIE raphics Lane F LOW=Reverse Lane HIH=Normal operation R.K % /W 00(NU) F (F ynamic OT) R.K % /W 00 LOW=T/Transportable PU HIH=Mobile PU (,,,,,).VM R K % /W 00(NU) F LOW=.0V (VTT EL) HIH=.V F R 0. % 00 F (PU trap) LOW=T/Transportable PU HIH=Mobile PU F[:] have internal pullup resistors F[:] have internal pulldwon resistors First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev LVIO(MI/LK/PM) 0. Wednesday, January, 00 ate: heet of
LVIO(UL R) 0. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- Wednesday, January, 00 T < othan M IH-M > ize ocument Number Rev ate: heet of First International omputer, Inc. M_M0 M_QM M_M M_M M_M M_M M_M0 M_M M_M M_QM M_QM M_QM0 M_Q M_QM M_Q M_Q M_Q M_M M_QM M_Q0 M_Q M_M M_M M_Q M_Q M_M M_M M_QM M_QM M_T M_T M_T M_T0 M_T M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T0 M_T M_T M_T M_T M_T M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T M_T0 M_T M_T M_T M_T M_T M_T M_T0 M_T M_T M_T0 M_T M_T M_T M_T M_T M_T M_T M_M N_M_RVENIN0 N_M_RVENOUT0 M_QM M_T M_T M_T M_T M_M M_M M_T0 M_T M_T M_T M_T0 M_T M_QM M_T M_T M_T M_T M_QM M_M0 M_M M_T M_T M_T M_T0 M_Q M_T M_Q M_M M_Q M_T M_T M_T M_M M_T M_QM M_T M_T M_M M_T M_T0 M_M M_M0 M_Q M_T M_T M_Q M_M M_T M_T0 M_T M_T M_T M_T M_T M_T M_T M_Q M_M M_QM0 M_T M_T M_T M_T M_T M_T M_M M_M M_T M_T M_Q M_T0 M_QM M_T M_T0 M_QM M_T M_T M_T M_T M_T M_T M_T M_M M_T M_T M_T M_Q0 M_T M_QM M_T M_T M_T M_T N_M_RVENIN0 N_M_RVENOUT0 M_QN M_QN M_QN M_QN M_QN M_QN M_QN M_QN0 M_QN0 M_QN M_QN M_QN M_QN M_QN M_QN M_QN M_T[..0] () M_T[..0] () M_Q[..0] () M_M[..0] () M_QM[..0] () M_Q[..0] () M_QM[..0] () M_M[..0] (,) M_QN[..0] () M_QN[..0] () M_R0 () M_WE0 () M_0 () M_0 () M_00 () M_0 () M_WE0 () M_0 () M_00 () M_R0 () M_0 () M_0 () R YTEM MEMORY U I LVIO MH F PIN INTEL E E E E F F0 H H K 0 H J K0 J0 H H K H0 H F J K H H J 0 H H H0 J K J K J H K J J K H E H K H J K J K H J0 H0 J 0 F K J K M0 H F H H K F K K J0 K K E F F F K K J L0 H F J Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ Q0 Q Q Q Q Q Q Q WE# # R# M0 M M M M M M M RVENOUT# RVENIN# M_ Q0# Q# Q# Q# Q# Q# Q# Q# 0# # # R YTEM MEMORY U I LVIO MH F PIN INTEL H L L H J K L M N P M M M L M N P N P L0 M0 M L P M M M L M N P M L L P P P0 L M N N N P P M L M K K L M H F E F F L P P M N M L P0 M L0 M N0 M0 K P N P M M J E P N P J P P P L P J F F M K P N0 N N M H E K K L Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ Q0 Q Q Q Q Q Q Q WE# # R# M0 M M M M M M M RVENOUT# RVENIN# M_ Q0# Q# Q# Q# Q# Q# Q# Q# 0# # #
(,,) VP_MH UE (,,) (,,) (,,) MH_HXROMP R 00 % /W 00 VP_MH R 00 % /W 00 R % /W 00 VP_MH MH_HXWIN R % /W 00 MH_HYWIN MH_HXOMP VP_MH MH_HYOMP R. % /W MF 00 0.uF V 0-0% 00 YV 0.* VP 0.* VP 0.uF V 0-0% 00 YV R. ±% /W 00 R. ±% /W 00 () TL_H0[..] TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 () TL_HREQ0[..0] TL_HREQ00 TL_HREQ0 TL_HREQ0 TL_HREQ0 TL_HREQ0 () TL_T00 () TL_T0 () MH_LK0 () MH_LK MH_HYROMP MH_HYOMP MH_HYWIN MH_HXROMP MH_HXOMP MH_HXWIN () TL_TN00 () TL_TN0 () TL_TN0 () TL_TN0 () TL_TP00 () TL_TP0 () TL_TP0 () TL_TP0 () TL_INV00 () TL_INV0 () TL_INV0 () TL_INV0 () TL_PURT0 MH_HVREF N_MH_HERY0 () TL_PWR0 N_MH_HPREQ0 R (,) PU_LP0 0 % /W 00 For step PU E 0 F 0 E0 0 E F0 0 F E F E T L P K R V K R W H K T U H0 J F H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# HREQ0# HREQ# HREQ# HREQ# HREQ# HT0# HT# HLKINN HLKINP HYROMP HYOMP HYWIN HXROMP HXOMP HXWIN HTN0# HTN# HTN# HTN# HTP0# HTP# HTP# HTP# HINV0# HINV# HINV# HINV# HPURT# HVREF HERY# HPWR# HPREQ# HPULP# HOT H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# HTRY# HRY# HEFER# HHITM# HHIT# HLOK# HREQ0# HNR# HPRI# HY# HR0# HR# HR# E E F H E F E K F J J H F K H H H K K J H J L K J P L J P L U V R R P T R R U R T T R T V U W U V W W U U Y Y V Y W W Y Y W F F E E TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H0 TL_H00 TL_H0 TL_H0 TL_H0 TL_H0[..0] () TL_0 () TL_TRY0 () TL_RY0 () TL_EFER0 () TL_HITM0 () TL_HIT0 () TL_LOK0 () TL_R00 () TL_NR0 () TL_PRI0 () TL_Y0 () TL_R00 () TL_R0 () TL_R0 () MH_HYROMP R0 I LVIO MH F PIN INTEL. % /W MF 00 (,,) VP_MH R 00 % /W 00 MH_HVREF / * VP R 00 % /W 00 First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev LVIO(HOT) 0. Wednesday, January, 00 ate: heet of
,,,,),,,,),,,,).VM.VM.VM () V.VM_LV V.VM_LV V.VM_TXLV (0,,,,,,).VM PM OM: L0, L0, L, L, L (NU),, 0,, (NU), R, R, R0, (NU),,,,, 0ohm 00 R, (NU) R 0ohm 00 VORE_MH R 0 % /W 00 0.uF V 0% 00 XR R0 0 % /W 00 0.uF V 0% 00 XR R0 0 % /W 00 0.uF V 0% 00 XR 0uF.V 0% 00 XR TIYO () (,,,,,) (,0,,0,,,).VM Layot note: _RT Route caps within 0 mil of LVIO. Route F within " of LVIO VP () 0 0.0uF V 0% 00 XR VORE_MH VORE_MH R P VP (,0,,0,,,) 0m 0 % /W F MT00 (,,) R 0 % /W 00 R0 VP_MH T 0uF.V ±0% mω MT LOW ER PL0EM() NE T 0uF.V ±0% mω MT LOW ER PL0EM() NE(NU) L uh±% m NL0T-R0J TK.uF 0V 0-0% 00 YV JP JUMPER_P IOE RV-0 0V 0m UM ROHM N R 0 % /W 00 K % /W 00 0uF.V 0% 00 XR TIYO 0 0uF.V 0% 00 XR TIYO T 0uF.V ±0% mω MT LOW ER PL0EM() NE T 0uF.V ±0% mω MT LOW ER PL0EM() NE UE E 0 OHM L () 00MHZ 0Ω 00 FM0K-T0.VM_YN 0.uF V 0% 00 XR 0uF.V 0% 00 XR TIYO 0.uF V 0% 00 YV 0.uF V 0% 00 YV L uh±% m NL0T-R0J TK T 0uF.V ±0% mω MT LOW ER PL0EM() NE L 0uH±% m NL0T-00J TK R 0 % /W 00 0 0.uF V 0% 00 YV 0.uF V 0% 00 XR L0 0uH±% m NL0T-00J TK.VM_RT R 0 % /W 00(NU) m 0m 0m 0m 0m m ().VM_PLL.VM_PLL.VM_HMPLL Route _RT gnd form MH to decoupling cap ground lead and then connect to the gnd plane 0 T 0uF.V ±0% mω MT LOW ER PL0EM() NE(NU) T 0uF.V ±0% mω MT LOW ER PL0EM() NE(NU) 0.uF V 0% 00 XR 0.uF V 0% 00 XR 0.uF V 0% 00 XR 0.uF V 0% 00 XR 0.uF V 0% 00 XR 0.uF V 0% 00 XR 0.uF 0V 0% 00 XR 0.uF 0V 0% 00 XR 0 nf V ±0% 00 XR.VM_MPLL VP_MH_P VP_MH_P VP_MH_P VP_MH_P V_MH UF T V0 R V N V M V K V J V V V U V T V R V P V0 N V M V L V K V J V H V V V V U V T V0 R V P V N V M V L V K V J V H V K V H V0 K V J V K V K V K V K V W0 V U0 V T0 V K0 V0 V V U V K V W V V V T V K V K V VHPLL VMPLL VPLL VPLL VHMPLL0 VHMPLL F V_RT0 E V_RT _RT H0 VYN K VTT0 J VTT K VTT W VTT V VTT U VTT T VTT R VTT P VTT N VTT M VTT0 L VTT K VTT W0 VTT V0 VTT U0 VTT T0 VTT R0 VTT P0 VTT N0 VTT M0 VTT0 K0 VTT J0 VTT Y VTT W VTT U VTT R VTT P VTT N VTT M VTT L VTT0 J VTT N VTT M VTT N VTT M VTT N VTT M VTT VTT N VTT M VTT0 N VTT M VTT N VTT M VTT N VTT M VTT VTT V VTT N VTT M VTT0 VTT POWER VTV0 VTV VTV0 VTV VTV0 VTV VTV TV VTV VQTV VHV0 VHV VHV VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM0 V0 V V V V V V VTXLV VTXLV VTXLV0 VLV VLV VLV0 VLV VPLL0 VPLL VPLL V F E F E H H.VM_TV 0 MV._R_P 0.uF V 0% 00 XR HV._R_P 0.uF V 0% 00 XR P V._R_P 0.uF V 0% 00 XR P Note: N 0 M ll VM L pin K J shorted H internally.v_qtv F E P N M L K J H m.v_hv F E E E E E E0 () MH_R_.V E E E E H. E E H. P N M L K J H F E P N M L K J H F E Note: ll VM pin shorted internally 0 P V._R_P M V._R_P 0.uF V 0% 00 XR E V._R_P 0.uF V 0% 00 XR 0.uF V 0% 00 XR F F P F0 0.uF V 0% 00 XR E W U R N L J Y Y Y F 0m 0m 0m.VM_ 0.uF V 0% 00 XR.VM_TV V.VM_TXLV V.VM_LV 0.uF V 0% 00 XR 0.uF V 0% 00 0.uF XR V 0% 00 0.uF XR V 0% 00 0.uF XR V 0% 00 XR 0.uF V 0% 00 XR nf V ±0% 00 XR nf V ±0% 00 nf XR V ±0% 00 nf XR V ±0% 00 nf XR V ±0% 00 XR nf V ±0% 00 XR.VM_PLL V.VM_LV PLL_R_L.VM_RLL 0.m.VM_TV.VM_TV IOE RV-0 0V 0m UM ROHM L N P.VM (0,,,,,,) 00MHZ 0Ω 00 FM0K-T0 0 R.VM_TV 0 % /W 00 L 0 % /W 00.VM_TV R VM (,,0,,,,,,,,0,,,,,,, 00MHZ 0Ω 00 FM0K-T0 0 00 0uF 0% 0V 0 XR 0uF 0% 0V 0 XR T 0uF.V ±0% mω MT LOW ER PL0EM() NE(NU) 0 0uF 0% 0V 0 XR 0.uF V 0% 00 XR R 0 % /W F MT00 00MHZ 0Ω 00 FM0K-T0 L 00MHZ 0Ω 00 FM0K-T0 0.uF V 0% 00 XR(NU) R RLL_L PLL_F_L uh±% m NL0T-R0J TK.VM (,,,,,) 0 % /W 00 R 0 % /W 00 0uF 0% 0V 0 XR 0.uF V 0% 00 XR T 0uF.V ±0% mω MT LOW ER PL0EM() NE 0 L L 00MHZ 0Ω 00 FM0K-T0 0.uF V 0% 00 XR(NU) 00MHZ H 0. 00MHZ H 0. MHZ H 0. MHZ H 0. R 0 % /W 00.VM (0,,,,,,).VM (,,,,,) R_.V (,,,,) R 0 % /W 00 P-P uf V ±0% ER:mΩ H=.mm EEFF00R PNONI L R 0 % /W 0 R0 0 % /W 00.VM (0,,,,,,).VM_PIE 0 % /W 00 PIE_L R.VM (0,,,,,,) 0uF 0% 0V 0 XR 0 R 0 % /W 00 P-P uf V ±0% ER:mΩ H=.mm EEFF00R PNONI 0uF 0% 0V 0 XR.VM (0,,,,,,) 0.uF 0V 0% MT00 XR TIYO.uF.V ±0% 00 0XR0JK TK I LVIO MH F PIN INTEL First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev LVIO(POWER) 0. Wednesday, January, 00 ate: heet of
LVIO(/NTF) 0. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- Wednesday, January, 00 T < othan M IH-M > ize ocument Number Rev ate: heet of First International omputer, Inc. VP_MH (,,) V_MH () MH_R_.V () NTF UH I LVIO MH F PIN INTEL 0 0 W V U T R P N M L W V U T R P N M L W V U T R P N M L W V U T R P N M L W V U T R P N M L W V U T P N M L Y0 R0 P0 N0 M0 L0 Y R P N M L Y R P N M L W V U T P N M L W V U T R P N M L W V U T R P N M L Y Y Y Y Y Y R 0 0 Y R Y W V U T R P N M L Y W V U T R P N M L Y W V U T R P N M L Y Y VMNTF0 VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF0 VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF0 VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF VMNTF0 VMNTF VNTF0 VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF0 VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF0 VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF0 VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF0 VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF0 VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF0 VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF0 VNTF VNTF VNTF VNTF VNTF VNTF VNTF VNTF VTTNTF0 VTTNTF VTTNTF VTTNTF VTTNTF VTTNTF VTTNTF VTTNTF VTTNTF VTTNTF VTTNTF0 VTTNTF VTTNTF VTTNTF VTTNTF VTTNTF VTTNTF VTTNTF NTF0 NTF NTF NTF NTF NTF NTF NTF NTF NTF NTF0 NTF NTF NTF NTF NTF NTF NTF NTF NTF NTF0 NTF NTF NTF NTF NTF NTF NTF NTF NTF NTF0 NTF NTF NTF NTF NTF NTF NTF NTF NTF NTF0 NTF NTF NTF NTF NTF NTF NTF NTF NTF NTF0 NTF NTF NTF NTF NTF NTF NTF NTF NTF NTF0 NTF NTF NTF NTF NTF NTF NTF NTF U I LVIO MH F PIN INTEL Y V T P M K H E N L J F E E Y W V U T R P N M L K J H F E N H L F W V U T R P N M L K J H F E N J Y L W V U T R P N M L K J H F E P0 E0 0 0 0 Y0 0 M J V U P L H F E W E N L J F W E J J F F H L H J E N F F K0 V0 0 F0 E0 0 0 N W T J H L U N J F L K H K N L J W K J F J N L J F Y H F 0 Y0 L0 0 N H E V T K H L Y P L E N K V J E T P L J P L W E N F Y U P L H J N L H E V T P L J E N L J Y 0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LV 0
PIE ignal Topologies and Routing uidelines (,,) PI_[..0] (,,) PI_/E00 (,,) PI_/E0 (,,) PI_/E0 (,,) PI_/E0 (,0) PI_NT00 (,0) PI_NT0 (,0) PI_NT0 (0) PI_NT0 (0,) PI_NT0 (0) PI_NT0 (0) FM_WP (0) PI_REQ00 (,0) PI_REQ0 (,0) PI_REQ0 (0) PI_REQ0 () PI_REQ0 (0) PNEI (0) PNEI0 () LK_IHPI (,,0,) PI_EVEL0 (,,0,) PI_FRME0 (,,0,) PI_IRY0 (,,) PI_PR (,,0,) PI_PERR0 (0) PI_LOK0 (,0,) PI_Q_PME0 (,,,,0,,) PI_RT0 (,,0,) PI_ERR0 (,,0,) PI_TOP0 (,,0,) PI_TRY0 PLT_RT0 (,0,,) PLT_RT0 (0,,) LP_0 (0,,) LP_ (0,,) LP_ (0,,) LP_ (0) LP_RQ00 (0) LP_RQ0 (0,,) LP_FRME0 LP_QPME0 (,,,) IH_MT (,,,) IH_MLK (0,,,,,0,,,,,,) V (,,0,,,,,,,,0,,,,,,,,0,,,,,0,,,,) VM PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ R 0K % /W 00 R 0K % /W 00 R R0 0K % /W 00 0K % /W 00 R00 0K % /W 00 E E F F E F E H J K K L H H H M K K L K J H F E F L M F E J E E P R J J R P N N N N P P W Y W Y U W U 0 0 0 0 /E0# /E# /E# /E# NT0# NT# NT# NT# NT#/PO NT#/PO NT#/PO REQ0# REQ# REQ# REQ# REQ#/PI0 REQ#/PI REQ#/PI0 PILK EVEL# FRME# IRY# PR PERR# PLOK# PME# PIRT# ERR# TOP# TRY# PLTRT# L0 L/F L/F L/F LRQ0# LRQ#/PI LFRME# MLERT#/PIO LINKLERT# MT MLK MLINK MLINK0 MHYN# PI us I/F PU I/F Interrupt I/F LP/FWH EEPROM I/F ystem Managent I/F LN I/F I -IH-M 0PIN INTEL IRET MEI INTERFE PI EXPRE HIN0 HIP0 HON0 HOP0 HIN HIP HON HOP HIN HIP HON HOP HIN HIP HON HIOP MIRXN0 MIRXP0 MITXN0 MITXP0 MIRXN MIRXP MITXN MITXP MIRXN MIRXP MITXN MITXP MIRXN MIRXP MITXN MITXP MILKN MILKP MIZOMP MIIROMP 0TE 0M# PLP# PRTP# FERR# INNE# INIT# INT_V# INTR NMI PUPWR/PO RIN# PULP# MI# TPLK# INT_PIRQ# INT_PIRQ# INT_PIRQ# INT_PIRQ# INT_PIRQE#/PI INT_PIRQF#/PI INT_PIRQ#/PI INT_PIRQH#/PI EEP_ EEP_IN EEP_OUT EEP_HLK LN_RX0 LN_RX LN_RX LN_TX0 LN_TX LN_TX LN_RT# LN_RTYN LN_LK H H K K J J M M L L P P N N T T R R V V U U Y Y W W F F F F E F F E F E E N L M L M F E E E V F N_IH_H N_IH_H N_IH_ N_IH_ N_IH_K N_IH_K N_IH_J N_IH_J TP TP0 TP TP MI_RXN0 () MI_RXP0 () MI_TXN0 () MI_TXP0 () MI_RXN () MI_RXP () MI_TXN () (0,,,,,,) MI_TXP () MI_RXN () MI_RXP () MI_TXN () MI_TXP () MI_RXN () MI_RXP () MI_TXN () MI_TXP (,0,,0,,,) () LK_PIE_IH0 () LK_PIE_IH () R0 0 % /W 00 R 0 % /W 00 R % /W 00 R0 0 % /W 00 R0 0 % /W 00 R LN_RX0 LN_RX LN_RX LN_TX0 LN_TX LN_TX 0 % /W 00(NU) LN_RTYN LN_PHY_LK.VM VP R % /W 00 TP TP TP TP R0. % /W MF 00 othan- R0 non-stuff othan- R must be stuffed PI_IRQ0 (,,0) PI_IRQ0 (,,0) PI_IRQ0 (,,0,) PI_IRQ0 (0) TP0 TP P0 RII () PLT_RT0 (,0,,) IH_0TE () PU_0M0 () PU_PLP0 () PU_PRTP0 () PU_FERR0_O () PU_INNE0 () PU_INIT0 () FWH_INIT0 (0) PU_INTR () PU_NMI () PU_PWROO () PU_RIN0 (,0) PU_LP0 (,) PU_MI0 () PU_TPLK0 () TP TP TP TP0 ignal PIE Topology IH-M TX Package Length Range PIE evice L Min 0." Max." Topology IH-M TX TRE WITH mils (stripline) mils (microstrip) P P Package Length Range NEWard ONN L Min 0." Max." TX L L L Max." - L L PE mils (differential) 0 mils (pair to pair) L Max." - L L Min 0." Max." L L L L TRE MUTHIN /- mils Impedance 00 ohms /-0% PIE evice Package Length Range IH-M RX P L ap Max." - L nf ~00nF /-0% 00 or 00 L Min 0." Max " MI ignal Topologies and Routing uidelines L L L NEWard ONN Package Length Range IH-M RX ap P nf ~00nF /-0% 00 or 00 RX R 0K % /W 00 P Package Length Range L L L P Package Length Range RX P TX P ignal MI TRE WITH mils (stripline) mils (microstrip) PE mils (differential) 0 mils (pair to pair) 0 mils (non-pie signal) TRE MUTHIN /- mils Impedance 00 ohms /-0% First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev IH (PI / PIE / PU / IRQ / Lan ) / 0. Wednesday, January, 00 ate: heet of
(,,,,,,,,,,0,,,,,,,,0,,,,,0,,,,) (,,,,,0,,,,,,) V VM (,,,,,0,,,,,,) V (,,,,,0,,,,,,) U.0 Trace Length uide Low-peed ignal round P 0 mil mil mil mil ignals Reference () () M ITP_REET0 0 mil PowerOK V PM_PRLPVR P M mil mil mil U.0 Routing Requirements / Impedance on (stripline) on (microstrip) 0 Ohms /- % ifferential lock/ High peed ignal 0 mil M Trace Length ~ inches ignal Mismatch Max mismatch be tween in adata pairs is /- mils No pair to pair length matching requirements () () () URI/URI# Routing on () URI (,,,,,0,,,,,,) Requirements Maximum Trace Length 00 mil URI# Impedance 0 Ohms /- % 00 mil (,,,,,0,,,,,,) V (,,,,,,,,,,0,,,,,,,,0,,,,,0,,,,) VM Q_MI0 E_I0 PI,PI (VM) PI,PI (V) (,) INVEN L_ENKL PO (VM) efault: HIH () T_ON POP[:] (VM) efault: HIH PO (VM) efault: LOW PIO (V) efault: HIH PIO (V) efault: HIH PIO[:] (V) efault: HIH PIO[:] (VM) efault: HIH () () (,,,) PU0 R K % /W 00 (,,,,0) () PI_LKRUN0 () () (,,,,0,,) PM_MUY0 MINW00_IH () PM_RI0 () PM_RMRT0 (,,,0) (0,,) _ITLK (,) _RT0 () _IN0 () _IN (,) (,) (,) () PM_TLOW0 UTT_0 _OUT _YN TPPU0 TPPI0 (,) PM_UTT0 (,,,,,,,,,,0,,,,,,,,0,,,,,0,,,,) (,,,,,,,,,,0,,,,,,,,0,,,,,0,,,,) 0.uF V 0-0% 00 YV (NU) R 0K % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W F MT00(NU) VM R R R R 0 % /W 00 PM_LP_0 VM PIE_WKE0 PI_ERIRQ (,) PM_VTE R 0K % /W 00 _OUT () () () () () () () () () () () () R 0K % /W 00(NU) U L-I N0PX 0- PIN FIRHIL(NU) U0_P0 U0_P0- U0_P U0_P- U0_P U0_P- U0_P U0_P- U0_P U0_P- U0_P U0_P- U0_P U0_P- R 0K % /W 00 R 0K % /W 00(NU) (,) O00 O0 O0 O0 V R 0K % /W 00(NU) () 0K % /W 00(NU) R R 0K % /W 00(NU) R0.K % /W 00 REET_TI WIRELE_RFON N_IH_0 Y_PWROK R 00 % /W 00 R0 00 % /W 00 R0 0 % /W 00 0 % /W 00(NU) 0 % /W 00(NU) R.K % /W 00 0 % /W 00 R 00 % /W 00 R 00 % /W 00 _THRM0 N_IH_ N_IH_ R 0K % /W 00 R0 0K % /W 00 R 0K % /W 00 R 0K % /W 00 R. % /W 00 Route U_RI/RI# differentially R 00 % /W 00 F R0 00 % /W 00 TP0/PIO E R 00 % /W 00 TP/PIO F R0 00 % /W 00 TP/PIO0 TP/PIO N_IH_R N_IH_R R 0K % /W 00 U V F E0 U T Y T T T W 0 U 0 F 0 0 F F0 0 0 0 E E R M R 0 V P R T F0 U MUY#/PI PM_YRT# PM_TLOW# PM_LKRUN#/PIO PM_PRLPVR PM_PWRTN# PM_PWROK PM_RI# PM_RMRT# PM_LP_# PM_LP_# PM_LP_# PM_TPPU#/PIO0 PM_TPPI#/PIO PM_U_TT#/LPP# PM_THRM# WKE# ERIRQ PM_VTE/VRMPWR Z_ITLK Z_RT# Z_TIN0 Z_TIN Z_TIN Z_TOUT Z_YN U_PP0 U_PN0 U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_O0# U_O# U_O# U_O# U_O#/PI U_O#PI0 U_O#/PI U_O#/PI U_RI U_RI# PI PI PI PI PO PO PO PIO PIO PIO PIO PIO PIO Layout Note: R needs to placed within " of IH, R must be placed within " of R w/o stub U I/F Unmuxed PIOs PIOs I/F/ZLI I -IH-M 0PIN INTEL Power Managent IT IE Misc locks T REERVE (,0,,,,,) VP P# P# P0 P P P0 P P P P P P P P P P0 P P P P P PK# PREQ PIOR# PIOW# PIORY PIEIRQ TLE# T0RXN T0RXP T0TXN T0TXP TRXN TRXP TTXN TTXP TLKN TLKP TRI# TRI LK LK ULK LK_RTX LK_RTX INTVRMEN INTPRUER# RTRT# PKR THRMTRIP# RV RV RV RV RV RV RV RV RV E F F E E F E E F E F F F E0 V Y Y F E F F U R % /W 00 IE_P0 IE_P IE_P IE_P IE_P IE_P IE_P IE_P IE_P IE_P IE_P0 IE_P IE_P IE_P IE_P IE_P RTRT0 IE_P[..0] 0mil 0mil IE Layout iude: Trace: on (microstrip) on (microstrip ballout) Trace: on (stripline) on (stripline ballout) Must be less than 0 inch The two strob signals must be length matched within 00 mils of each other.the data line must be within /- 0 mils of the averagelength of the two strobes(ior#,iory#). IE_P0 () IE_P0 () IE_P0 () IE_P () IE_P () IE_P[..0] () IE_PK0 () IE_PREQ () IE_PIOR0 () IE_PIOW0 () IE_PIORY () IRQ (,0) (,,,,,,,,,,0,,,,,,,,0,,,,,0,,,,) R0 00 % /W 00 R 00 % /W 00 00pF 0V 0% 00 XR 00pF 0V 0% 00 XR 00pF 0V 0% 00 XR 00pF 0V 0% 00 XR 00pF 0V 0% 00 XR 00pF 0V 0% 00 XR 00pF 0V 0% 00 XR 00pF 0V 0% 00 XR R 00 % /W 00 R 00 % /W 00 R. % /W MF 00 T_LE0 () T_RXN0 () T_RXP0 () T_TXN0 () T_TXP0 () T_RXN0 () T_RXP0 () T_TXN0 () T_TXP0 () LK_PIE_T0 () LK_PIE_T () ULKO () R M % /W 00 Place within 00mils of IH ball MLK_IH () MLK_IH () 0mil pf 0V % 00 NPO REF FUNTION EFULT OPTIONL OVERRIE R? No Reboot No tuff tuff R? wap Override No tuff tuff R? VM R 0M % /W 00 oot IO Y.KHZ T- PPM No tuff tuff for safe mode R IH_PKR K % /W 00 (NU) tufff for No Reboot R0 K % /W 00 (NU) R PIO K % /W 00 (NU) tuff for swap override tuff PI_NT0 () FM_WP () T Layout giude are written in H page,,0, NER H NN 0 pf 0V % 00 NPO U L-I NHT0KR -0 PIN TI R (,) PM_VTE 0 % /W F MT00 0.uF V 0-0% 00 YV(NU) 0.0uF V 0% 00 XR 0 00pF 0V 0% 00 XR U V T U N OUT R0 0K % /W 00 LNR-I PT OT- PIN MITUMI Y_PWROK R 00K % /W 00 0 0.uF V 0-0% 00 YV(NU) Y_PWROK () elay ms (,) () () (,) THRMTRIP0 IH_PKR RTRT0 M_INTRUER0 IH_PKR R % /W 00 V~.V(: min V) high accuracy range V~.V RT Layout iude:. Keep the lead lengths as short as possible, trace length less inch on each branch. Trace signal coupling must be limited as much as possible by avoiding the rounting of adjacent PI signal close to RTX and RTX. Put a ground plane under the Xtal component. round guard plane is highly recommendceed.. The Oscillator V should be clean, use a filter, such as an R low pass or a ferrite inductor First International omputer, Inc. FL.,NO.00,Yang uang t.,neihu TIPEI, TIWN,RO (-)- T < othan M IH-M > ize ocument Number Rev IH ( IE / / U / PMU / PIO ) / 0. Wednesday, January, 00 ate: heet of 0