BM1385. Bitcoin Hash ASIC Datasheet. Bitmain Technologies Limited
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1 BM1385 Bitcoin Hash ASIC Datasheet Bitmain Technologies Limited
2 Page 1 of 14 Contents Contents... 1 Revision History Overview Features Applications Pin Description Pin Diagram Signal Description UART description UART protocol Work format Work timing Nonce respond format Configuration description Command SetAddress ChainInactive SetPLLDivider GetStatus SetConfig Electrical Character Absolute Maximum Rating Recommended Operation Conditions DC Characters
3 Page 2 of 14 Revision History Revision Number Author Date Description 1.0 Zhan Initial 2.0 Zhan Delete LDO_VSS 2
4 Page 3 of 14 1 Overview This is a kind of high performance and low power consumption bitcoin mining ASIC. 1.1 Features Typical hash rate and power Voltage(V) Hash Rate(GH/S) Current(A) Total power(w) W/GH Customized package Support UART communication interface Support chain mode, Max 256 chips per chain 1.2 Applications Bitcoin mining 3
5 Page 4 of 14 2 Pin Description 2.1 Pin Diagram Top view 2.2 Signal Description Name I/O Active Level Description XIN I N/A Oscillator input XOUT O N/A Oscillator output RST_N I L Reset signal TEST I N/A Internal pull down. 0: Normal mode 1: Test mode CLKOUT O N/A Clock output NRSTO O L Reset output CI I N/A Command Input. Schmitt input. CO O N/A Command Output RI I N/A Respond Input. Schmitt input and internal pullup. RO O N/A Respond Output 4
6 Name I/O Active Level Description BM1385_Datasheet_v2.0.docx Page 5 of 14 BI I H Respond Busy Input. Schmit input and internal pulldown. BO O H Respond Busy Output ADDR[3:0] Address Input. Internal pullup. RF O RO open drain output; Command Rx Flag TF O Respond Tx Flag PLL_VDD PLL_VSS PLL power (0.9V) PLL ground LDO_VDD1 LDO power input. Typical 1.8V LDO_VDDO NRST_A BI_A CI_A XIN_A RI_A LDO power output 0.9V. 1uF external capacitor. Reset input. Trigger level is (-VDD,VDDPST-VDD) BI input. Trigger level is (-VDD,VDDPST-VDD) CI input. Trigger level is (-VDD,VDDPST-VDD) XIN input. Trigger level is (-VDD,VDDPST-VDD) RI input. Trigger level is (VDD, VDDPST+VDD) 5
7 Page 6 of 14 3 UART description 3.1 UART protocol The default baud rate is when the XIN clock frequency is 25MHz. it can be set via command. Minimum RX guard time: 1 bit TX guard time: 2 bit RX IDLE: 16 bits Bit order: LSB 3.2 Work format Byte0~31 Byte32~35 Byte36~39 Byte40~43 Byte44~47 Byte48~50 Byte51 Byte52~63 (32bytes) (4bytes) (4bytes) (4bytes) (4bytes) (3bytes) (12bytes) Midstate Ignore TM HCN SNO Ignore Bit[7] Ignore Bit[6:0] WC Data2 SNO: Start Nonce Offset. WC: Work Count. It is used to index the input works. HCN: Hash counting number. When HCN is reached, the hash core will stop hashing. TM: Ticket Mask. It is used to set the difficulty of return nonce. 3.3 Work timing PLLDiv1 PLLDiv2 FBDIV[ 11:0] REFDIV [5:0] 6 POSTDIV1 [2:0] POSTDIV2[ 2:0] Freq(Mhz) step(mhz) 0x x x x s x x x x x x x x x x x x x x x x
8 7 BM1385_Datasheet_v2.0.docx Page 7 of 14 0x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x6a040 0x x x x6b040 0x x x x6c040 0x x6d040 0x x x x6e040 0x x4a040 0x x6f040 0x x x x4b040 0x x x x4c040 0x x x x x x4d040 0x x x x4e040 0x x x x x x4f040 0x x x x x x x
9 8 BM1385_Datasheet_v2.0.docx Page 8 of 14 0x x x x x7a040 0x x x x7b040 0x x7c040 0x x x x7d040 0x x x x7e040 0x x7f040 0x x x x x x x x x x x x x x5a040 0x x5b040 0x x5c040 0x x5d040 0x x5e040 0x x5f040 0x x x x x x x x x x x x x x x x x x x x x x6a040 0x x6b040 0x x6c040 0x x6d040 0x x6e040 0x x6f040 0x x x x x x x x x
10 Page 9 of 14 0x x x x x x x x x x x x x7a040 0x x7b040 0x x7c040 0x x7d040 0x x7e040 0x x7f040 0x x x x x x x x x x x x x x x x x x x x x x4a040 0x x4b040 0x x4c040 0x x4d040 0x x4e040 0x x4f040 0x x x Nonce respond format 4bytes Bit[7] Bit[6:0] Nonce 1 WorkCount 3.5 Configuration description Support two modes: FIL (Fixed Input Length) VIL (Variable Input Length) When system reset (RST_N is low), if ADDR3 is HIGH, it is FIL mode; else it is VIL mode. 9
11 Page 10 of Command ALL CMD[6:0] command 0/1 1 SetAddress 1 2 SetPLLDivider2 0/1 4 GetStatus 1 5 ChainInactive 0/1 6 SetBaudOPS 1 0x7 SetPLLDivider1 0/1 0x8 SetConfig. Only valid in VIL mode SetAddress FIL: 31 30:24 23:16 15:8 7:6 [5:0] ALL CMD ADDR Reserved Reserved CRC5 VIL: Byte0 Byte1 Byte2 Byte3 Byte4 7:5 4 3:0 7:0 7:0 7:0 7:5 4:0 TYPE=2 ALL=0 CMD Length=5 ADDR Reserved Reserved CRC ChainInactive FIL: 31 30:24 23:16 15:8 7:5 4:0 ALL CMD Reserved Reserved Reserved CRC5 VIL: Byte0 Byte1 Byte2 Byte3 Byte4 7:5 4 3:0 7:0 7:0 7:0 7:5 4:0 TYPE=2 ALL=1 CMD Length=5 Reserved Reserved Reserved CRC SetPLLDivider SetPLLDivider1: 31 30: : :5 4:0 10
12 Page 11 of 14 Reserved CMD Reserved FBDIV[11:0] Reserved REFDIV[5:0] CRC5 SetPLLDivider2: 31 30:24 23:16 15:12 10:8 7:5 4:0 ALL CMD ADDR Reserved POSTDIV1[2:0] POSTDIV2[2:0] CRC5 FBDIV: PLL feedback divider, range from 60 to 160. REFDIV: PLL reference clock divider, range from 1 to 63. POSTDIV1:PLL post divide 1, range 1 to 7. POSTDIV2:PLL post divide 2, range 1 to 7. Total post divide is POSTDIV1* POSTDIV2. The value of POSTDIV1 should ALWAYS be greater than or equal to POSTDIV GetStatus 31 30:24 23:16 15:8 7:5 4:0 ALL CMD ADDR REGADDR Reserved CRC5 Register Respond format: 4bytes Bit[7:5] Bit[4:0] Read data of register 000 CRC SetConfig Only valid in VIL mode. Byte0 Byte1 Byte2 Byte3 Byte4~7 Byte8 7:5 4 3:0 7:0 7:0 7:0 7:5 4:0 TYPE=2 ALL CMD Length=9 ADDR REGADDR REGDATA Reserved CRC5 11
13 Page 12 of 14 4 Electrical Character 4.1 Absolute Maximum Rating Symbol Parameter Max value Unit VDD Core Voltage 1.2 V VCC IO Voltage 1.98 V PLL_DVDD PLL Digital power 1.2 V PLL_AVDD PLL analog Power 1.92 V T STG Storage -65~150 Temperature 4.2 Recommended Operation Conditions Symbol Parameter Min. Typ. Max. Unit VDD Core Voltage V IO_VDD IO Voltage V PLL_VDD PLL Digital power V T OPT Operation Temperature DC Characters Symbol Parameter Min. Typ. Max. Unit V IL Input Low Voltage V V IH Input High Voltage V V OL Output Low Voltage 0.45 V V OH Output High Voltage 1.35 V I L Input Leakage Current ±10 ua V T I/O threshold point V V T+ Schmitt input low to high threshold pint V V T- Schmitt input high to low threshold pint V R PU I/O internal pull-up resistor 47K 69K 106K Ω R PD I/O internal pull-down resistor 49K 85K 159K Ω I CC (VCC) Supply current of VCC 10 ma I CC (PLL) Supply current of PLL_DVDD and PLL_AVDD 4 ma CB IN Input pin capacitance 10 pf 12
14 Page 13 of 14 CB OUT Output pin capacitance 10 pf 13
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Suitable for DC-DC Converters, Voltage Regulators, Decoupling Applications for Computer Motherboards, etc. Performance Characteristics
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Sunlord Specifications subject to change without notice. Please check our website for latest information. Revised 2018/04/15
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Polymer PTC Resettable Fuse:KMC Series
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