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006 Vol.1 No. 1 TRANSACTIONS OF CHINA ELECTROTECHNICAL SOCIETY Feb. 006 1 1 10016 31007 TM464 Modeling and Circulating-Current Characteritic Analyi of Voltage and Current Double Cloed-Loop Controlled Inverter aralleling Sytem Xiao Lan 1 Li Rui 1 Nanjing Univerity of Aeronautic & Atronautic Nanjing 10016 China Zhejiang Univerity Hangzhou 31007 China Abtract Traditional power difference baed paralleling control technology of inverter i evolved from the grid-connection theory of the ynchronou generator in utility ytem, in which the haring of the active and reactive power in each module i controlled and balanced by adjuting the phae and amplitude of the output voltage repectively. When ued in paralleling inverter which adopt voltage and current double cloed-loop control trategy, thi method however, reult in relatively large control error. Thi paper etablihe the circuit model of the voltage and current double cloed-loop controlled inverter with the conideration of the circulating-current. The active and reactive power relationhip with the amplitude and phae of the output voltage i deduced from the tranfer function. The circulating-current characteritic analyi method i etablihed baed on equivalent output impedance model and differential equation calculation. The quantitative relationhip between the output power and the output voltage i given, and the correponding paralleling control technology i propoed. The imulation reult verifie that both the active and reactive power are affected by the amplitude and the phae of the output voltage. Experimental reult verify that the propoed control cheme ha good load-haring effect. Keyword arallel, inverter, circulating current, output impedance, modeling 50337030 01F503 005 0 18 005 07 05

5 006 1 US [1] [] [3] [4] [1] [5] i o1 i o i o I & H I & H = I& o1 I& o (1) 1 I & o1 = I& o + I& H () I& o = I& o I& H u o1 u o u ref u vf K vf K K I I i ref i L K G o C f ω 1 Fig.1 Equivalent output model of two inverter paralleling ytem LC I I [5] f o f o [6] 1 u o u o1 ϕ 1 u o ϕ Z 1 Z Z o Fig. Circuit model of double cloed-loop controlled inverter module in paralleling ytem [ ()( + ) ± ()] U K K K I G () = 1 + ( K + K ) K KG ref I H o I vf o (3) u o1 =u o [ ()( + ) + ()] = U K K K I G ref1 1 I1 1 H o1 1 + ( K + K ) K K G 1 I1 vf1 1 o1 [ ()( + ) ()] U K K K I G ref I H o 1 + ( K + K ) K K G I vf o (4)

1 53 4 I H KI KI1 Uref ()( K + ) KGo Uref1()( K1 + ) K1Go1 () = + KI1 KI Go1 + Go + Go1Go ( K1 + ) Kvf1K1 + ( K + ) KvfK K K U () K U () K K K ( K )( K ) G G KI1 KI Go1 + Go + Go1Go ( K1 + ) Kvf1K1 + ( K + ) KvfK I1 I [ ] + + ref vf1 ref1 vf 1 1 o1 o (5) (K X1 =K X =K X ) 5 [ ] I () = ( SK + K ) K U () U () 6 H I ref ref1 uref1() t = (3.+ d u)co( ωt+ d ϕ) 7 uref ( t) = 3.co( ωt) du dϕ 7 [ ϕ ω ϕ ] (3. + d u) co(d ) in(d ) Uref1() = + ω Uref ( ) = 3. ( + ω ) 8 K =1.14 K I =3.57 10 4 K=1.38 K vf =0.08 C f =10µF ω =π 400 8 6 3 3 3a 3b 3c 3d du dϕ 1 U ref1 U ref1 U ref1 U ref 1 1 u ref1 u ref 1 a b c d 3 Fig.3 Circulating current v. reference voltage in paralleling ytem

54 006 5 3 1 u o u o1 ϕ 1 u o ϕ Z 1 Z Z=R+jX R X Z o i o1 i o i o 1 R 1 =R =R X 1 =X =X ϕ 1 inϕ1 ϕ1 coϕ1 1 [8] Z = R+ jx o ω KKKvf fω I vf ω vf 3 ωkkk I vf Cfω fω I vf ω vf = + ( C + K KK ) + K K K ( C + K KK ) + K K K (9) 1 U& o1 U& o So1 = o1 + j Qo1 = ( U& o1) ( I& o1) = U& o1 ( ) (10) R+ jx 1 o1 Q o1 + R + X Q R + X UU o o1r R XUU o o1ϕ1 o1 1X X 1Rϕ1 o1 (11) U = 1 ϕ = ϕ1 ϕ Q o1 o Q = Qo1 Qo R X U R X X RU o ϕ + (1) ϕ = 0 U = 0 = R U ( R + X ) Q = X U ( R + X ) Q = R X = X ϕ ( R + X ) Q = R ϕ ( R + X ) Q = X R (13) (14) (1) (14) 4 I u o n u refn u o = U o inωt 15 urefn = Urefnin( ωt+ ϕn) 16 ω ϕ n u o u refn U o U refn u o u refn n di Ln ωt Ln I refn n vf o [ ] 0 [ in( ω + ϕ ) in ω ] i = KK U in( ω t+ ϕ ) K U in ω t dωτ + KK U t K U t p refn n vf o 17

1 55 i i di d d Ln Ln Ln = Urefn + ϕn Urefn ϕn { = KK U co( ω t + ϕ ) + p refn [ t ] Uref KKI } in( ω + ϕ ) inϕ ω dϕ + { KKp in( ωt + ϕn ) + {[ ϕ ω + ϕ ] I ω}} co co( t ) KK du n n n n n n n refn (18) di Ln U refn U refn i Ln di Ln di Ln di LnQ diln = in( ω t+ ϕn ) Urefn KKIdϕn ω + KKpin( ω t + ϕn)durefn dilnq = KKpUrefn co( ω t+ ϕn )dϕn co( ω t+ ϕn) KKIdUref n ω A KI di A K Ln dϕn = Urefn Urefn A KI d A Kp d di LnQ Q = U U U U du A K di A K di = + refn o refn o refn = Ln + I LnQ A K d A KI dq I p 19 0 A= ( K K + K K ω ) 1 19 0 dϕ n =0 Q = K ω K I I f vf 13 K >> C ω KK ϕ = 0 R ωk ωk = = Q X K C KK K I fω vf 0 du refn =0 I I 3 Q = K K ω 4 14 C f ω >> K KK vf U = 0 fω I vf I X C K KK K = = Q R ωk KK K ω vf 5 5 d dq 0 5 4 Saber 1 K I / K ω 1.17 K ω /K I 0.85 360V 115V/400Hz 800VA IRF460 1mH 10µF U ϕ / Q ωk /K I / Q K I /ωk inϕ ϕ coϕ 1 5 11A 1 u o 3 i o1 i o 113.1V i o1 i o 5.96A 5.77A 4 Fig.4 Main circuit diagram of two inverter paralleling ytem

56 006 (3) 5 Fig.5 Experimental waveform of inverter paralleling ytem 1 Tab.1 Simulation data of output active and reactive power for two paralleling inverter in no load U /V ϕ/ ( ) 1 /W /W Q 1 /var Q /var /W Q/var / Q 0.014 0 4.11 4.11 6.69 6.69 48. 53.38 0.90 0.08 0 47.35 47.35 55.64 55.64 94.7 111.8 0.85 0.04 0 70.1 70.1 80.54 80.54 140.4 161.08 0.87 0.056 0 98.3 98.3 116.3 116.3 196.46 3.6 0.84 0 0. 33.8 33.8 30.44 30.44 66.56 60.88 1.09 0 0.5 80.87 80.87 70.3 70.3 161.74 140.46 1.15 0 0.7 115.99 115.99 98.74 98.74 31.98 197.48 1.17 0 1 175.94 175.94 145.71 145.71 351.88 91.4 1.1 6 (1) () 1 Tabiz W A, Jovanovic M M, Lee F C. reent and future of ditributed power ytem. IEEE proceeding of AEC 9, 199: 11~18 Chen JiannFuh, Chu ChingLung. Combination voltagecontrolled and current-controlled WM inverter for US parallel operation. IEEE Tran. on ower Electronic, 1995, 10(5): 547~558 3 Tuladhar A, Jin H, Unger T, et al. arallel operation of ingle phae inverter module with no control interconnection. IEEE proceeding of AEC 97, 1997: 94~100 4.. 004, 36(): 05~09 5 Xiao Lan, Yan Yangguang. Rugged reonant pole and it application in oft-witching converter. Journal of Southeat Univerity(Englih Edition), 00, 18(3): 5~3 6. [ ]. 000 7. A novel load haring control technique for paralleled inverter. 003 003: 190~196 8 Xiao Lan, Huang Lei. A implified control for inverter in parallel operation. The 11th International ower Electronic and Motion Control Conference, EE-EMC 004, Latvia, CD-ROM 1971 1980