First International Computer,Inc Portable Computer Group HW Department

irst International omputer,inc Portable omputer roup W epartment oard name : Mother oard chematic Project : LM. chematic Page escription :. PI & IRQ & M escription : Version : 0. Initial ate : MR, 00. lock iagram :. Net name escription :. chematic modify Item and istory :. power on & off & equence :. lank Manager ign by: ngus o rawing by : very Lee, enson heng Total confirm by: dam ho LN ircuit check by: udio ircuit check by: I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev 0. riday, June, 00 ate: heet of

. chematic Page escription : LMW chematic Ver : 0... chematic Page escription. lock iagram. NNOTTION. chematic Modify. Timing iagram. lank. anias eleron(/). anias eleron(/) 0. POWR (PU OR). Thermal. R0M ost(/). R0M R(/). R0M PI_LINK(/). R0M VIO,LK(/). R0M POWR(/). lock enerator. R RM O-IMM. R PULL UP 0. 00 PI/LP(/). 00 I/T(/). 00 PI//U(/). 00 POWR(/) IL PIINT IRQ IRQ IRQ IRQ IP IP UMTR RQ RQ0 / NT0 RQ / NT RQ / NT RQ / NT RQ / NT Mini PI(Wireless LN) ardus LN LN MiniPI/ardus MiniPI/ardus MiniPI/ardus IP MiniPI ardus Mini PI(Wireless LN) LN. PI(). PI(ardus). ardus POWR WIT. LN M0. MINI PI NN. PI/LP Pull/own 0. U NN. I NN. L NN. RT NN. TV OUT NN. LP PMU0. K K. M NN. LI NN, IO. IP W/L Indicator 0. Reset ircuit. L odec. udio mplifier MT0. PI OUT. witch oard. Quick witch. IN & IN. PI & IRQ & M escription : IRQ hannel IRQ0 IRQ IRQ IRQ IRQ IRQ IRQ IRQ IRQ IRQ IRQ0 IRQ IRQ IRQ IRQ IRQ esciption ystem timer Keyboard (asacde) LN / MOM erial Port UIO / V / U LOPPY IK LPT RT PI (isable by default) IR (MOM/LN) ardbus P/ mouse PU ROM. IN. rightness ontrol. OVP & crew 0. harge ircuit. attery onnector. POUT. V/VM/. N ore/vp. V/V. PI Power/.VM. R.V. UIO/. WIT/ M hannel M0 evice IR M P M LOPPY IK M UIO M (ascade) M Unused M Unused M Unused (disable by default) (MOM / LN) I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev chematic Page & PI & IRQ & M escription 0. riday, June, 00 ate: heet of

. lock iagram : RT L Thermal ensor -Video Port P P P P Intel othan eleron Processor TI ost us R00M P~P P, Mem us PU OR P0 PU VP P R PULL UP R OIMM P P LK I PI Pull up/own LI/IP W MIN W NN P P P, P IN P V/V attery charger T ON P0 attery elect P P attery Voltage sense P P PMUV/V P V/V P VM/VM P.V P R.VM P.VM/.VM P Over Voltage Protect P U, P0 Mini PI U.0 P ardreader P U0, P0 P PMI TI P,, TI TP0 P (POWR WIT) it PI U LN M0 00 P RJ- P TI ub Interface P0~ I U LP U K/ TRL LP K INT K/ PMI LOT0 I U P P ROM P P -Link P L ROM M N NN P RT P RT P0 P ' O L P M NN P LP PMU0 P udio MP PON Mic IN P0 P P0 I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev LOK IRM 0. riday, June, 00 ate: heet of

. Nat name escription :.oard tack up escription Voltage Rails IN PMUV PMUV V V V V VM VM VM Vcore_PU VP.VM R_.VM.VM V_N.V R_.V Primary system power supply.0v always on power rail by LT or IN.V always on power rail by LT or IN.0V always on power rail by ON or PU0.V always on power rail by ON or PU0.V power rail.0v power rail V switched power rail(none).v switched power rail.0v switched power rail ore Voltage for PU.V~0.V.0V for TL Termination Voltage.V for PU PLL Voltage,N,.V R Termination Voltage.V switched power rail.0~.v power rail.v always on power rail.v power rail for R P Layers Layer Layer Layer Layer Layer Layer omponent ide, Microstrip signal Layer Power Plane tripline Layer(nalog,LV,other) tripline Layer(TL,LOK,R) round Plane older ide,microstrip signal Layer Part Naming onventions N L Q R RP U Y = = = = = = = = = = apacitor onnector iode use Inductor Transistor Resistor Resistor Pack rbitrary Logic evice rystal and Osc Net Name uffix 0 = ctive Low signal ignal onditioning = _Q_ = _L_ = amped (by a resistor) Isolated (by a Q-switch) iltered (by an inductor or bead) I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev NNOTTION 0. riday, June, 00 ate: heet of

.chematic modify Item and istory : I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev Version Notice 0. riday, June, 00 ate: heet of

IXP POWR ON QUN ( INTL PU ) / 0 WK VNT ( POWR TN ) PWR_TN# ( PIN ).us T > 0ns OR 00ns LP_# / LP_# LP_0 ( PIN ) LP_0 ( PIN ).ms LP_# / LP_# LMOT M..0ms V_ = _.V_~ _.V = _.V_~ U_PYV = U_PY_.V_~.0ms VM_ = VQ_~.VM OR = V_~.ms _PU_PWR = PU_PWR V_VR VK.0ms.ms ~.ms T > 0ms.0ms RM_RT# T < ns.ns 0.0ms N_.V_PWR N_OR_PWR R_PWR VRM_PWR 0ms N_PWR T > ms ms < T < 00ms _PWR0 _PWR T > ns.0ns _PWR ( R PIN = U PWR_OO ) PU_P T > ms.0ms TIMIN ONTROL Y 00 T0 > ms PI LKP/N T > ms PI LOK [0:] PI_RT# T > ms.ms PI_RT0 ( R = U PIRT# ) T > ms PU RT# LMW' PU RT# RL ROM R0M.ms LINK RT# T < 0ns.ns _RT# ( R = N_RT0 / I_RT0 / LP_RT0 ) K_RT# T = K_RT# OR LINK_RT# N_RT0, I_RT0, LP_RT0 OUR ORM _RT# I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev IXP POWR ON QUN ( INTL PU ) 0. riday, June, 00 ate: heet of

I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev lank 0. riday, June, 00 ate: heet of

TL_0[..0] TL_0[..0] TL_0[..],,,,,, VP TL_0[..] #, NR#, PRI#, R0#, Y#, R#, PWR#, RY#, IT#, ITM#, LOK#, U- _NMI 0P V 0% MT00 XR(NU) R[..0]#, TRY#, RT#. Transmission Line Type Total Trace Length Normal Impedance pacing (mils) TL_0 P _0M0 R 0 % /W MT00(NU) TL_PURT0 0p 0V % MT00 TL_0 # U TL_00 _INN0 R 0 % /W MT00(NU) trip-line(int. Layer).0 ~. inch /-0% & (Int. Layer) TL_0 V # 0# TL_0 _INTR R 0 % /W MT00(NU) _MI0 0P V 0% MT00 XR(NU) Micro-strip(xt. Layer) & 0(xt. Layer) TL_0 R # # TL_0 _NMI R 0 % /W MT00(NU) TL_0 # # V TL_0 _MI0 R0 0 % /W MT00(NU) _0M0 0 0P V 0% MT00 XR(NU) TL_0 W # # TL_0 _TPLK0 R 0 % /W MT00(NU) TL_0 # # T TL_0 _PULP0 R 00 % /W 00 _INN0 0P V 0% MT00 XR(NU) ource ynchronous T : TL_00 W # # TL_0 TL_0 Y 0# # 0 TL_0 _INIT0 R 0 % /W MT00(NU) _INTR 0 0P V 0% MT00 XR(NU) T#[..0], INV#[..0], TN#[..0], TP#[..0] TL_0 # # Y 0 TL_0 TL_0 U # # TL_0 _TPLK0 0P V 0% MT00 XR(NU) Transmission Line Type Total Trace Length Normal Impedance pacing (mils) TL_0 # # TL_00 PM00 R. ±% /W 00 TL_0 Y # 0# TL_0 PM0 R00. ±% /W 00 _PULP0 0P V 0% MT00 XR(NU) trip-line.0 ~. inch /-0% & TL_0 # # TL_0 PM0 R. ±% /W 00 # # TL_0 PM0 R. ±% /W 00 PU_PLP0 0P V 0% MT00 XR(NU) # TL_0 # ignals Name ignals Matching trobes associated trobe Matching TL_0 _RR0 R % /W 00 _INIT0 TL_T00 U 0P V 0% MT00 XR(NU) T0# # with the group TL_RQ00 R TL_PURT0 R0 00 % /W 00 _RR0 0 0P V 0% MT00 XR(NU) TL_INV00 T#[..0], INV0# /- 00 mils TP0#,TN0# /- mils TL_RQ0 RQ0# INV0# P TL_TN00 TL_RQ0 T RQ# TN0# PU_PWR 0P V 0% MT00 XR(NU) TL_TP00 T#[..], INV# /- 00 mils TP#,TN# /- mils TL_RQ0 RQ# TP0# P TL_RQ0 T RQ# RQ# T#[..], INV# /- 00 mils TP#,TN# /- mils TL_0 TL_RQ0[..0] # TL_0 T#[..], INV# /- 00 mils TP#,TN# /- mils TL_0 # L TL_0 TL_0 # # M TL_0 TL_0 # # TL_00 TL_00 # 0# TL_0 TL_0 0# # TL_0 ource ynchronous R : TL_0 # # J TL_0 ddress#[..], RQ#[..0], T#[..0] TL_0 # # M TL_0 TL_0 # # J TL_0 Transmission Line Type Total Trace Length Normal Impedance pacing (mils) TL_0 # # L TL_0 TL_0 # # N TL_0,,,,,, VP trip-line.0 ~. inch /-0% & TL_0 # # M TL_0 TL_0 # # TL_0 TL_0 # # N TL_00 ignals Name ignals Matching trobes associated trobe Matching TL_00 # 0# K TL_0 TL_0 0# # R0 with the group # J 0 % /W 00(NU) INV# TL_INV0 #[..], RQ#[..0] /- 00 mils T0# /- mils K TL_TN0 TN# L TL_T0 T# TP# TL_TP0 #[.. /- 00 mils T# /- mils R _PRTP0 Y TL_0 0 % /W 00(NU) # TL_0 TL_0 N # # T TL_0 R Q 0,0 PRLPVR L # U TL_0 TRN NPN N0 0V 00m MT OT- MOT(NU) TL_NR0 NR# # V TL_0 0 % /W 00(NU) # R TL_0 R 00 % /W 00 # TL_0,,,,,, VP N R R0# # R TL_0 # TL_00 0# L U TL_0 TL_R0 R# # V TL_0 TL_RY0 RY# #,0,,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM TL_0 TL_Y0 M U Y# # Topology : PWROO V TL_0 # Y TL_0 # VP L L Rtt Transmission Line K TL_0,,,,,, VP TL_IT0 PU K IT# # Y TL_0 TL_ITM0 ITM# # 0." - " 0" -.0" 0 /-% Micro-strip Rtt R PU_IRR0_O T,,,,,, VP TL_INV0,,,,,, VP L L 0." - " 0" -.0" 0 /-% trip-line % /W 00 INV# W IRR# TN# TL_TN0 W 0 _INIT0 INIT# TP# TL_TP0,,,,,, TL_LOK0 TL_PURT0 VP 0 TL_R0[..0] TL_TRY0 PU_PWR 0 _0M0 0 _RR0 _RR0 0M# PM00 RR# PM0# 0 _INN0 PM0 R INN# PM# PM0 PM# VM,0,,,,,,,0,,,,,,,,,,,,,,,0,,,,, PM0 PM# 0 _INTR 0 % /W 00 0 _NMI LINT0 LINT 0 _MI0 0 _TPLK0 MI# R# TPLK# 0 _PULP0 PU_PLP0 LP# 0 PU_PLP0 PLP# R K % /W 00 mil J TL_PRI0 PRI# TLR0 VP,,,,,, TLR _PRTP0 0mil TL_PWR0 PWR# TLR R0 TLR 0 K % /W 00 0.u V 0% 00 XR(NU) TRM TRM TRM TRM R K % /W 00 _TRMTRIP_0 VP,,,,,, TRMTRIP# RV0,,,,,, VP _L R % /W 00 PROOT# RV RV PM_PI0 0 RV R00 K % /W 00(NU) PU_LK LK0 RV PU_LK0 LK RV,,,,,, VP _L0, R K % /W 00,,,,,, VP R K % /W 00 ITP_LK0 ITP_LK R K % /W 00(NU) TT R0 K % /W 00(NU) R 0 % /W 00 TK TT,,,,,, VP R. % /W 00 TI R R. % /W 00 TO 00 % /W 00 TM P R. % /W 00 PN TRT# OMP0 P R. % /W 00 R R0. % /W 00 OMP 0 R. % /W 00 PN PU_PLP0 0 PRY# OMP 0 % /W 00(NU) R. % /W 00 R. % /W 00 PRQ# OMP Less Q0 TRN NPN N0 0V 00m MT OT- MOT(NU) than KT PU PZ0--0 MT PIN OXONN Q 0." TRN NPN N0 0V 00m MT OT- MOT(NU) "anias Only" 0,,0 PU_TP0 R 0 % /W 00(NU) TL_R00 TL_R0 TL_R0 TL_PURT0 R 0 % /W 00 R. % /W 00(NU) R 0 % /W 00 J K L M LOK# R0# R# R# TRY# RT# PWROO ddress roup0 ddress roup ontrol ignal Legacy PU Thermal ost LK ITP00 Port ata roup0 ata roup ata roup ata roup # # 0# # # # # # # # # # 0# # # # INV# TN# TP# 0 0 0 TL_0 TL_0 TL_00 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_00 TL_0 TL_0 TL_0 anias processor 0 anias processor or later TL_INV0 TL_TN0 TL_TP0 TLR = / VP Max Length : 0." TT K No tuff TT K No tuff _TRMTRIP_0 R % /W 00 R K % /W 00 Q TR NPN MMT OT- IRIL losed to PU R0 0K % /W 00 _TRMTRIP0 Topology : PLP# ystem us ommon lock ignal Layout uide : L PU L L N PU L 0." - " 0." - " L L 0." -." 0." -." Transmission Line Micro-strip trip-line Topology : LINT, LINT0, 0M#, INN#, LP#, MI#, TPLK# 0." - " 0." - " Transmission Line Micro-strip trip-line I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev PU ( anias ) / 0. riday, June, 00 ate: heet of

0,, VOR_PU U- R 0 00 R 0 0 R V0 VP0 0 T V VP 0 T V VP 0 0 T V VP V VP 0 0 T 0 T V VP 0 U V VP 0 0 U V VP 0 U V VP 0 0 U V VP V V0 VP0 K V V VP L V V VP L V 0 V VP M V V VP M W V VP N W V VP N W V VP P 0 W V VP P 0 0 W V VP J R Y J V0 VP0 R Y K V VP T Y V VP U T Y V V VP U V VP V W V W V P V VQ0 Y W 0 Y V VQ 0 0 V V0 V V 0 V V V V 0 mil V V0 V V V N 0 0 0 0 V V 0 V0 V R PWR 0 % /W 00 V V 0 0 0 00 V 0 V 0 V Place each V V pair(0.ux, V 0 0 V 0ux) per V0 0 pin. V V V V 0 V V V V VR_VI0 0 0 V VI0 VR_VI VR_VI0 0 VR_VI VR_VI 0 V0 VI VR_VI VR_VI 0 V VI V VI VR_VI VR_VI 0 VR_VI VR_VI 0 V VI V VI VR_VI 0 V 0 V V J V J 0 0 V R J V0 Vsense. % /W 00(NU) J V J 0 K KT PU PZ0--0 MT PIN OXONN K K "anias Only" K K 0 L L 0 0 L L M M M M M N N N 0 0 N N P P P R sense P. % /W 00(NU) R R T P X0YR P-P =.mm PN T P X0YR P-P =.mm PN T P X0YR P-P =.mm PN T P X0YR P-P =.mm PN T P X0YR P-P =.mm PN(NU) 0u.V 0% 00 XR TIYO(NU) 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO(NU) 0u.V 0% 00 XR TIYO 0 0u.V 0% 00 XR TIYO(NU) 0 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO(NU) 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO(NU) 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO(NU) 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0 0u.V 0% 00 XR TIYO 0 0u.V 0% 00 XR TIYO 0 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0u.V 0% 00 XR TIYO 0.u V 0% 00 XR 0.u V 0% 00 XR 0.u V 0% 00 XR 0.u V 0% 00 XR 0.u V 0% 00 XR 0.u V 0% 00 XR 0.0u V 0% 00 XR 0.u V 0% 00 XR 0u 0V 0-0% MT00 YV 0YV0Z TK,,,,,, 00 0.u V 0% 00 XR 0 0.u V 0% 00 XR 0.0u V 0% 00 XR 0.u V 0% 00 XR 0u 0V 0-0% MT00 YV 0YV0Z TK VP 0.0u V 0% 00 XR 0u 0V 0-0% MT00 YV 0YV0Z TK 00u V ±0% mω =.mm MT V 0V0M00 K (K-P) 0.0u V 0% 00 XR 0u 0V 0-0% MT00 YV 0YV0Z TK U- KT PU PZ0--0 MT PIN OXONN,0,,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM 0 mil.v U LNR-I TU OT PIN MT VIN J VOUT R 0 % /W 00 0 mil V Tu 0V 0% Vout R 0 % /W 00(NU).VM,,,,0,, "anias Only" One round One Via R Vout=Vref(R/R)Iadj*R 0 R=R(Vout/Vref-) Vref=.0V,Iadj=u 000p 0V 0% 00 XR 0u 0V 0-0% 00 YV R 0. % /W 00 R N I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev PU ( anias ) / 0. riday, June, 00 ate: heet of

,,0 VRM_PWR PU_N VI VI,,0 VOR_PU R0 PWR 0 % /W 00 PU_TP0,,,,,,,,0,,,,,,,,,,,,,,,0,,,,, Q TR N00 0V OT- ILIONIX R PU_N PU_N PU_N PU_N PU_N R 0 % /W 00 R K % /W 00 0 % /W 00(NU) VM PU_N,,0 0 0.U 0V 0% 00 XR(NU) R0 0K % /W 00 VRON PRLPVR PM_PI0 VR_VI0 VR_VI VR_VI VR_VI VR_VI VR_VI VP_P,,,,,, U 0V 0% MT00 XR R 00KΩ % /W 00 PU_N Q TR N00 0V OT- ILIONIX IN 00mil u V 0% 0 XR.KΩ % /W 00 0 0.0u V 0% 00 XR R 00K % /W 00 0 0.0u 0V ±0% 00 R 0 % /W 00 R R0 0 % /W 00 R0 R.KΩ % /W M MT00 0 00p 0V 0% 00 XR 0 % /W 00(NU) 0mil 00mil, via: PU_N VM,,,,,,,,,,, U LNR-I ILV-T INTRIL V VT 0 OUT V T N N RN N# VI0 VI VI VI VI VI POO OMP R.K % /W 00 R.K % /W 00 IN P U OOT P L VP N N N N N N VN RV TV OT 0 0 OT P N.u V ±0% 0 XR TIYO PU_N oost Voltage.V eeper leep Voltage 0.V 00p 0V 0% 00 XR IO TKY -0 NMKO R.u V ±0% 0 XR TIYO 0 % /W 00 R K % /W 00.u V ±0% 0 XR TIYO R.u V ±0% 0 XR TIYO.u V ±0% 0 XR TIYO.K 0.% /0W 00(NU) Tu V 0% 0mΩ NYO(NU).u 0V 0% 00 XR TIYO 0mil R.KΩ % /W M MT00 R K % /W 00 Q 0mil M-T-N IRR0Z 0V IR 0.u 0V 0% 00 XR R0. % /W MT00 R.KΩ % /W MT00 0p 0V % MT00 XR 0mil 0mil u 0V 0% 00 XR Q TRN IRLR 0V IR OP etting.iocset=.v/(.k.kk)=0u.isen=0u/(/)/0.=.u.isen*rsence=iocp*rds_on (Lowside) Iocp=(Isen*Rsence)/Rds_on (Lowside) Q TRN IRLR 0V IR IO TKY 0V (M) O R0 mω % W MT0 Lead-ree 0p 0V 0% 00 XR Trace: 000mil via: L 0.u±0% MT.*.*.mm MPL-R LT LR 0.u 0V 0% XR 00 P N IO ZNR.V O- IO IMVP IV VOR_PU or anias eleren PU Load line slope : -mv/ Vdroop : *mv/=mv Idroop : mv/.0k=.u.u/0./0. =.u Rds(on) *Io = Isen * Rsen (m/)*=.u*rsen R =.K VI[..0] VOR_PU,, Voltage 0 0 0 0 0 0.0V 0 0 0 0 0.V 0 0 0 0 0.V 0 0 0 0.0V 0 0 0 0 0.V 0 0 0 0.V 0 0 0 0.V 0 0 0.V 0 0 0 0 0.0V 0 0 0 0.V 0 0 0 0.V 0 0 0.V 0 0 0 0.V 0 0 0.00V 0 0 0.V 0 0.V 0 0 0 0 0.V 0 0 0 0.V 0 0 0 0.0V 0 0 0.0V 0 0 0 0.V 0 0 0.V 0 0 0.V 0 0.0V 0 0 0 0.V 0 0 0.0V 0 0 0.V 0 0.V 0 0 0.0V 0 0.V 0 0.V 0.V IMVP VI TL VI[..0] Voltage 0 0 0 0 0.V 0 0 0 0.0V 0 0 0 0.V 0 0 0.V 0 0 0 0.V 0 0 0.V 0 0 0.00V 0 0.0V 0 0 0 0.0V 0 0 0.0V 0 0 0.0V 0 0.00V 0 0 0.00V 0 0 0.V 0 0 0.V 0 0.V 0 0 0 0 0.0V 0 0 0 0.V 0 0 0 0.0V 0 0 0.V 0 0 0 0.V 0 0 0.0V 0 0 0.V 0 0.V 0 0 0 0.V 0 0 0.V 0 0 0.0V 0 0.V 0 0 0.V 0 0.V 0 0.V 0.00V I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev PU Power ore 0. riday, June, 00 ate: heet of 0

TRML NOR 0,,,,,,,,,,, heck leakage at phase VM MO-P 0.u 0V 0% XR MT00 R 0Ω±% 00Mz MT00 ML-00-00P-N M.LYR LR 0,,,,,,,,,,, VM ddress:00 0X 0u 0V 0-0% MT00 YV 0YV0Z TK R 0K % /W 00 IO TKY 0V 0.OT-.*.mm NMKO.u 0V 0-0% 00 YV,,,,,,,,0,,, V Pull up at OVP page R0 0K % /W 00 OT_OWN0 QMLK_PMU QMT_PMU 0mil 0mil R 0K % /W 00 QMLK_PMU QMT_PMU 0mil R W 0 % /W 00 R 0 % /W 00(NU) 0 U LNR-I U OP-L PIN MT N Test V TRM# L LRT# V TRM_T XP N 0mil N_V 0mil R 0K % /W 00 R 0K % /W 00(NU) PP P 0mil 000p 0V 0% 00 XR(NU) N R 00 % /0W 00 0.u V 0-0% 00 YV 00p 0V 0% 00 XR L 00Ω±% 00Mz 000m MT00 ML-00-000P-N M.LYR LR L 00Ω±% 00Mz 000m MT00 ML-00-000P-N M.LYR LR V,0,,,,,, TRM TRM 0mil 0 mil 0 mil N 0 mil TRM MINIMUM 0 mil TRM N N0 ON PIN 0-000 0--0 ULK0 LK XP N N 0 0p 0V % 00 NPO(NU) p 0V % 00 NPO MURT(NU) p 0V % 00 NPO MURT(NU) 0,,,,,,,,,,, VM 0mil R Q TRN M-T-P I0-T- -0V -.0 OT- VIY Lead-ree N_V 0mil 0,,,,,,,0,,, V R K % /W 00 0K % /W 00 0.u V 0-0% 00 YV 0 ULKO_ UTT_0,,,0,,,,, R % /W 00 ULK0 L-I NZPX -0 PIN IRIL,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM R K % /W 00 K_N_ON Q NPN TWU 0V 00m MT ROM U0 R 0 % /W 00(NU) R 0K % /W 00 I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev PU Thermal 0. riday, June, 00 ate: heet of

0 U PRT O TL_0[..] TL_0 TL_0 PU_# PU_0# TL_0 PU_# PU_# TL_0 0 PU_# PU_# TL_0 PU_# PU_# mm x mm TL_0 PU_# PU_# TL_0 PU_# PU_# TL_00 J PU_# PU_# TL_0 PU_0# PU_# TL_0 K PU_# PU_# TL_0 PU_# PU_# R00M Xmm eatsink TL_0 J PU_# PU_0# TL_0 K PU_# PU_# TL_0 TL_RQ0[..0] K PU_# PU_# TL_RQ00 PU_# PU_# TL_RQ0 PU_RQ0# PU_# TL_RQ0 PU_RQ# PU_# TL_RQ0 PU_RQ# PU_I0# TL_RQ0 PU_RQ# PU_T0N# TL_T00 PU_RQ# PU_T0P# PU_T0# TL_0 M PU_# TL_0 K PU_# PU_# TL_0 K0 PU_# PU_# TL_00 J PU_# PU_# TL_0 L PU_0# PU_0# TL_0 L PU_# PU_# TL_0 M0 PU_# PU_# TL_0 K PU_# PU_# TL_0 M PU_# PU_# TL_0 K PU_# PU_# TL_0 N PU_# PU_# TL_0 L PU_# PU_# TL_0 N PU_# PU_# TL_00 L PU_# PU_# TL_0 N PU_0# PU_0# TL_T0 L PU_# PU_# PU_T# PU_I# TL_0 PU_TN# TL_NR0 PU_# PU_TP# PU_NR# TL_PRI0 TL_R0 PU_PRI# PU_# TL_RY0 PU_R# PU_# TL_Y0 PU_RY# PU_# TL_PWR0 PU_Y# PU_# PU_PWR# PU_# TL_LOK0 TL_TRY0 PU_LOK# PU_#,,,, R_.V TL_ITM0 PU_TRY# PU_# TL_IT0 PU_ITM# PU_# TL_R00 PU_IT# PU_0# TL_R0 PU_R0# PU_# TL_R0 PU_R# PU_# TL_R0[..0] PU_R# PU_# R TL_R0[..0] PU_#.K % /W 00 TL_PURT0 RRV0 PU_# PU_PURT# PU_# PU_# PU_I#, U_TT0 N P RRV PU_TN#,0, N_RT0 U_TT# PU_TP# IO TKY -0PT 0V 0.0 O- PIN NMKO Lead-ree YRT# 0 N_PWR POWROO PU_# Trace pacing : R. % /W 00 PU_# PU_OMP_P,0, N_RT0 N P PU_0# R. % /W M 00,,,,,, VP PU_# IO TKY -0PT 0V 0.0 O- PIN NMKO Lead-ree PU_OMP_N PU_# R- 0Ω±% 00Mz 00m MT00 ML-00-00L-N M.LYR LR PU_# L0,,,,0,,.VM PU_# PV PU_# R 0mil 0 PU_#.K % /W 00 P PU_# MO-P u.v 0/-0% MT00 YV PU_# PU_# PU_VR PU_0# PU_# 0p 0V 0% 00 XR PU_# J TRMLIO_P PU_# TRMLIO_N PU_I# PU_TN# TTMO PU_TP# R. ROUP R. ROUP 0 ONTROL MI. TL I/ T ROUP 0 T ROUP T ROUP T ROUP 0 0 0 0 0 TL_00 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_00 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_00 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_00 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_00 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_00 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_0 TL_00 TL_0 TL_0 TL_0 TL_0[..0] TL_0[..0] TL_INV00 TL_TN00 TL_TP00 TL_INV0 TL_TN0 TL_TP0 TL_INV0 TL_TN0 TL_TP0 TL_INV0 TL_TN0 TL_TP0,,,,,, VP R R.Ω % /W MT00 Max Length : 0." mil pacing mil R0M R.K % /W 00 N_TLR R0 00 % /W 00 MO-P u.v 0/-0% MT00 YV I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev R00M ost(/) 0. riday, June, 00 ate: heet of 0

0 M_[..0], M_[..0], M_R_R0, M R0, M_W_R0 M_LK_R00 M_LK_R0 M_LK_R0 M_LK_R M_LK_R0 M_LK_R M_LK_R0 M_LK_R M_LK_R0 M_LK_R M_LK_R0 M_LK_R, M_K0_R0, M_K_R0, M_K_R0, M_K_R0, M_0_R0, M R0, M R0, M R0 M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_, M_QM_R[..0], M_Q_R[..0] M_QM_R0 M_QM_R M_QM_R M_QM_R M_QM_R M_QM_R M_QM_R M_QM_R M_Q_R0 M_Q_R M_Q_R M_Q_R M_Q_R M_Q_R M_Q_R M_Q_R K J J J J J J J J J 0 Y R R J 0 J W P R W 0 R R0 V V0 W W 0 J0 M R[..0], U J M R0 MM_0 PRT O MM_Q0 M R MM_ MM_Q J M R MM_ MM_Q M R MM_ MM_Q M R MM_ MM_Q K M R MM_ MM_Q M R MM_ MM_Q K M R MM_ MM_Q M R MM_ MM_Q M R MM_ MM_Q M R0 MM_0 MM_Q0 M R MM_ MM_Q M R MM_ MM_Q M R MM_ MM_Q M R MM_ MM_Q M R MM_ MM_Q 0 M R MM_ MM_Q M R MM_ MM_Q M R MM_Q M R MM_M0 MM_Q M R0 MM_M MM_Q0 0 M R MM_M MM_Q M R MM_M MM_Q M R MM_M MM_Q M R MM_M MM_Q M R MM_M MM_Q M R MM_M MM_Q M R MM_Q M R MM_R# MM_Q M R MM_# MM_Q M R0 MM_W# MM_Q0 M R MM_Q M R MM_Q Y M R MM_Q0P MM_Q W M R MM_QP MM_Q U M R MM_QP MM_Q M R MM_QP MM_Q Y M R MM_QP MM_Q V M R MM_QP MM_Q W M R MM_QP MM_Q M R0 MM_QP MM_Q0 M R MM_Q M R MM_Q0N MM_Q Y M R MM_QN MM_Q 0 M R MM_QN MM_Q M R MM_QN MM_Q 0 M R MM_QN MM_Q Y M R MM_QN MM_Q U M R MM_QN MM_Q T M R MM_QN MM_Q N M R0 MM_Q0 M M R MM_K0N MM_Q U M R MM_K0P MM_Q T M R MM_KN MM_Q P M R MM_KP MM_Q P M R MM_KN MM_Q U M R MM_KP MM_Q T M R MM_KN MM_Q P M R MM_KP MM_Q N M R,,,, R_.V MM_KN MM_Q U M R0 MM_KP MM_Q0 T M R MM_KN MM_Q P M R,,,, R_.V MM_KP MM_Q N M R MM_Q 0mil MM_K0 R0. % /W 00 MM_K MM_OMPN J R. % /W 00 MM_K MM_OMPP R 0.u V 0-0% 00 YV MM_K N0 0.u V 0% 00 YV K % /W 00 MM_P MM_0# J 0.u V 0% 00 YV MM_# MM_P MM_# 0mil MM_VR MM_# MM_VR MM_ I/ 0 MM_OT0 0 MM_OT MM_RRV Y0 MM_RRV R0M MM_VMO MPV MP R K % /W 00 0mil R L K % /W 00.VM,,,,0,, R- 0Ω±% 00Mz 00m MT00 ML-00-00L-N M.LYR LR 0.u V 0-0% 00 YV MO-P u.v 0/-0% MT00 YV R00,, R0 change table for RII IP/LL R00 N N 0 N Y0 N R00 K(K0) K(K) MM_Rsrv(N) MM_Rsrv(N) R0 K K OT OT R00,, R0 change table for R IP/LL R00 N N R00 K K R0 K K I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev ustom R00M R(/) 0. riday, June, 00 ate: heet of 0

0 U -LINK XPR INTR LOK _RX0P _RX0N _RXP _RXN _TX0P _TX0N _TXP _TXN LNT " ~ " " ~ " TR / P / 0 mils ( mil space between P & N) / 0 mils ( mil space between P & N) Note: MX RX,TX - MIN RX,TX < " NOT ifferentials pairs with the same length (within 0 mil) ifferentials pairs with the same length (within 0 mil) J J K L L L M M N P P P R R T T U U V V W W Y Y X_RX0P X_RX0N X_RXP X_RXN X_RXP X_RXN X_RXP X_RXN X_RXP X_RXN X_RXP X_RXN X_RXP X_RXN X_RXP X_RXN X_RXP X_RXN X_RXP X_RXN X_RX0P X_RX0N X_RXP X_RXN X_RXP X_RXN X_RXP X_RXN X_RXP X_RXN X_RXP X_RXN PP_RX0P PP_RX0N PP_RXP PP_RXN PRT O X_TX0P X_TX0N X_TXP X_TXN X_TXP X_TXN X_TXP X_TXN X_TXP X_TXN X_TXP X_TXN X_TXP X_TXN X_TXP X_TXN X_TXP X_TXN X_TXP X_TXN X_TX0P X_TX0N X_TXP X_TXN X_TXP X_TXN X_TXP X_TXN X_TXP X_TXN X_TXP X_TXN PP_TX0P PP_TX0N PP_TXP PP_TXN N N P R R T T U V V W W Y J J J K J J J 0 0 0 0 _RX0P _RX0N _RXP _RXN K J 0 0 PP_RXP PP_RXN PP_RXP PP_RXN _RX0P _RX0N _RXP _RXN PP_TXP PP_TXN PP_TXP PP_TXN _TX0P _TX0N _TXP _TXN J K J0 J K K0 0 0 0 0.u V 0-0% 00 YV 0.u V 0-0% 00 YV 0.u V 0-0% 00 YV 0.u V 0-0% 00 YV _TX0P 0 _TX0N 0 _TXP 0 _TXN 0 0 LINKLK LINKLK0 NRLK NRLK0 MRQ0 MRQ0 K L M M _LKP _LKN X_LKP X_LKN MRQ# P_TXT P_IT P_PL P_NL K J R.K % /W 00 R 0K % /W 00 R 0 % /W 00 R0. % /0W 00.VM, 0p 0V ±0.p 00 NPO(NU) 0p 0V ±0.p 00 NPO(NU) 0p 0V ±0.p 00 NPO(NU) 0p 0V ±0.p 00 NPO(NU) R0M,,,,,, VP,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM,,,,,, VP R0.K % /W 00(NU) R.K % /W 00(NU) R.K % /W 00 R.K % /W 00, RT_YN R.K % /W 00 R0.K % /W 00 (NU) Q TR NPN MMT OT- IRIL(NU) _L, RT_VYN R.K % /W 00 R.K % /W 00(NU) _L0, Q TR NPN MMT OT- IRIL MRQ#&YN&VYN: LK P 0 MRQ0 MRQ0 R.K % /W 00 R.K % /W 00 (NU) VM,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, ULT: 0 0: 00 MZ 00: MZ 0: MZ : MZ 000: 00 MZ 00: MZ 00: MZ 0: MZ Note: or, 00M and M need to strap at 0or 00. Note: changed 0 to be 00MZ instead of MZ in I., RT_VLK R.K % /W 00(NU) VM,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, Q R K % /W 00 _PWR0 0 TRN NPN MMT0 OT OT- IRIL _L: PU V ULT:0 0: MOIL PU : KTOP PU, TRP_T R.K % /W 00 R0.K % /W 00 (NU) VM,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, TRP_T:ebug strap ULT: 0: MMORY NNL TRPIN : PROM TRPIN I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev R00M PI_LINK I/(/) 0. riday, June, 00 ate: heet of 0

0,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, JP JP_00_ORT JP JP_00_ORT JP JP_00_ORT JP JP_00_ORT JP JP_00_ORT JP JP_00_ORT N Q I LP LR PLL,,,,0,,.VM 0mil VM V VQ PLV RT_R RT_RN RT_LU PLV V 0.u V 0% 00 YV L R- 0Ω±% 00Mz 00m MT00 ML-00-00L-N M.LYR LR L R- 0Ω±% 00Mz 00m MT00 ML-00-00L-N M.LYR LR Q PLL R0 % /W 00 VQ 0mil N 0u 0V 0-0% 00 YV L R- 0Ω±% 00Mz 00m MT00 ML-00-00L-N M.LYR LR 0 0.u V 0% 00 YV 0.u V 0% 00 YV R0 % /W 00 R0 % /W 00 MO-P u.v 0/-0% MT00 YV 0.u V 0% 00 YV I 0mil,, RT_VYN RT_YN N_LKM NLK NLK0 0mil 0mil 0mil 0mil 0mil 0mil 0mil 0p 0V ±0.p 00 NPO(NU) 0mil 0.u V 0% 00 YV R 0K % /W 00 R % /W 00 0p 0V ±0.p 00 NPO(NU) 0p 0V ±0.p 00 NPO(NU) R 0K % /W 00 0 0 J 0 0 0 0 J K U PRT O VR_ VR_ V N VI I VQ Q PLLV PLL TM_P _T VYN YN RT R RN LU OIN PU_LKP PU_LKN TVLKIN OOUT RT LK. N. VI TXOUT_U0N TXOUT_U0P TXOUT_UN TXOUT_UP TXOUT_UN TXOUT_UP TXOUT_UN TXOUT_UP TXOUT_L0N TXOUT_L0P TXOUT_LN TXOUT_LP TXOUT_LN TXOUT_LP TXOUT_LN TXOUT_LP J LPV J LP LVR_ LVR_ LR_ LR_ LR_ LVR LV_ION LV_LON LV_LN TXLK_UP TXLK_UN TXLK_LP TXLK_LN Y OMP L 0mil 0mil 0mil 0mil _R Y_ RT_VLK, RT_VT LV_TXOUT_U0N LV_TXOUT_U0P LV_TXOUT_UN LV_TXOUT_UP LV_TXOUT_UN LV_TXOUT_UP LV_TXOUT_L0N LV_TXOUT_L0P LV_TXOUT_LN,,,,0,,.VM LV_TXOUT_LP LV_TXOUT_LN LV_TXOUT_LP L R- 0Ω±% 00Mz 00m MT00 ML-00-00L-N M.LYR LR 0 MO-P u.v 0/-0% MT00 YV 0.u V 0% 00 YV LP 0 MO-P u.v 0/-0% MT00 YV 0mil LP L R- 0Ω±% 00Mz 00m MT00 ML-00-00L-N M.LYR LR 00 0.u V 0% 00 YV LR LV_NL R0 0 % /W 00 0 LV_NKL R 0 % /W 00(NU) MO-P u.v 0/-0% MT00 YV LV_TXLK_UP LV_TXLK_UN LV_TXLK_LP LV_TXLK_LN R % /W 00 0mil L R- 0Ω±% 00Mz 00m MT00 ML-00-00L-N M.LYR LR Place lose To R00M L LK L T I_LK I_T TRP_T R.K % /W 00 VM,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, R0M TRP_T TRP_T,,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM R0.K % /W 00 R.K % /W 00 L T L LK 0mil,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM L0 M0K-T0 (NU) 0mil VQ.V U LNR-I TU OT PIN MT (NU) VIN VOUT 0mil L0 M0K-T0 (NU) V 0 0u 0V 0-0% 00 YV(NU) MO-P u.v 0/-0% MT00 YV(NU) 0u 0V 0-0% 00 YV (NU) J R0.Ω % /W M 00(NU) 0 Tu 0V 0% (NU),,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM.V U LNR-I TU OT PIN MT (NU) VIN VOUT 0mil L M0K-T0 (NU) 0mil PLV R.Ω % /W M 00(NU) J R 0 0u 0V 0-0% 00 YV (NU) R.Ω % /W M 00(NU) 0 % /W 00(NU) Tu 0V 0% (NU) 0u 0V 0-0% 00 YV(NU) MO-P u.v 0/-0% MT00 YV(NU) PLV VQ,,,,0,,.VM L R- 0Ω±% 00Mz 00m MT00 ML-00-00L-N M.LYR LR L R- 0Ω±% 00Mz 00m MT00 ML-00-00L-N M.LYR LR 0 0 0 Vout R R N Vout=Vref(R/R)Iadj*R R=R(Vout/Vref-) Vref=.0V,Iadj=u PLL 0u 0V 0-0% 00 YV MO-P u.v 0/-0% MT00 YV Q 0u 0V 0-0% 00 YV MO-P u.v 0/-0% MT00 YV I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev ustom R00M VIO,LK(/) 0. riday, June, 00 ate: heet of 0

0 V_N,,,, R_.V U W #U W #U #Y #Y V V #P #P #U #U #Y R #Y #L N R #K N # # # # T # T #P #P N N #L #L K # # #P # # # # #Y Y #V #U V U #R R #P #M P M #L #J L # # #N # # 0 0 # J # # W0 # # W # J0 #0 # # # K # # # # # 0 #0 # # # # # # # # # K V # J # #J 0 K #K0 #K K K #K K #K #K J # #J #K PRT O N #M # # # # # # # # # #J #J #J0 #K #V0 #U #M # #M0 #N #N #N #N # #P #P #P #P #R #R #R #R #R #R #R #R #R #R #R0 #T #T #T #T #T #T #T #T #T #U #U #V #V #W #W #V #W #V #W #Y #Y # # # # # #0 # # # # #0 # # # #0 # #K #K M J R T0 U M N N R P 0 M M R P P U R V R R R J0 T N T P T U T W J U N M V W M V W V W U U V 0 K 0 M 0 K K T P X0YR P-P =.mm PN 00mil P N P N P N IO O- NMKO IO O- NMKO,,,,0,,.VM L 00Ω±% 00Mz 000m MT00 ML-00-000P-N M.LYR LR 0mil V.VM_X,,,,0,,.VM L 00Ω±% 00Mz 000m MT00 ML-00-000P-N M.LYR LR 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV U 0V 0% MT00 XR U 0V 0% MT00 XR U 0V 0% MT00 XR U 0V 0% MT00 XR Power sequence requirement,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM IO O- NMKO Tu 0V 0% U 0V 0% MT00 XR U 0V 0% MT00 XR U 0V 0% MT00 XR 0mil 0 0 U 0V 0% MT00 XR U 0V 0% MT00 XR U 0V 0% MT00 XR U 0V 0% MT00 XR U 0V 0% MT00 XR U 0V 0% MT00 XR U M M M R V N T N N N M R P P P P U T U T U T V R V R V W W W W J J Y U Y U 0 0 P P L L J U V_OR#M V_OR#M V_OR#M V_OR#M V_OR#M V_OR#M V_OR#N V_OR#N V_OR#N V_OR#N V_OR#N V_OR#N V_OR#P V_OR#P V_OR#P V_OR#P V_OR#P V_OR#U V_OR#U V_OR#U V_OR#U V_OR#U V_OR#U V_OR#V V_OR#V V_OR#V V_OR#V V_OR#V V_OR#W V_OR#W V_OR#W V_OR#W V_ V_# V_# V_#J V_#U V_# V_#W V_# V_# V_# V_# V_# V_# V_# V_# V_#K V_#K V_# V_# V_# V_# V_# V_#M V_#W R0M OR POWR PI I PRT O POWR MM POWR PU I POWR PI POWR V_MM#0 V_MM#J V_MM#K V_MM# V_MM# V_MM# V_MM# V_MM# V_MM#0 V_MM# V_MM# V_MM# V_MM# V_MM# V_MM# V_MM# V_MM# V_MM#J0 V_MM#K V_MM#K V_MM#K V_MM#W V_PU# V_PU# V_PU#K V_PU#L V_PU#L V_PU#M V_PU#M V_PU#T V_PU#U V_PU#U V_PU#V V_PU#V V_PU# V_PU# V_PU# V_PU# V_PU# V_PU# V_PU# V_PU# V_PU# V_PU# V_PU# V_PU# V_PU# V_#N V_# V_#R V_#R V_#U V_# V_#K V_#L V_#L Y V K T K Y K T V 0 L L P N 0 P K M T T M W W 00mil 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV VP,,,,,, Tu 0V 0% 0mil 0,.VM Tu 0V 0% 00mil 0 T0u.V 0% 0mΩ NYO 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV u 0-0% V 00 YV u 0-0% V 00 YV 0 0.u V 0% 00 YV R0M I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev ustom R00M POWR(/) 0. riday, June, 00 ate: heet of 0

L L L L L L L 0mil VM_LK 0mil L 00Ω±% 00Mz 000m MT00 ML-00-000P-N M.LYR LR,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM 00Ω±% 00Mz 000m MT00 ML-00-000P-N M.LYR LR,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM R.K % /W 00 MO-P 0u 0V 0-0% MT00 YV u 0V 0-0% 00 YV 0.0u V 0% 00 XR 0.0u V 0% 00 XR 0.0u V 0% 00 XR 0.0u V 0% 00 XR 0.0u V 0% 00 XR 0 0.0u V 0% 00 XR 0.0u V 0% 00 XR L length, Route as non-coupled 0 ohm trace :0.inch max L length, Route as non-coupled 0 ohm trace :0.inch max L length, Route as non-coupled 0 ohm trace :0.inch max L length, Route as coupled microstrip 00 ohm differential trace : min to inch max L length, Route as coup led stripline 00 ohm differential trace :. min to.inch max 0mil L L L 00Ω±% 00Mz 000m MT00 ML-00-000P-N M.LYR LR VM,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, MO-P 0u 0V 0-0% MT00 YV 0p 0V ±0.p 00 NPO 0.u V 0-0% 00 YV 0p 0V ±0.p 00 NPO Q TR N00 0V OT- ILIONIX 0,,0 VRM_PWR,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, Q0 TR N00 0V OT- ILIONIX(NU),0, N_RT0 VM R.K % /W 00(NU) 0 U VPU V_R V_R V_R V_R V_ V_PI V_R _PU _R _R _R _R _R PI _R XIN XOUT V PUT0 PU0 PUT PU PUT PU RT0 R0 RT0 R0 RT R RT R RT R RT R RT R RT R 0 0 R % /W 00 R % /W 00 R % /W 00 R % /W 00 R % /W 00 R0 % /W 00 NLK0 NLK PU_LK0 PU_LK R % /W 00 R R.Ω % /W MT00 R.Ω % /W MT00 R % /W 00 R R.Ω % /W MT00 R % /W 00 R R.Ω % /W MT00 R % /W 00 R R.Ω % /W MT00 R % /W 00 R R.Ω % /W MT00 R % /W 00 R R.Ω % /W MT00 R0 % /W 00 R0 R.Ω % /W MT00 R00 % /W 00 R0 R.Ω % /W MT00 R % /W 00 R0 R.Ω % /W MT00 R % /W 00 R0 R.Ω % /W MT00 R % /W 00 R0 R.Ω % /W MT00 R % /W 00 R0 R.Ω % /W MT00 R % /W 00 R0 R.Ω % /W MT00 R % /W 00 R0 R % /W 00 R0 R.Ω % /W MT00 R.Ω % /W MT00 R0 % /W 00 R R R R R R R R.Ω % /W MT00 R.Ω % /W MT00 R.Ω % /W MT00 R.Ω % /W MT00 R.Ω % /W MT00 R.Ω % /W MT00 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO,0,0 PU_TP0,, MLK MT R 0 % /W 00 0p 0V ±0.p 00 NPO(NU) R % /W 00 R % /W 00 0p 0V ±0.p 00 NPO(NU) VTTPWR#/P PU_TP# LK T IR LKRQ0 LKRQ PI0/K0# U_ R/ R0/ R 0 0 R.K % /W 00 R % /W 00 VM,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, LINKLK LINKLK0 NRLK NRLK0 RLK 0 RLK0 0 0 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO lock Latout uideline R % /W 00 Ioh = * Iref (.m) Voh = 0.V @ 0 ohm R W 0 % /W 00 I NOT: RT/ and RT/ are overclocking pairs. R M % /W 00 R R.K % /W 00 R.K % /W 00 R0.K % /W 00 % /W 00(NU) R % /W 00 VM_LK R K % /W 00 _L0, _LKM U_LKM VP,,,,,, 0p 0V ±0.p 00 NPO LOK PU_LK,0 NLK,0 LINKLK,0 NRLK,0 RLK,0 _LKM _LKM N_LKM LNT " ~ " " ~ " "~0" TR / P / mils ( mil space between & 0) / mils ( mil space between & 0) / mils NOT. ifferentials pairs with the same length (within 0 mil).pu & N trace mismatch within 0 mil ifferentials pairs with the same length (within 0 mil). Length mismatch /- 00 mils Y RQ XTL.Mz M p ±0ppm X0I RMONY Lead-ree I suggest 0p X'tal and aps use p lock Layout :. lose to lock generator. Trace as short as possible and use mil. Place crystal within 00 mils of LK enerator p 0V % 00 NPO LK RQ K0 RQUNY LT TL(MZ) PU R (Mz) (Mz) 0 0 0 p 0V % 00 NPO. 00 PI (Mz) R (Mz) U (Mz).. R % /W 00 R % /W 00 R % /W 00 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO _LKM _LKM N_LKM U_LKM "~0" / mils 0 0 0 0. 00 00 00.... 0. 00.. 0 0. 00.. 0 0 00 00 Resv 00 00 Resv.. Resv... I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev ustom lock enerator 0. riday, June, 00 ate: heet of

0mil lose to IMM0 WLKOUT Temination R IMM R IMM Network "<L<" L<0." L<0.", M R[..0] M[:0] M_[..0], M R[..0] N, M_[..0] M_0 M R0 N QM[:0] M_ 0 Q0 M R M_0 M R0 M_ 0 Q M R M_ 0 Q0 M R Q[:0] M_ 0 Q M R M_ 0 Q M R M_ 0 Q M R M_ 0 Q M R M_ 0 Q M R M_ 0 Q M R "<L<" L<0." L<0." M_ 0 Q M R M_ 0 Q M R M[:0] M_ 0 Q M R M_ 0 Q M R M_ 0 Q M R M_ 0 Q M R R# M_ 0 Q M R M_ 0 Q M R M_0 Q M R0 M_ 0 Q M R # M_ 00 0/P Q0 M R M_0 Q M R0 M_ Q 0 M R M_ 00 0/P Q0 M R W# M_ Q M R M_ Q 0 M R (U) Q 0 M R M_ Q M R M_ Q M R (U) Q 0 M R "<L<" L<." M_ 0 Q M R M_ Q M R #[:0] R Q M R M_ 0 Q M R (U) Q M R R Q M R #[:] 0 % /W 00(NU) 0 Q M R (U) Q M R Q M R0 0 % /W 00(NU) 0 Q M R Q0 M R Q M R0 "<L<" L<." Q 0 M R Q0 M R K[:0] Q M R Q 0 M R 0 Q M R Q M R K[:] Q M R 0 Q M R M R M R M_LK_R Q Q M R M R M_LK_R0 K0 Q R00M M R M_LK_R0 Q M R M_LK_R0 K0# Q K0 Q M R M_LK_R00 M R M_LK_R 0 K# Q 0 K0# Q M R0 M_LK_R0 M R M_LK_R K Q Length M R M_LK_R 0 K# Q 0 M R0 M_LK_R0 K Q0 INL ROUP T INL TRO INL M R M_LK_R K Q M R Mismatch, M_K0_R0 K# Q K Q0 M R M_LK_R0 M R, M_K_R0 K0 Q M roup 0 M[:0],QM0 Q0 ±mils M R0 M R, M_K_R0 K# Q M R, M R0 0 K Q M_R_R0, M_K_R0 K0 Q M R M R0 M R, M_R_R0 # Q M roup M[:],QM Q ±mils M_W_R0 M R, M R0 0 K Q M_R_R0 M R, M_W_R0 R# Q M R, M_R_R0 # Q M_W_R0 M R, M_0_R0 W# Q 0 M roup M[:],QM Q ±mils M R, M_W_R0 R# Q M R, M R0 0# Q M R, M R0 W# Q 0 # Q 0 M R M roup M[:],QM Q ±mils M R0, M R0 0# Q 0 Q M R,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, M R VM # Q 0 Q0 R 0K % /W 00 0 Q M R0 M roup M[:],QM Q ±mils, MLK Q M R Q0 M R, MT L Q M R, MLK Q M R M roup M[:0],QM Q ±mils Q M R, MT L Q M R RT(U) Q M R Q M R, M_QM_R[..0] M roup M[:],QM Q ±mils M_QM_R0 Q M R RT(U) Q M R M_QM_R M R, M_QM_R[..0] M0 Q M_QM_R0 Q M R M roup M[:],QM Q ±mils M_QM_R M Q M R M_QM_R M0 Q M R M_QM_R M Q M R M_QM_R M Q M R M(& ontrol) M[:0],#,R#,W# M_QM_R M Q M R0 M_QM_R M Q M R M_QM_R M Q0 M R M_QM_R M Q M R0 (hip elect) #[:0] M_QM_R 0 M Q M R M_QM_R M Q0 M R M_QM_R M Q M R M_QM_R 0 M Q M R K K[:0] R0.K % /W 00(NU) M R M_QM_R M R,,,, R_.V M Q M Q M Q M R M R, M_Q_R[..0] R.K % /W 00(NU) locks WLKOUT,RLK[:0]/RLK#[:0] M_Q_R0 M R,,,, R_.V M Q Q M Q M R M_Q_R M R, M_Q_R[..0] Q0 Q M_Q_R0 Q M R,_OUT/_OUT# M_Q_R Q Q M R M_Q_R Q0 Q M R M_Q_R Q Q M R M_Q_R Q Q M R M_Q_R Q Q M R0 M_Q_R Q Q M R M_Q_R Q Q0 M R M_Q_R Q Q M R0 INL ROUP WIT:P TR LNT TR LNT NOT M_Q_R Q Q M R M_Q_R Q Q0 M R M_Q_R M R M_Q_R M R MTIN Q Q 0 Q Q R Q Q M_Q_R Q Q 0 M R Q : ata:ata <00mil mismatch Q Q 0 % /W 00(NU) Q R : ata:trobe "<L<" within group.,,,, R_.V M roup[:0] V 0 % /W 00(NU),,,, R_.V : ata:other (vg~") < inch mismatch V V V V between group. V V V V : M:M V V M(& ontrol) "<L<" V V : M:Other V 0 V V V 0 (hip elect): : V0 0 V "<L<" V V0 0 : :Other V V V,,,, R_.V V : K:K V V K V V : K:Other "<L<" 0 V V V 0 V V V locks vg clock V V : LK:LK# V0 0 0 R length-."< L < 0mil V V V0 0 0 : LK#:Other "<L<." vg clock 0 V 0 % /W 00(NU) IMM_VR V V IMM_VR 0 V length-0." per V V IMM V 0 V V 0 V 0 V R V u 0V 0-0% 00 YV(NU) 0 V V V 0 % /W 00(NU) 0 V V0 0 V 0 0 V V0 0 V 0 V V V R 0K % /W 00(NU),,,, R_.V V,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM VI U R 0K % /W 00(NU),,,, R_.V VP U VI U IMM_VR,,0,,,,,,0,,,,,,,,,,,,,,,0,,,,, VM VR U 00 VP U VR U IMM_VR VR U 00 0mil N R-OIMM 0-N-(=.mm Reversed) VR U 0-0-00 0mil N R-OIMM 0-N-(=.mm Reversed) 0-0-00 0.u V 0% 00 YV 000p 0V 0% 00 XR 0 0.u V 0% 00 YV 000p 0V 0% 00 XR,,,, R_.V,,,, R_.V O IMM 0 0mil lose to IMM O IMM 000p 0V 0% 00 XR 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV One 0.u capacitors per power pin. Place each capacitors close to pin. 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV Tu 0V 0% Tu 0V 0% 000p 0V 0% 00 XR 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV One 0.u capacitors per power pin. Place each capacitors close to pin. 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV Tu 0V 0% Tu 0V 0% I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev R RM O-IMM 0. riday, June, 00 ate: heet of

, M R[..0] M R0 M R M R M R M R M R M R M R M R M R M R0 M R M R M R M R M R M R M R M R M R M R0 M R M R M R M R M R M R M R M R M R M R0 M R M R M R M R M R M R M R M R M R M R0 M R M R M R M R M R M R M R M R M R M R0 M R M R M R M R M R M R M R M R M R M R0 M R M R M R R_.VM, RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP0 % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT RP % 00X /W PR YNT, R_.VM 0.u V 0% 00 YV Layout note:place one capacitors close to every pullup resistors terminated to v.. 0.u V 0% 00 YV 0.u V 0% 00 YV 00 0.u V 0% 00 YV 0.u V 0% 00 YV 0mil 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV, M_[..0] M_[..0] M_ M_0 M_ M_ RP % 00* /W PR 0.mm Layout note:place one capacitors close to every pullup resistors terminated to v.. M_ M_0 M_ M_ M_ M_ M_ M_ RP % 00* /W PR 0.mm RP % 00* /W PR 0.mm, R_.VM 0mil, M_K0_R0, M_K_R0, M_K_R0, M_K_R0 M_ M_ M_ M_ RP0 % 00* /W PR 0.mm R % /W 00 R % /W 00 R % /W 00 R % /W 00 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV 0 0.u V 0% 00 YV 0.u V 0% 00 YV 0.u V 0% 00 YV, M_QM_R[..0] M_QM_R0 M_QM_R M_QM_R M_QM_R M_QM_R M_QM_R M_QM_R M_QM_R R % /W 00 R0 % /W 00 R % /W 00 R % /W 00 R % /W 00 R % /W 00 R % /W 00 R % /W 00, M_R_R0, M_W_R0, M R0, M_0_R0, M R0, M R0, M R0 R % /W 00 R % /W 00 R % /W 00 R % /W 00 R % /W 00 R % /W 00 R % /W 00, M_Q_R[..0] M_Q_R0 M_Q_R M_Q_R M_Q_R M_Q_R M_Q_R M_Q_R M_Q_R R % /W 00 R0 % /W 00 R % /W 00 R % /W 00 R % /W 00 R0 % /W 00 R % /W 00 R % /W 00 I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev R PULL UP 0. riday, June, 00 ate: heet of

0 PK# PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ N RT R % /W 00,, N_RT0 R % /W 00 I_RT0 R % /W 00,,0 LP_RT0 R.K % /W 00 PULL I PULL LOW U LON RT ULT U ORT RT RRV RRV RRV RRV YP PI PLL U PI PLL ULT YP PI LK U PI LK ULT YP I PLL U I PLL ULT U PROM PI TRP U ULT PI TRP ULT RRV 0 0p 0V ±0.p 00 NPO(NU) 0 0p 0V ±0.p 00 NPO(NU) RLK RLK0 0.0u V 0% 00 XR _RX0P 0.0u V 0% 00 XR _RX0N 0.0u V 0% 00 XR _RXP 0 0.0u V 0% 00 XR _RXN _TX0P _TX0N _TXP _TXN,,,,,,.VM 0mil L0 00Ω±% 00Mz 000m MT00 ML-00-000P-N M.LYR LR PI_PV PI_VR 0.u V 0-0% 00 YV 0 0u 0V 0-0% 00 YV,,,,,,.VM 0mil L 0Ω±% 00Mz MT00 ML-00-00P-N M.LYR LR 0 0u 0V 0-0% 00 YV 0.u V 0-0% 00 YV x R 0 % /W 00 R 0 % /W 00 R.K % /0W 00,0, PU_TP0 R 0 % /W 00 PU_PLP0 PI_IRQ0 PI_IRQ0, PI_IRQ0 PI_IRQ0, PI_IRQ0,,0,,,,,,,,,,,,,,,,,,,,,0,,,,, VM RP.K % 00* /W PR 0.mm PI_IRQ0, PI_IRQ0, PI_IRQ0 X L M M0 N0 K0 L0 0 J0 0 0 M N M N J K J K R0 R P K L P N P L J L J N M K P P0 J K J J K U _RT# PI_RLKP PI_RLKN PI_TX0P PI_TX0N PI_TXP PI_TXN PI_TXP PI_TXN PI_TXP PI_TXN PI_RX0P PI_RX0N PI_RXP PI_RXN PI_RXP PI_RXN PI_RXP PI_RXN PI_LRP PI_LRN PI_LI PI_PV PI_VR_ PI_VR_ PI_VR_ PI_VR_ PI_VR_ PI_VR_ PI_VR_ PI_VR_ PI_VR_ PI PI PI PI PI PI PI PI PI PI 0 PI PI PI PI PI PI XPR INTR PU_TP#/PLP# PI_TP# INT# INT# INT# INT# INT#/PIO INT#/PIO INT#/PIO INT#/PIO X 00 Part of PI INTR PI LK PILK0 PILK PILK PILK PILK PILK PILK PILK PILK PILK PILK_ PIRT# 0/ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM 0/ROM /ROM /ROM /ROM /ROM /ROM /ROM0 /ROM /ROM /ROM 0/ROM /ROM /ROM /ROM 0 0#/ROM0 #/ROM #/ROMW# # RM# VL#/ROM0 IRY# TRY#/ROMO# PR/ROM TOP# PRR# RR# RQ0# RQ# RQ# RQ#/PM_RQ0# RQ#/PLL_P/PM_RQ# RQ#/PIO RQ#/PIO NT0# NT# NT# NT#/PLL_P/PM_NT0# NT#/PLL_P0/PM_NT# NT#/PIO NT#/PIO LKRUN# LOK# PI LK:.Route the feedback clock from PILK to PILK_ with minimum length (<=.0")..Match the length of all PI clocks to within " (=ns). L L L L M M M M N N N J W Y W Y V Y V W V U U U T R R R P P P N V T T U T J K J K J PI_LK0_R PI_LK_R PI_LK_R PI_LK_R PI_LK_R PI_LK_R PI_LK_R PI_LK PI_LK PI_LK PI_LK PIRT0 PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_/00 PI_/0 PI_/0 PI_/0 R % /W 00 R0 % /W 00 R % /W 00 R % /W 00 R0 % /W 00 R0 % /W 00 R % /W 00 PI_/0[..0] PI_[..0] PI_LK0 PI_LK PI_LK PI_LK PI_LK PI_LK PI_LK PI_LK0 PI_LK PI_LK PI_LK PI_LK PI_LK PI_LK R0 % /W 00 PI_[..0],, 0 PI_/0[..0],, R PI_RM0,,, PI_VL0,,, PI_IRY0,,, PI_TRY0,,, PI_PR,, PI_TOP0,,, PI_PRR0,,, PI_RR0,,, PI_RQ00, PI_RQ0, PI_RQ0, PI_RQ0, PI_RQ0 PI_RQ0 M_I0 PI_NT00, PI_NT0, PI_NT0, PI_NT0, PI_NT0 PI_NT0 RII, PI_LKRUN0,,,,, PI_LOK0 PI_LK0 PI_LK PI_LK PI_LK PI_LK PI_LK 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO 0p 0V ±0.p 00 NPO(NU) 0p 0V ±0.p 00 NPO(NU) 0p 0V ±0.p 00 NPO(NU) 0p 0V ±0.p 00 NPO(NU) 0p 0V % MT00(NU) W 0 % /W 00,,0,,,,,,,,,,,,,,,,,,,,,0,,,,, PI_RT0,,,,0 LP_0 LP_ LP_ LP_ R 00K % /W 00,,0,,,,,,,,,,,,,,,,,,,,,0,,,,, R 0K % /W 00 R 0K % /W 00 R 00K % /W 00 R 00K % /W 00 R 00K % /W 00 TRP PI_LK PI_LK PI_LK PI_LK PI_LK,,0,,,,,,,,,,,,,,,,,,,,,0,,,,, PI_LK PI_LK R 0K % /W 00(NU) R 0K % /W 00(NU) R 0K % /W 00 R 0K % /W 00(NU) R 0K % /W 00 R 0K % /W 00 R 0K % /W 00 R 0K % /W 00(NU) R0 0K % /W 00(NU) R0 0K % /W 00 VM VM VM PU_PWR _INTR _NMI R W 0 % /W 00 _INIT0 _MI0 _PULP0 _INN0 _0M0 _RR0 _TPLK0 R 0 % /W 00,0 PRLPVR MRQ0 Y XTL.000Kz IP PIN 0p ±0ppm NX.K0 NK LR R R00 0M % /W 00 X 0 X PU XTL PU_P/LT_P INTR/LINT0 NMI/LINT INIT# MI# LP#/LT_TP# INN# 0M# RR# TPLK#/LLOW_LTTP MUXL/PIO0 PRLPVR MRQ# LT_RT# LP RT I 00 K PIN TI L0 L L L LRM# LRQ0# LRQ# RIRQ RTLK RT_IRQ#/PWR_TRP VT RT_N J K LP_0 LP_ LP_ LP_ R 0K % /W 00 R 0K % /W 00 TRP.VT 0mil,,0,,,,,,,,,,,,,,,,,,,,,0,,,,, LP_0,, LP_,, LP_,, LP_,, LP_RM0,, LP_RQ00 LP_RQ0 PI_RIRQ,,, RT_V 0p 0V ±0.p 00 NPO(NU) ULKO_ V,,,,,,,0,,, VM R0 0K % /W 00(NU) R 0K % /W 00(NU) R 0K % /W 00(NU) R 0K % /W 00(NU) TRP PI_ PI_ PI_ PI_,,0,,,,,,,,,,,,,,,,,,,,,0,,,,, TRP RV PI_ PI_ PI_0 PI_ PI_ R 0K % /W 00 R 0K % /W 00 R0 0K % /W 00 R 0K % /W 00 VM RP 0K % 00X /W PR(NU) R 0K % /W 00(NU) 0M % /W 00 p 0V % 00 NPO MURT p 0V % 00 NPO MURT PULL I PULL LOW PWRON PWRON MNUL PWR ON ULT UTO PWR ON _OUT U U TRP INOR U TRP ULT RT_LK INTRNL RT ULT XTRNL RT (NOT UPPORT W/ IT ) PI_OUT IO Mz IO Mz ULT PI_LK Mz O MO ULT Mz XTL MO PI_LK U PY PWROWN IL ULT U PY PWROWN NL PI_LK U INT. PLL ULT U XT. Mz PI_LK Mz O MO ULT Mz XTL MO PI_LK PU I/ = K PU I/ = P ULT PI_LK ROM TYP, = PI ROM,L = LP ROM I ULT L, = LP ROM II L,L = W ROM PI_LK I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev 00 PI()/LP(/) 0. riday, June, 00 ate: heet of 0 0

erial T :.Route the transmit and receive pairs with a 00 ohm /- % differential impedance..place coupling capacitors on each differential pair, locating them close to the 00/0..The maximum length for the differential pairs is 0.0", including the 00/0 substrate lengths, in order to minimize signal attenuation..match the lengths (including the 00/0 substrate lengths) within each differential pair to within 0 mils..use the same number of vias on both traces in a differential pair (with a maximum of two vias per trace, including the through hole connector pin)..void stubs on the differential pairs. Use the connector pins for test points..reference all differential pairs to a solid N plane, with no splits under the signal traces. a.place 0 mil wide N guard traces on either side of each differential pair. Maintain a space of at least 0 mils between the ground guards and the differential pair. b.onnect the N guard traces to the N plane under the 00/0, at the erial T connectors, and at every 0." in between..it is critical to use R vias around the connector pins and for normal layer changes. The power and ground plane antipads must be spaced at least mils on all sides from the via pads and barrel to minimize capacitance.,,0,,,,,,,0,,,,,,,,,,,,,,0,,,,, VM I PK0 TRP R 0K % /W 00(NU) R 0K % /W 00 U K J K J K J K J K J K J K J K0 J0 J J K K 0 0 0 0 0 K J K K 0 J T_RX- T_RX T_TX0 T_TX0- T_RX0- T_RX0 T_TX T_TX- T_RX- T_RX T_TX T_TX- T_RX- T_RX T_TX T_TX- T_L T_X T_X T_T# PLLV_T XTLV_T V_T_ V_T_ V_T_ V_T_ V_T_ V_T_ V_T_ V_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_0 P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_0 P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_ P_T_0 P_T_ P_T_ 00 Part of RIL T RIL T POWR ONRY T /00 PRIMRY T /00 I 00 K PIN TI PI_IORY PI_IRQ PI_0 PI_ PI_ PI_K# PI_RQ PI_IOR# PI_IOW# PI_# PI_# PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ I_IORY I_IRQ I_0 I_ I_ I_K# I_RQ I_IOR# I_IOW# I_# I_# I_0/PIO I_/PIO I_/PIO I_/PIO I_/PIO I_/PIO0 I_/PIO I_/PIO I_/PIO I_/PIO I_0/PIO I_/PIO I_/PIO I_/PIO I_/PIO I_/PIO0 T_T_ T_T_ T_T_ T_T_ T_T_ T_T_ T_T_ T_T_ T_T_ T_T_0 T_T_ T_T_ T_T_ 0 I_PIORY IRQ_R I_P0 I_P I_P I_PK0 I_PRQ 0 I_PIOR0 I_PIOW0 I_P0 I_P0 I_P0 I_P I_P I_P I_P I_P 0 I_P I_P0 I_P I_P K I_P I_P K I_P I_P I_P I_P I_P I_P J I_P I_P J I_P0 I_P0 I_P I_P I_P I_P 0 I_P I_P 0 I_P I_P I_P I_P V I_IORY T IRQ_R T I_0 U I_ T I_ V0 I_K0 U I_RQ W I_IOR0 W0 I_IOW0 R I_0 R I_0 V I_0 W I_ Y0 I_ I_0 0 I_ I_ Y I_ I_ I_ I_ I_ I_ I_ I_ I_ I_ I_ I_ Y I_0 I_ I_ I_ W I_ I_ Y I_ I_ V I_ I_0 U I_ I_ I_ I_ K J J0 J K K0 R 0 % /W 00 R00 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R 0 % /W 00 R0 0 % /W 00 RP 0 % 00X /W PR RP 0 % 00X /W PR RP 0 % 00X /W PR RP 0 % 00X /W PR RP 0 % 00X /W PR RP 0 % 00X /W PR RP 0 % 00X /W PR RP 0 % 00X /W PR I P I P I P I P0 I P I P I P I P I P I P I P0 I P I P I P I P I P I 0 I I I I I I I I I I I I 0 I I I I PIORY IRQ I P0 I P I P I PK0 I PRQ I PIOR0 I PIOW0 I P0 I P0 I P[..0] I IORY IRQ I 0 I I I K0 I RQ I IOR0 I IOW0 I 0 I 0 I [..0] T/00/: ll the I data lines T[:0], IOR#, and IORY signals should be routed as follows:.maximum signal length between 00/0 and I connectors is "..Match the strobe signals (IOR# and IORY) within 00 mils of each other..match the data lines to /- 0 mils of the average length of the two strobes (IOR# and IORY)..Route the control and strobe signals (IOW#, IOR#, IORY, RQ), which are critical, with a space to height ratio of : to other signals..place the optional series termination resistors for the above control/strobe signals as close as possible to the I connectors. I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) - LM (R00M 00) ize ocument Number Rev 00 I/T(/) 0. riday, June, 00 ate: heet of

.Route U.0 differential pairs to minimum trace length..route U.0 differential pairs to maximum spacing from all other high-speed signals..round-reference the U.0 differential pairs wherever possible..route U.0 differential pairs with the minimum number of right-angle turns and vias to minimize impedance discontinuities..o not route U.0 differential pairs near or underneath clock chips, oscillators, or crystals..void stubs on U.0 differential pairs when connecting termination components..o not route U.0 differential pairs across splits in the V or N plane, and avoid crossing anti-etch in the planes..if a layer change cannot be avoided, place a capacitor directly adjacent to the signal vias to minimize the return current loop for single-ended modes..lways route U.0 differential pairs symmetrically. 0.Keep U.0 differential pairs away from the PU or core logic devices..keep the U.0 differential pairs away from the edge of the P to ensure that the impedance is maintained and the MI is minimized..route the U.0 differential pairs with a 0 ohm differential impedance..match the length of signals within each U.0 differential pair to within 0 mils..place the common mode choke as close as possible to the U connector..o not place any edge-shaping capacitors on the U signal pairs..maintain at least a 0-mil clearance from the U.0 differential pairs to any other signal or net..maintain at least a -mil clearance from U.0 differential pairs to any anti-etch (copper void) in the reference plane..keep the net from the U_ROMP ball of the 00/0 to the compensating resistor as short as possible..route U_ROMP the net with a minimum width of 0 mils. Maintain at least a 0-mil separation from other nets. 0 0p 0V ±0.p 00 NPO(NU) LINK PI_Q_PM0 LP_0 LP_0 _K0 _KR LI0 TLRT0 PIO PIO PIO VOLT_LRT0 MLK MT PIO PIO PIO PIO PIO PIO,0,,,,,,0,,, MINW0_,0,,,,,,0,,, R.K % /W 00 R.K % /W 00 R.K % /W 00 R0.K % /W 00 R.K % /W 00 R.K % /W 00 R.K % /W 00 R 0K % /W 00,,0,,,,,,,0,,,,,,,,,,,,,,0,,,,, R 0K % /W 00 R 0K % /W 00 R 0K % /W 00 R 0K % /W 00 R.K % /W 00 R.K % /W 00 R 0K % /W 00 R 0K % /W 00 R 0K % /W 00 R 0K % /W 00 R 0K % /W 00 R 0K % /W 00 V VM RT IRUIT,0,,, PMUV V 0.u V 0-0% 00 YV 0mil,, 0mil 0mil 0 0 0, PI_Q_PM0 PM_RI0 LP_0 LP_0 _K0 _KR _TRMTRIP0 _LI0 PM_TLOW0 0,,0 MLK MT,, _PWR U_TT0 PM_RMRT0 _LKM VRM_PWR,, _ITLK _OUT _IN0 _IN _IN _IN _IN0 _ITLK _OUT TRP.Route the VT signal as a power signal and with a width of at least 0 mils. _YN _RT0,,0,,,,,,,0,,,,,,,,,,,,,,0,,,,, MO-P.u 0V 0-0% MT00 YV R 0K % /W 00 0.u V 0-0% 00 YV 0 _I0 0mil _LI0,0,,,,,,0,,, PKR ITLK _OUT _IN0 _IN _IN VM 0 TLRT0 LINK LP_0 LP_0 _PWR VOLT_LRT0 V MLK MT R.K % /W 00 R0 0K % /W 00 R 0K % /W 00 R 0K % /W 00 IO TKY -0PT 0V 0.0 O- PIN NMKO LR R 00 % /W 00 - N - N UIO PIN 0-000 0-00-0 0p 0V ±0.p 00 NPO(NU) R IO TKY -0PT 0V 0.0 O- PIN NMKO LR 0 % /W 00(NU) 0p 0V ±0.p 00 NPO(NU) R0 0 % /W 00 R % /W 00 RT_V R 0K % /W 00 R 0K % /W 00 TRP 0mil LI0 R W 0 % /W 00 0p 0V ±0.p 00 NPO(NU) p 0V % 00 NPO(NU) R0 0K % /W 00 R 0K % /W 00 R0 K % /W 00 R.K % /W 00 R % /W 00 0.u V 0-0% 00 YV PIO PIO PIO PIO PIO PIO PIO PIO PIO R 0K % /W 00 0u 0V 0-0% MT00 YV 0YV0Z TK J J K J K J K U 00 TLRT#/TMP_LRT#/PIO0 LINK/PM# PI_PM#/VNT# RI#/XTVNT0# LP_# LP_# PWR_TN# PWR_OO U_TT# TT TT0 0IN KRT# MLRT#/TRMTRIP#/VNT# LP_PM#/VNT# LP_MI#/XTVNT# VOLT_LRT#/VNT# Y_RT#/PM# WK#/VNT# RMRT# M_X/O M_X IO_LK ROM_#/PIO I#/PIO VT/PIO P_TP#/PIO P_UY#/PIO NOUT0/PIO PKR/PIO L0/PO0# 0/PO# _L/PIO _/PIO _L/PIO _/PIO N N N N _ITLK _OUT _IN0 _IN _IN _YN _RT# PI_OUT LK / RT Keep aps very close to 00/0 PIO (NOT U) PI / WK UP VNT I 00 K PIN TI Part of M_X/ULK M_X U_ROMP U_VROUT U_TT U_TT0 U_O0#/PM0# U_O#/PM# U_O#/NOUT/PM# U_O#/PM# U_O#/PM# U_O#/PM# U_O#/N_LRT#/VNT# U_O#/_LRT#/VNT# U INTR U PWR U_P0 U_M0- U_P U_M- U_P U_M- U_P U_M- U_P U_M- U_P U_M- U_P U_M- U_P U_M- VTX_0 VTX_ VTX_ VTX_ VRX_0 VRX_ VRX_ VRX_ V _U U U U U U U U U U_0 _U U U U U U U U U U_0 _U U U U_ 0 0 0 0 0 0 0 0 R.V U PWR:.VTX [:0], VRX [:0]: a.onnect to a separate power plane island. b.onnect each of these eight balls directly to the U PWR plane with separate vias. d.place high frequency decoupling capacitors as close to the U power and ground balls as possible. d.use two vias on each capacitor pad where possible to minimize inductance.._u:onnect each of these balls directly to the N plane..v: Isolate this rail from the system.v_ power rail using a ferrite bead, and connect this ball using at least a 0-mil wide trace..: This ball is the ground connection for the U PLLs. onnect this ball directly to the N plane with a separate via. R 0 % /W 00 R 0K % /W 00(NU).KΩ % /0W M MT00 R K % /W 00 R K % /W 00 R.K % /W 00 R UPP 0 UPN 0 UPP 0 UPN 0 UPP 0 UPN 0 UP0P 0 UP0N 0 V_U 0 % /W 00(NU),0,,,,,,0,,, 0Ω±% 00Mz MT00 ML-00-00P-N M.LYR LR U_LKM O00 0 O0 0 O0 0 O0 0 V,0,,,,,,0,,, 0Ω±% 00Mz MT00 ML-00-00P-N M.LYR LR V MINW0_ Q_MI0 L L0 V_U 0mil LM (R00M 00) 0mil I International omputer, Inc. L., No. 00, Yang uang t., Neiu, Taipei, Taiwan, ( - ) -.V 0u 0V 0-0% 00 YV 0.u V 0-0% 00 YV 0.u V 0-0% 00 YV 00p 0V 0% 00 XR 0u 0V 0-0% 00 YV 0.u V 0-0% 00 YV 0.u V 0-0% 00 YV 00p 0V 0% 00 XR 0u 0V 0-0% 00 YV MO-P u.v 0/-0% MT00 YV 0.u V 0-0% 00 YV ize ocument Number Rev 00 PI//U(/) 0. riday, June, 00 ate: heet of