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Transcript

1 i-v8

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3 TABLE OF ONTENTS SETION SPEIFIATIONS SETION INSIDE VIEWS SETION DISASSEMBLY INSTRUTIONS SETION IRUIT DESRIPTION - REEIVER IRUITS TRANSMITTER IRUITS PLL IRUITS OTHER IRUITS POWER SUPPLY IRUITS PU PORT ALLOATIONS UT-8 IRUIT DESRIPTION UT-8 POWER SUPPLY IRUITS UT-8 PORT ALLOATIONS... - SETION ADJUSTMENT PROEDURES - PREPARATION I-V8 ADJUSTMEN UT-8 ADJUSTMENT... - SETION PARTS LIST SETION 7 MEHANIAL PARTS AND DISASSEMBLY SETION 8 SEMIONDUTOR INFORMATION SETION 9 BOARD LAYOUTS 9 - MAIN UNIT SETION 0 BLOK DIAGRAM SETION VOLTAGE DIAGRAM SETION UT-8 DIGITAL UNIT (OPTIONAL UNIT) - UT-8 BOARD LAYOUT UT-8 SEMIONDUTER INFORMATION UT-8 BLOK DIAGRAM UT-8 VOLTAGE DIAGRAM... -

4 SETION SPEIFIATIONS GENERAL Frequency range : TX RX MHz MHz MHz* MHz* MHz [USA] [EUR] [EXP], [SA] [USA], [EXP], [SA] [EUR] *Specifi cations are guaranteed within.000 to MHz range only. Operating temperature range : 0 to 0 ; + F to +0 F Operating mode : FD, FE, F7W* (*with optional digital unit UT-8) Frequency stability : ±. ppm ( 0 to +0 ; + F to +0 F) Antenna impedance : 0 Ω (B Type) Power supply requirement : Specified Icom's battery pack only (Operating voltage range;.0 0. V) Number of memory channels : 07 channels (Including scan edges and call channel) Scan types : Program/Memory/Skip/Priority/Tone scans Tuning steps :, 0,.,, 0,, 0 and 0 khz urrent drain (at 7. V D; approx.) : TX High Middle Low. A.0 A.0 A RX Max. audio Stand-by Power save Less than 0 ma Less than 80 ma Less than 0 ma Dimensions (Projections not included) :.0 (W) 9.0 (H). (D) mm; /8 (W) / (H) /8 (D) in. Weight (except antenna, battery pack) : Approx. 00 g (7 / oz) Data connector : -conductor. (d) mm ( /0") TRANSMITTER Output power (at 7. V D) Modulation system Maximum deviation Spurious emissions Ext. microphone connector : 7.0 W (High),.0 W (Middle), 0. W (Low) : Variable reactance frequency modulation : ±. khz (Narrow), ±.0 khz (Wide) : Less than 0 dbc : -conductor. (d) mm ( /0")/. kω REEIVER Receiving system Intermediate frequencies Sensitivity Squelch sensitivity (at threshold) Selectivity Intermodulation Spurious image rejection Audio output Ext. speaker connector : Double conversion superheterodyne system : st;. MHz, nd; 0 khz : Less than dbµ at db SINAD (0. µv typ.) : Less than dbµ (0. µv typ.) : More than db (Wide; db typ.) More than 0 db (Narrow) : More than db ( db typ.) : More than 0 db (80 db typ.) : More than 00 mw at 0% distortion with an 8 Ω load : -conductor. (d) mm ( /8")/8 Ω All stated specifications are subject to change without notice or obligation. -

5 SETION INSIDE VIEWS MAIN UNIT Top view Bottom view TX drive amplifier (Q: RD0MUS) Power amplifier (Q: RDMVS) Pre-emphasis circuit (I: LMVIPWR) Antenna switch (D: MA77) RF amplifier (Q: SK8YB) st IF mixer (Q: SK8YB) PU regulator (I: S-80AM) FM IF I (I: TAFN) IF amplifier (Q: S00) PLL I (I9: MBE0S LPFV) MI mute/analog switch (I: D0BPWR) VO circuit AF power amplifier (I: NJM070M) DA converter (I0: MFP) PU (I8: M00FRP) Digital/Analog switch (I: D0BPWR) Scrambler switch/ UN scrambler switch (I: D0BPWR) AL switch (I: D0BPWR) Optional unit regulator (Q: SA7, Q: S, D: SS00) -

6 SETION DISASSEMBLY INSTRUTIONS. Removing the chassis panel q Remove the knob A and jack cap B. w Unscrew nut. e Unscrew screws D ( 0 mm, black) and screws E ( mm, black) from the chassis. r Unplug the speaker connector (J). t Take off the chassis in the direction of the arrow.. Removing the MAIN unit. q Remove the Jack seal F. w Unsolder points G of the shield cover. e Unscrew nut H and screws I ( mm, black). r Unscrew screws J ( mm, black) and screws K ( mm, silver) and remove the shield cover. t Unsolder points L. y Unscrew screws M ( mm, silver). u Take off the MAIN unit in the direction of the arrow. J K G I L F Shield cover M MAIN unit H G hassis Guide hole -

7 SETION IRUIT DESRIPTION - REEIVER IRUITS -- ANTENNA SWITHING IRUIT The antenna switching circuit toggles receive line and transmit line. This circuit does not allow transmit signals to enter the receiver circuits. Received signals from the antenna are passed through the low-pass filter (LPF: L, L, ) and applied to the / type antenna switching circuit (D, D). While receiving, no voltage is applied to D and D. Thus, the receive line and the ground are disconnected and L, L8,, 7 and function as a two-stage LPF which leads received signals to the RF circuits via the limiter (D0). -- RF IRUITS The RF circuits amplify received signals within the range of frequency coverage and filters off out-of-band signals. The signals from the antenna switching circuit are passed through a tunable bandpass filter (BPF: D9, L, 79, 8), then applied to the RF amplifier (Q). The amplified signals are passed through the limiter (D7) and another two-stage BPF (D, D, D, L9, L7, 9, 9, 9, 97, 0 0, 07) to suppress unwanted signals. The filtered signals are then applied to the st mixer circuit. -- st MIXER AND st IF AMPLIFIER IRUITS The st mixer circuit converts received signals into the st intermediate frequency (IF) signal by mixing with the local oscillator (LO) signal. The converted st IF signal is filtered at the st IF filter, then amplified at the st IF amplifier. The signals from the two-stage BPF are converted into the. MHz st IF signal at the st mixer (Q) by being mixed with the st LO signals generated at the VO (Q7, D9, D0). ND IF AND DEMODULATOR IRUITS "SQLIN" signal from the D/A converter (I0, pin ) The st IF signal from the st mixer is passed through the crystal filter (FI) to suppress unwanted signals, and the limiter (D) and then applied to the st IF amplifier (Q). The amplified st IF signal is applied to the FM IF I (I, pin ). -- nd IF AND DEMODULATOR IRUITS The st IF signal is converted into the nd IF signal and demodulated by the FM IF I. The FM IF I contains nd mixer, limiter amplifier, quadrature detector, etc. in its package. The st IF signal from the st IF amplifier is applied to the FM IF I (I, pin ), and mixed with the.9 MHz nd LO signal from the tripler (Q8) at the mixer section, to convert into the 0 khz nd IF signal. The nd IF signal is output from pin and is filtered by the ceramic filter (FI) to suppress the heterodyne noise. The filtered signal is applied to I (pin ) again and amplified at the limiter amplifier section and demodulated by the quadrature detector. The quadrature detector is a detection method which uses a ceramic discriminator (X). Q is a mode switch and toggles the detecting mode from wide and narrow, controlled by the "DIGI_W" signal from PU (I8, pin 8). The demodulated AF signals are output from pin AF IRUITS The AF signals from FM IF I (I, pin 9) are passed through the AN switch (I, pins 0, ), HPF (I, pins, 7), analog switch (I, pins, ), the LPF (I, pins, ) and analog switch (I, pins 0, ). The signals from the analog switch are applied to the D/A converter (I0, pins, ) to adjust the AF output level, and then passed through the emphasis switch (Q7) whitch toggles the AF response characteristic according to the selected operating mode (analog/fm or digital). The AF signals from the emphasis switch are applied to the AF amplifier (I) to obtain 00 mw of AF output power. The amplified AF signals are applied to the internal speaker (SP) via [SP] jack (J). FI.9 MHz nd LO signal AF "DET" signal to the AF circuits Q Active filter FM detector X DIGI_W signal from the PU (I8, pin 8) Noise AMP Limiter AMP Noise detector R Noise comparator Mixer PLL I (I9) X Q8. MHz I TAFN st IF signal from the IF amplifier (Q) "NOIS" signal to the PU (I8, pin ) -

8 -- SQUELH IRUIT Squelch circuit mutes AF output signal when no signals are received. A portion of the AF signals from the FM IF I (I, pin 9) are applied to the D/A converter (I0, pin ) to control its level. The level controlled signals are output from pin and applied to the active filter (I, pins 7, 8; R8 R88,, ). The filtered signals are applied to the noise amplifier section to amplify the noise components only. The amplified noise components are detected at the noise detector section, and output from pin as the NOIS signal and applied to the PU (I8, pin ). Then the PU outputs AFON signal from pin 7 according to the NOIS signal level to toggle the AF regulator (Q, Q) ON/OFF. - TRANSMITTER IRUITS -- AL AMPLIFIER AND PRE-EMPHASIS IRUIT The AL (Audio Level ontrol) amplifier maintains the level of the audio signals from the microphone constant. The preemphasis circuit amplifies the audio signals within + db/oct pre-emphasis characteristic. When AL function is ON. The AF signals from the microphone are passed through the AL switch (I, pins, ) and applied to the AL amplifier (I7, pin ) to limit its level. The level limited signals are output from pin and passed through the another AL switch (I, pins 8, 9) and UN_SE switch (I, pins 0, ). The signals from UN_SE switch are then applied to the pre-emphasis circuit (I, pins 8, 0) to obtain frequency characteristic of + db/oct. When AL function is OFF. The audio signals from the microphone are passed through the AL switch (I, pins, and pins 0, ) and UN_SE switch (I, pins 0, ). The signals from UN_SE switch are then applied to the pre-emphasis circuit (I, pins 8, 0). The signals from the pre-emphasis circuit are passed through the analog switch (I, pins, ) and LPF (I, pins, ). The signals from the LPF are passed through another analog switch (I, pins 8, 9), digital/analog switch (I, pins 8, 9 and pins, ) and D/A converter (I0, pins, ) to adjust its level. The level adjusted signals from the D/A converter are applied to the modulator circuit (D). -- MODULATOR IRUIT The modulation circuit modulates the VO oscillating signal with the audio signals from the microphone. AF signals from the D/A converter (I0, pin ) are applied to the modulation circuit (D) to modulate the oscillated signal by changing the reactance of D at the VO (Q7, D9, D0). -- TRANSMIT AMPLIFIERS The VO output signal is amplified to transmit power level by the transmit amplifiers. The VO output signal is buffer-amplified by the buffer amplifiers (Q7, Q7) and passes through the TX/RX switch (D). The signals from the TX/RX switch are applied to the predriver (Q), driver (Q) and power (Q) amplifiers, to be amplified to the transmit output power level. The power amplifier output is applied to the antenna conector (J: HASSIS UNIT) via the antenna switching circuit (D), power detector (D, D), and two-stage LPFs. -- AP IRUIT The AP (Automatic Power ontrol) circuit stabilizes transmit output power and controls transmit output power High, Middle and Low. The RF output signal from the power amplifier (Q) is detected at the power detector (D, D). The detector converts the RF signals into D voltage, and the detected voltage is applied to the AP amplifier (I, pin ). The transmit output power setting voltage T is applied to input terminal of the AP amplifier (I, pin ) as the reference voltage. The AP amplifier controls the bias of the pre-driver (Q), driver (Q) and power amplifier (Q) by comparing the detected voltage and the reference voltage. Thus the AP circuit maintains a constant output power. AP IRUITS T RF signals from TX/RX SW Predrive AMP Q Q Drive AMP Q Power AMP LPF Power detecter ANT SW LPF To ANT T + AP TRL IA D D PS Q7 TX -

9 - PLL IRUITS -- GENERAL PLL circuits control the VO circuit. I9 is a PLL I and contains prescaler, programmable counter, programmable divider, phase detector, charge pump in its package. The VO (Q7, D9, D0) directly generates both of the transmit frequency and the st LO frequency. The VO shift circuit (Q77, D8) is used for switching the oscillating frequencies between transmit and receive. While receiving, only L is connected to the VO and the VO generates the st LO frequency. While transmitting, L and L are connected to the VO to generate the transmit frequency. The PLL sets the divided ratio based on the N-data from the PU (I8), and compares the phase of the VO output with the reference frequency (. MHz) generated by X. If the oscillated signal drifts, the phase of its frequency changes from the phase of the reference frequency, causing a lock voltage change to compensate for the drift in the oscillated frequency. -- TRANSMIT LOOP A portion of the generated signal at the VO (Q7, D9, D0) is applied to the PLL I (I9, pin 8) via buffer-amplifiers (Q, Q7). The applied signal is divided at the prescaler section and programmable divider section, then applied to the phase detector section. The phase detector compares the input signal with the reference frequency, and then outputs the control signal (pulse-type) from pin via the charge pump section. The pulse-type signal is converted into D voltage at the loop filter (R R8, 7 7), and then applied to the VO (Q7, D9, D0) as the lock voltage. PLL IRUITS -- REEIVE LOOP The generated st LO signal is applied to the PLL I (I9, pin 8) via the buffer-amplifiers (Q, Q7) and is divided at the prescaler section and the programmable divider section, then applied to the phase detector section. The phase detector compares the input signal with the reference frequency, and then outputs the control signal (pulse-type) from pin. The pulse-type signal is converted into D voltage at the loop filter (R R8, 7 7), and then applied to the VO (Q7, D9, D0) as the lock voltage. - OTHER IRUITS -- TSS/DTS IRUIT (DEODING) The TSS/DTS signal from FM IF I (I, pin 9) is filtered at the LPF (Q). The filtered signal is then applied to the PU (I8, pin ) to control the AF amplifier according to the received TSS/DTS signal. -- TSS/DTS IRUIT (EODING) TSS The TSS signal is generated by the PU (I8) and output from pin 9 and passed through the LPF (R,, 9) and TSS switch (Q8). The TSS signal is then applied to the splatter filter (I, pin ) to be mixed with the microphone audio signals. The filtered TSS signal is then output from pin and applied to the digital/analog switch (I, pins 8, 9 and pins, ) via the analog switch (I; pins 8, 9). The TSS signal from the digital/analog switch (I, pin ) is applied to the D/A converter (I0, pin ) to adjust its level. The level adjusted TSS signal is then applied to the modulator circuit (D). DTS The DTS signal is also generated by the PU (I8) and output from pin 9. The DTS signal is applied to the DTS amplifier (I, pin ) via DTS switch (I, pins, 7). The amplified DTS signal is applied to the D/A converter (I0, pin ) to adjust its level. The level adjusted DTS signal is then applied to both of the modulator circuit (D) and the reference frequency oscillator (X). Buffer Q "LOINV" signal to the PU (I, pin ) R Loop filter VO SHIFT Q77, D8 VO Q7, D9, D0 Buffer Q7 I MBE0SL Buffer Q7 Buffer Q D D to st mixer circuit to transmitter circuit harge Programmable 8 Prescaler pump divider LPF.9 MHz nd LO signal to the FM IF I (I, pin ) Q8 Phase detector Shift register 9 0 PLLK PLLDATA PLLSTB PLL control signals from D/A converter (I0, pins 8). MHz reference signal from reference frequency osciilator (X) -

10 - POWER SUPPLY IRUITS -- VOLTAGE LINES LINE PU SWV T PS R VO +V DESRIPTION The voltage from the attached battery pack. ommon V for the PU (I8) converted from the line at the PU regulator circuit (I). ommon V line converted from the line at the SW regulator circuit (Q Q7, D9) controlled by the "PWRON" signal. V for the transmit circuits regulated from the SWV line by the T regulator (Q). The regulator is controlled by the "T" signal from the PU (I8, pin 80). V for the power save line regulated from the SWV line by the PS regulator (Q). The regulator is controlled by the "PS" signal from the PU (I8, pin 9). V for the receive circuits regulated from the SWV line by the R regulator (Q). The regulator is controlled by the "R" signal from the PU (I8, pin 8). V for the VO circuit regulated from the SWV line by the VO regulator (Q). The regulator is controlled by the "PSVO" signal from the PU (I8, pin ). V for the optional unit power supply regulated from the line by the option power supply regulator (Q, Q, D). The regulator is controlled by the "OP_PS" signal from the PU (I8, pin 9). - PORT ALLOATION -- PU (I8) PIN NUMBER PORT NAME DESRIPTION LVIN Input port for PLL lock voltage. REMO Input port for remote control microphone. SD Input port for receiving signal strength detect signal. TIN Input port for TSS/DTS signals. 7 DET Input port for weather alert tone detect signal. 8 LED Outputs LD backlight control signal. HIGH : Lights ON 9 PTT Input port for [PTT]. 0 MIS Outputs AF filter switch (I) control signal. HIGH : While transmiting AN Output ports AN switch (I) control signal. DIGITAL Input port for UT-8 accept/refuse signal. LOW : Accept UN_SE Output ports UN_SE switch (I) control signal. SHIFT Outputs PU (I8) clock control signal. 9 RESET Input port for "RESET" signal. PWRSW Input port for [PWR]. LOW : While pushing [PWR] PIN NUMBER PORT NAME DESRIPTION NOIS Input port for "NOIS" signal. 8 ESDA I/O port for EEPROM (I7). 9 ESK Outputs clock signal for EEPROM (I7). 0 LIN Input port for cloning data. LOUT Output port for cloning data. OPSO Outputs serial data for optional unit. SI Input port for DTMF decode signal. SERET Outputs secret switch (I) control signal. BUSY Outputs receive detection (busy) signal to UT-8. 0 OPT OPT I/O ports for optional unit. AL Outputs AL switch (I) control signal. HIGH : During digital mode operation. THROUGH Outputs AL switch (I) control signal. HIGH : During analog mode operation. DI_SE Outputs moddulation/demodulation mode switching signal. HIGH : During digital mode operation MMUTE Outputs analog switch (I) control signal. 9 RMUTE Outputs audio mute signal. HIGH : While muting OPV OPV Input ports for optional unit type detect signal. TX_DIGI Outputs transmit audio frequency characteristic control signal. LOW : During digital mode operation. PTTO Input port for transmit request control signal from UT-8. 7 PTTI Output port for transmit request control signal to UT-8. 8 DV Output port for DV line ( V power supply; I) control signal. HIGH : Power ON 9 OP_PS Outputs option power supply (Q, Q, D) control signal. HIGH : Power ON 0 OPSK Outputs clock signal for optional unit. RX_MUTE Input port for RX mute signal for digital mode operation. PSVO Outputs PS regulator (Q) control signal. LOW : Power ON PLPS Outputs power save control signal to the PLL I (I9). LOW : Power saved DASTB Outputs strobe signal to D/A convertor (I0). DADATA Outputs serial data to D/A convertor (I0). 7 PLLSW Outputs PLL loop filter switch (I0) control signal. 8 PLLK Outputs clock signal to PLL I (I9). 9 PLLDATA Outputs serial data to the PLL I (I9). -

11 PIN NUMBER PORT NAME DESRIPTION 70 PLLSTB Outputs PLL strobe signal. 7 AFON Outputs AF regulator (Q, Q) control signal. HIGH : While emitting audio 7 DUSE Outputs LPF cut-off frequency control signal to the TSS switch (Q8). LOW : When TSS or no signaling system is in use. HIGH : DTS is in use. 7 7 KR0 KR Input ports for keypad. 78 UNLK Input port for PLL unlock signal. 79 EMPHASIS Outputs emphasis switch (Q7) control signal. HIGH : During FM mode operation. 80 T Outputs T regurator (Q) control signal. LOW : While transmitting 8 DEGI_W Outputs detect circuit (Wide/Narrow) switch (Q) control signal. HIGH : During narrow mode operation. 8 R Outputs R regulator (Q) control signal. LOW : During receive 8 TX Outputs RF output power control signal. LOW : During transmit 8 90 KS0 KS Output ports for keypad. 9 PS Outputs PS regulator (Q) control signal. LOW : Power saved 97, 98 DIK, DIUD Input port for [VOL] control (S80). TONE Outputs DTMF, BEEP, 70 Hz tone signals, etc. -- D/A ONVERTER (I0) PIN NUMBER PORT NAME DESRIPTION T Outputs the tunable BPF tuning signal. The output signal is applied to BPF (D9, D, D). T Outputs the tunable BPF tuning signal. The output signal is applied to BPF (D, D). 0 T Outputs the tunable BPF tuning signal. The output signal is applied to BPF (D). Output port for transmit output power setting signal. The output signal is applied to the AP amplifier (I, pin ). VOLOUT Outputs AF output signals to the AF amplifier (I). DTS Input port for DTS signal from the DTS amplifi er (I). F Outputs reference frequency control voltage. MOD Outputs modulating audio signal to the modulator circuit (D). SQLIN Outputs squelch control signal to the noise active filter (I, pins 7, 8; R8 R88,, ). -

12 -7 UT-8 IRUIT DESRIPTION -7- REEIVER IRUIT The detected digital signals FMDET from the connected transceiver via the J0 (pin ) are amplified at the buffer amplifier (I, pin ). The amplified signals are applied to the GMSK modem circuit (I, pin ), and are then applied to the PU (I0) as clock synchronizer digital signal. The digital signals from the PU are applied to the AMBE voice ODE I (I) to press code extension, and are then applied to the linear ODE I (I0) as bits digital voice data. The applied digital signals are converted to the analog AF signals at the D/A converter section (I0), and are then applied to the connected transceiver via the J0 (pin ) as DAFOUT signal. -7- TRANSMITTER IRUIT The analog AF signals AMODIN from the connected transceiver via the J0 (pin ) are amplified at the buffer amplifier (I, pin ). The amplified signals are applied to the linear ODE I (I0, pin ) to convert bits digital voice data at the A/D converter section via the ADIN line. The digital signals are applied to the AMBE voice ODE I (I) to process code compression, and are then applied to the PU (I0). The digital signals from the PU convert to the GMSK base band signal at the GMSK modem (I), and are then amplified at the buffer amplifier (I, pin ). The amplified signals are applied to the connected transceiver via the J0 (pin ). -7- RESET IRUIT The UT-8 has the reset I (I0). The reset I outputs "RES" signal to the PU (I0, pin 7) when more than.8 V of voltage is applied to the port (pin ). -7- RS- IRUIT I is a RS- compatible serial interface I which converts data between the PU and the external equipment (ex. Personal omputer). -7- LEVEL ONVERTER IRUIT The level converter circuit (Q0 and Q0) converts communication data level between the PU (I0) and the connected transceiver s PU. Q0, Q0 and Q0 convert control signals level between the UT-8 and the I-V8. -8 UT-8 POWER SUPPLY IRUITS -8- VOLTAGE LINES LINE V.V.V -9 UT-8 PORT ALLOATIONS -9- MODEM I (I) PIN NUMBER DESRIPTION V from the connected transceiver via the J0 (pin 9). The V line is controlled by the + V control circuit (Q0 and Q). The circuit is controlled by the PSAVE signal from the PU (I0, pin 8 and 9). ommon. V converted from the V line by the.v regulator circuit (I). One of the. V line is controlled by the +V control circuit (Q00 and Q0). The circuit is controlled by the PSAVE signal from the PU (I0, pin 8 and 9). ommon. V converted from the. 8 V line by the.v regulator circuit (I). The circuit is controlled by the APWR signal from the PU (I0, pin ). PORT NAME MLK 7 AQ 9 TXDT 0 RXDT RXK TXK DESRIPTION Outputs.7 MHz clock signal to the PU (I, pin 9). Outputs the PLL bandwidth control signal while receiving. Outputs transmitting data signal to the PU (I0, pin ). Input port for receiving data signal from the PU (I0, pin ). Input port for receive clock signal from the PU (I0, pin ). Outputs transmit clock signal to the PU (I0, pin ). UT-8 BLOK DIAGRAM -"TXD_" signal to the J0, pin -"RXD_" signal to the J0, pin 7 Level converter Q0, Q0 PU ODE I0 Modem I Buffer IB "DMOD" signal to the J0, pin -"_RX" signal to the J0, pin -"_TX" signal to the J0, pin RS- I DSP ODE I Buffer IA "FMDET" signal from the J0, pin "DAFOUT" signal to the J0, pin Linear ODE I0 Buffer IB "AMODIN" signal from the J0, pin -

13 SETION ADJUSTMENT PROEDURES - PREPARATION REQUIRED TEST EQUIPMENTS EQUIPMENT GRADE AND RANGE EQUIPMENT GRADE AND RANGE D power supplies* Output voltage :.0 V D Frequency range : MHz Standard signal 8.0 V D Output level : 0. generator (SSG) µv to mv urrent capacity : A or more ( 7 to 7 dbm) Measuring range : 0. 0 W RF power meter Frequency range : MHz Frequency range : D 0 MHz Oscilloscope (terminated type) Impedance : 0 Ω Measuring range : V SWR : Less than. : Frequency range : MHz A millivoltmeter Measuring range : 0 mv to 0 V Frequency counter Frequency accuracy : ± ppm or better Input impedance : 8 Ω Sensitivity : 00 mv or better External speaker apacity : More than 0. W Frequency range : Hz Audio generator Output level : 00 mv Power attenuation : 0 or 0 db Attenuator Frequency range : 0 00 MHz apacity : More than W FM deviation meter Measuring range : 0 to ±0 khz *; For UT-8 adjustment only. AUTION!: BAK UP the originally programmed contents (Memory channels, all signs, ommon settings, etc.) in the transceiver using S-V8 LONING SOFTWARE before starting adjustment. When all adjustments are completed, these contents in the transceiver will be cleared. ONNETION Standard signal generator 0. µv to mv ( 7 dbm to 7 dbm) to the antenna connector DO NOT transmit while an SSG is connected to the antenna connector. FM deviation meter Attenuator 0 db / 0 db RF power meter 0. 0 W/0 Ω Frequency counter To [MI] jack To [SP] jack A millivoltmeter Audio generator JIG () 8 kω -conductor. (d) mm (/8 ) plug (LONE) ADJUSTMENT MODE DISPLAY I-V8 Operating frequency Adjustment item -

14 - I-V8 ADJUSTMENT -- KEY OPERATION FOR THE ADJUSTMENT Rotate [VOL] to adjust the value. Push [D LR] key to store the adjustment value and move to next adjustment item. Push []/[] key to move to next adjustment item without changing the value. -- FREQUEY AND TRANSMIT ADJUSTMENT ADJUSTMENT ADJUSTMENT ONDITION OPERATION ENTERING ADJUSTMENT MODE REFEREE FREQUEY TRANSMIT LOK VOLTAGE OUTPUT POWER (High) While pushing [], [] and [D LR] keys, turn power ON. onnect a frequency counter to the antenna connector through an attenuator. Transmitting Rotate [VOL] to set to.000 MHz ±00Hz. Push [D LR] key. Transmitting Push [D LR] key, then push [] key. (Do not release [PTT] button when pushing [D LR] key.) onnect an RF power meter to the antenna connector. Transmitting Rotate [VOL] to set the transmit power to 7.0 W. Push [D LR] key. (Middle) Transmitting Rotate [VOL] to set the transmit power to.0 W. Push [D LR] key. (Low) Transmitting Rotate [VOL] to set the transmit power to 0. W. Push [D LR] key. FREQUEY DEVIATION DIGITAL VO FREQUEY DEVIATION DTS WAVE FORM DIGITAL REFEREE FREQUEY DEVIATION Mode : Wide onnect an FM deviation meter to the antenna connector through an attenuator and set as : HPF : OFF LPF : 0 khz De-emphasis : OFF Detector : (P P)/ onnect an audio generator to [MI] jack and set as; Frequency : khz Level : 0 mv rms Transmitting Set the FM deviation meter as; HPF : OFF LPF : 0 khz De-emphasis : OFF Detector : (P P)/ No audio input Transmitting Mode : Wide onnect an oscilloscope and the FM deviation meter to the antenna connector. Set the FM deviation meter as; HPF : OFF LPF : 0 khz De-emphasis : OFF Detector : (P P)/ No audio input Transmitting Set the FM deviation meter as; HPF : OFF LPF : 0 khz De-emphasis : OFF Detector : (P P)/ No audio input Transmitting Rotate [VOL] to set to ±. khz. Push [D LR] key. Rotate [VOL] to set to ±.0 khz. Push [D LR] key. Rotate [VOL] to set to square wave form as shown below. Push [D LR] key. Set to square wave form Rotate [VOL] to set to ±.0 khz. Push [D LR] key. -

15 -- REEIVE ADJUSTMENT ADJUSTMENT ADJUSTMENT ONDITION OPERATION SENSITIVITY onnect an SSG to the antenna connector and set as; Frequency :.00 MHz Level : 0 dbµ* Modulation : khz Deviation : ±. khz Receiving Set the SSG as; Frequency : MHz Level : 0 dbµ* Modulation : khz Deviation : ±. khz Receiving Set the SSG as; Frequency : MHz Level : 0 dbµ* Modulation : khz Deviation : ±. khz Receiving SQUELH Set the SSG as; Frequency :.00 MHz Level : 9 dbµ* Modulation : khz Deviation : ±. khz Receiving S-METER Set the SSG as; Frequency :.00 MHz Level : dbµ* Modulation : khz Deviation : ±. khz Receiving QUITING ADJUSTMENT Turn power OFF. MODE Push [D LR] key. Push [D LR] key. Push [D LR] key. lose the squelch once, then set the squelch level at the point where the audio signals just appears. Push [D LR] key. While pushing [MONI] and [D LR] keys, turn power ON. *; This output level of the standard signal generator (SSG) is indicated as SSG s terminated circuit. -

16 - UT-8 ADJUSTMENT ONNETION (BOTTOM VIEW) Power supply.0 V D / A Power supply 8.0 V D / A J0, Pin Entering adjustment mode ADJUSTMENT ADJUSTMENT ADJUSTMENT ONDITION OPERATION ENTERING ADJUSTMENT MODE ODE FREQUEY MODEM FREQUEY MODURATION OUTPUT LEVEL QUITING ADJUSTMENT MODE onnect the pin of J0 to to enter the adjustment mode. onnect the frequency counter to P0 Adjust 0 to set to.800 MHz ±0 Hz. through a capacitor (000 pf). onnect the frequency counter to P Adjust 07 to set to.700 MHz ± Hz. through a capacitor (000 pf). onnect the pin of J0 to to enter the Adjust R to set to 0 mvp-p ±0 mv. transmit mode. onnect the oscilloscope to pin of J0. Disconnect the pin of J0 from after the adjustment to quit the transmit mode. Disconnect the pin of J0 from to quit the adjustment mode. UT-8 TOP VIEW 07 MODEM FREQUEY adjustment point UT-8 BOTTOM VIEW P MODEM FREQUEY check point J0, pin onnect to. 0 ODE FREQUEY R adjustment point MODULATION OUTPUT LEVEL adjustment point J0, pin MODULATED SIGNAL LEVEL check point P0 ODE FREQUEY chek point -

17 SETION PARTS LIST - I-V8 [MAIN UNIT] REF ORDER H/V NO. NO. DESRIPTION M. LOATION I S.I TAFN (D,EL) T 0.7/.7 I S.I LMVIPWR T 0.7/. I S.I D0BPWR T 8.9/.9 I S.I NJM070M-TE B 7./0. I7 000 S.I S-SA0I-T8TG B./. I8 000 I M00FRP B./.9 I S.I MFP-0 B /. I S.I S-80AM-E-T T 09.8/9.8 I S.I D0BPWR B 0.8/.8 I S.I D0BPWR B 9./. I S.I D0BPWR B /0. I S.I SN7AHGHDTR B./. I S.I ANMS B./7.9 I S.I MBE0SLPFV-G-BND-ER T 8.9/. I S.I SN7AHGHDBVR T 80.9/8 I 0000 S.I BDG-TR B 7./.9 I S.REG S-80BM-E-TG B./. I S.I LMVIDKR B 0./0. I S.REG S-8AM-Q-TG T 87./8. I S.I LMVIDKR B 8./. Q S.FET RDMVS-T T 8./ Q 0000 S.FET RD0MUS T 09./. Q 0000 S.TR S08-Y (TE8R) T 0./9.9 Q 0000 S.TR S00-T B 87./0. Q S.TR XP0 (TX) T 8.7/.7 Q S.FET SK8YB-TL-E B 0.7/. Q S.FET SK8YB-TL-E B 99.7/.8 Q 0000 S.TR S00-T B 97./.8 Q S.TR SB T00 R B.8/. Q S.TR XP0-(TX).AB B.9/8. Q S.TR UNR9FJ-(TX) B 8/0. Q S.TR SA7A T0R B./. Q S.TR SA7A T0R B 09.8/. Q S.TR S-BL (TE8R) T 7./. Q S.TR UNR90J-(TX) T 9.7/. Q S.FET SK09--TL T 7.8/8. Q S.TR UNR9J-(TX) T 09.9/.9 Q S.TR UNR9J-(TX) B./. Q S.TR XP0 (TX) B 7./8.9 Q S.TR SA7A T0R B 00.7/. Q S.TR SB T00 R T /9. Q S.TR UNR9J-(TX) T 0./. Q S.TR XP0-(TX).AB B 9./7 Q S.TR SA7 T0 S B./9.9 Q S.TR S-BL (TE8R) B.9/9.8 Q S.TR SA7A T0R B./8.9 Q S.TR SA7A T0R B.8/. Q S.TR S-BL (TE8R) B 98.9/.7 Q S.TR UMGN TL T 9./.9 Q S.TR UNR9J-(TX) T 9./. Q S.TR S7 TLS B./. Q S.TR S8-TL B 87./. Q S.TR S8-TL B 8./. Q S.TR S8-TL B 77./. Q S.TR UNR9NJ-(TX) B 8/9 Q S.TR S-BL (TE8R) T 9.9/.7 Q S.TR S-BL (TE8R) B 0./9. D S.DIO HVUTRF B./.7 D S.DIO MA77 (TX) T.9/7. D S.DIO SV08 (TPL) T 90.7/. D S.DIO MAS077-(TX) T 9./9. D S.VP HV7BTRF T 0.7/.8 D S.VP HV0BTRF T 0./. D S.VP HV0BTRF B 0.7/. D S.DIO MA7 (TX) T 9./.7 D S.DIO MA7 (TX) T.9/. D S.DIO MA7 (TX) T.9/. D S.ZEN MA80-M (TX) B 9/8. D S.DIO SS00 TE B 7./8.7 D S.DIO SS00 TE B 0.8/. D S.DIO SS00 TE B./. D S.DIO SS00 TE B.9/. D S.DIO SS00 TE B./. D S.DIO SS00 TE B 7./. D S.DIO SS00 TE [EU], [US], [EU], [US], [EU], [US] T 8./.9 D S.DIO SS00 TE [EX], [S], [EX], [S], [S], [EX] T 9.7/.9 D S.DIO SS00 TE T /.9 D S.DIO SS00 TE [EU], [US], [EU], [US], [EU], [US] T 7./0.8 D S.DIO SS00 TE [EU], [EU], [EU] T 8./0.8 [EU//]=EUR-//, [EX///]=EXP-///, [US//]=USA-//, [S//]=SA-// [MAIN UNIT] REF ORDER H/V NO. NO. DESRIPTION M. LOATION D S.DIO MA78 (TX) T./. D S.DIO SS00 TE B./.9 D S.VP HV7BTRF B./9.8 D S.DIO MAS077-(TX) B 8./7.8 D S.VP MAS000L B 7./7. D S.VP MAS000L B 78.8/7. D S.VP SV8 (TPH) B 7./. D S.DIO DA TL B 9./0.7 D S.DIO SS00 TE T 8/7.9 D S.VP HV0BTRF T 0.7/7.7 D S.DIO SS00 TE [EU], [EX], [EU], [EX], [EU], [EX] T 7./. D S.DIO SS00 TE [EX], [EX], [EX] T./. D S.DIO SS00 TE [EU], [EX], [EU], [EX], [EU], [EX] T.9/. D S.DIO SS00 TE [EX], [EX], [EX] T./. D S.DIO SS00 TE T 79./7.9 D S.DIO SS00 TE B 0.7/. FI S.MLH FL- (.0 MHz) B 9./ FI ER ALFY0F=K X S.XTL R-79 (9.80 MHz) B /. X S.DR DBB0KAY-R0 T 9.8/ X S.XTL R-78 (. MHz) B 8./.9 L S.OL TL N B.7/.9 L S.OL TL 0N B.8/9. L S.OL TL 0N B 7.7/. L S.OL TL 8N T 9.8/9.7 L S.OL LQWBHN7NJ0L T /8. L S.OL LL08-F8NK T 0.8/.7 L S.OL TL N T.7/9. L S.OL TL 0N B./. L S.OL 0-8NG T 07./. L S.OL 0-8NG T 0.7/. L S.OL NL 08T-RJ B 97./7. L S.OL ELJF R7K-F B 0/.9 L S.OL EXLU T 7./.8 L S.OL ELJRE RG-F B 9./. L S.OL TR 7.N T 0.9/9 L S.OL ELJRE NG-F T 9./. L S.OL ELJRF 9NJF (9) B 90./.9 L S.OL ELJRE RG-F B 8.9/. L S.OL ELJRF R0JF (0.) B 8.9/0. L S.OL ELJRF NJF () B 8.7/0 L S.OL ELJRE 8NG-F T 88./.8 L S.OL 0-NG B 7.9/.8 L S.OL 0-NG B 8/.9 L S.OL NL 08T-R0J B 79./. L S.OL TL 8N B 9.9/7. L S.OL ELJRE 8NG-F T.8/. L S.OL ELJRE 8NG-F T 0./0.8 L S.OL NL 08T-RJ B 98./. L S.OL MLF08D R8K-T T 9./.7 L S.OL MLF08D RK-T T 9./.9 L S.OL 0-R8G B 0/. L S.OL 0-8NG B 00.8/. L S.OL 0-7NG T./.9 L S.OL ELJRF 9NJF (9) B 9.8/.9 R S.RES ERJGEYJ 8 V (8 kω) T 8./.7 R S.RES ERJGEYJ 0 V ( Ω) T./. R S.RES ERJGEJ X (0 Ω) T 08./0. R S.RES ERJGEJ 0 X ( Ω) T 98.7/8.9 R S.RES ERJGEJ X (. kω) T 98/.9 R S.RES ERJGEJ X (. kω) T 00./. R S.RES ERJGEJ 0 X ( Ω) T 00.8/.9 R S.RES ERJGEJ 7 X (.7 kω) T 9.7/0. R S.RES ERJGEJ 0 X (00 Ω) T 9./9.9 R S.RES ERJGEJ 0 X ( Ω) T 9./0.9 R S.RES ERJGEJ X ( kω) B 87./8. R S.RES ERJGEJ X (. kω) B 8./8. R S.RES ERJGEJ 8 X (.8 kω) T 8.7/9.9 R S.RES ERJGEJ 0 X (0 kω) T 7.9/7.9 R S.RES ERJGEJ 0 X (0 kω) B 78./.7 R S.RES ERJGE-JPW B 80.7/7 R S.RES ERJGEJ 7 X (70 kω) B 79.7/7 R S.RES ERJGEJ 0 X (00 kω) T 08./.7 R S.RES ERJGEJ 0 X (0 kω) T 09./ R S.RES ERJGEJ 8 X (80 kω) T 0/. R S.RES ERJGEJ X (0 kω) T 09.9/. R S.RES ERJGEJ 0 X (00 Ω) B 0./7 M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) S.=Surface mount -

18 [MAIN UNIT] REF ORDER H/V NO. NO. DESRIPTION M. LOATION R S.RES ERJGEJ 00 X (0 Ω) T 07./7. R S.RES ERJGEJ X (0 kω) T 0./. R S.RES ERJGEJ X (0 kω) T 0./. R S.RES ERJGEJ 7 X (.7 kω) B 9./.9 R S.RES ERJGEJ 0 X (00 Ω) B 9.7/8. R S.RES ERJGEJ 8 X (80 kω) B 98/ R S.RES ERJGEJ 7 X (70 Ω) B 9./9.8 R S.RES ERJGEJ X (0 kω) B 0./. R S.RES ERJGEJ X (0 Ω) B 0./7 R S.RES ERJGEJ 0 X (00 Ω) B 9./0. R S.RES ERJGEJ X (0 Ω) B 9/0. R S.RES ERJGEJ 0 X (00 kω) B 9.9/ R S.RES ERJGEJ 7 X (70 Ω) B 0./0.9 R S.RES ERJGEJ 9 X (.9 kω) T 97.9/0. R S.RES ERJGEJ 7 X (70 Ω) T 98./.8 R S.RES ERJGEJ 9 X (90 Ω) T 0/.8 R S.RES ERJGEJ X (. kω) T 0.9/8 R S.RES ERJGEJ 7 X (7 kω) T 98./8. R S.RES ERJGEJ X (. kω) T 97./0. R S.RES ERJGEJ X ( kω) T 9./8. R S.RES ERJGEJ 7 X (7 kω) B 0./8 R S.RES ERJGEJ 0 X ( MΩ) B 07.9/. R S.RES ERJGEJ X (. MΩ) B 08./ R S.RES ERJGEJ X (0 kω) T 89./.8 R S.RES ERJGEJ X (0 kω) T 80./7. R S.RES ERJGEJ 8 X (80 kω) B 0./ R S.RES ERJGEJ 0 X (00 kω) B 0/0.9 R S.RES ERJGEJ 0 X ( MΩ) B.7/. R S.RES ERJGEJ 00 X (0 Ω) B.9/. R S.RES ERJGEJ X ( kω) B./.7 R S.RES ERJGEJ 0 X (00 kω) B 0.9/ R S.RES ERJGEJ 7 X (70 Ω) T 98./.8 R S.RES ERJGEJ X (0 kω) T 80.7/ R S.RES ERJGEJ X (0 kω) T 99./. R S.RES ERJGEJ 0 X ( MΩ) T 88./.8 R S.RES ERJGEJ 8 X (8 kω) T 80.7/.9 R S.RES ERJGEJ 8 X (8 kω) T 97./.7 R S.RES ERJGEJ X (0 kω) T 9.7/.7 R S.RES ERJGEJ X (. kω) T 9.7/.7 R S.RES ERJGEJ 7 X (7 kω) B./0. R S.RES ERJGEJ X (. kω) B.9/0. R S.RES ERJGEJ 7 X (.7 kω) B./. R S.RES ERJGEJ 8 X (.8 kω) B.9/0. R S.RES ERJGEJ X (0 kω) B./8. R S.RES ERJGEJ 0 X ( Ω) B 7./. R S.RES ERJGEJ 00 X (0 Ω) B 7.8/. R S.RES ERJGEJ 0 X (00 kω) B 9./0. R S.RES ERJGEJ 8 X (.8 kω) B./0. R S.RES ERJGEJ 7 X (70 Ω) B 9.7/ R S.RES ERJGEJ 0 X (00 Ω) B./0.9 R S.RES ERJGEJ 0 X (00 Ω) B 0./.9 R S.RES ERJGEJ 0 X (0 kω) B 0./ R S.RES ERJGEJ X (. kω) B 07./. R S.RES ERJGEJ X ( kω) B 8./. R S.RES ERJGEJ 0 X (00 kω) B 9.9/. R S.RES ERJGEJ 7 X (70 Ω) B 9./7.9 R S.RES ERJGEJ 0 X (00 Ω) T 7.7/.9 R S.RES ERJGEJ 0 X (00 kω) B 0/.9 R S.RES ERJGEYJ V (0 Ω) B 09./9. R S.RES ERJGEJ X ( kω) T.8/ R S.RES ERJGEJ X ( kω) T.8/ R S.RES ERJGEJ X (. kω) T.8/ R S.RES ERJGEJ 0 X (00 kω) B.9/8.9 R S.RES ERJGEJ 9 X (9 kω) T 7./8. R S.RES ERJGEJ 0 X (0 kω) T 79./. R S.RES ERJGEJ X ( kω) T 9./.8 R S.RES ERJGEJ 9 X (.9 kω) B 0./7. R S.RES ERJGEJ 0 X ( kω) T 00./. R S.RES ERJGEJ X (0 kω) B 07./. R S.RES ERJRHD 0 X (00 kω) B./8. R S.TMR NTG LH 7KT B 9.8/8.8 R S.RES ERJGEJ 0 X (0 kω) T 7./9.9 R S.RES ERJGEJ 0 X ( kω) T 7/.9 R S.RES ERJGEJ 7 X (7 kω) T 7.7/. R S.RES ERJGEJ 0 X (00 kω) B 0.8/7.7 R S.RES ERJGEJ X ( kω) B 0./ R S.RES ERJGEJ X ( kω) B 8./. R S.RES ERJGEJ X ( kω) B 8.8/. R S.RES ERJGEJ 0 X (0 kω) B 9./0.9 R S.RES ERJGEJ 0 X (0 kω) T./. R S.RES ERJGEJ 7 X (.7 kω) T./.9 R S.RES ERJGEJ 9 X (.9 kω) T 08.7/. R S.RES ERJGEJ 7 X (7 kω) T 0./. R S.RES ERJGEJ 9 X (9 kω) B 7.7/9. R S.RES ERJGEJ 0 X (00 kω) B.8/7. R S.RES ERJGEJ 9 X (.9 kω) B 7.8/0. R S.RES ERJGEJ 0 X (0 kω) B.8/. R S.RES ERJGEJ 0 X ( kω) B 9.9/.8 R S.RES ERJGEJ 0 X (00 kω) B 0./.9 R S.RES ERJGEJ 0 X (00 kω) B./7.7 R S.RES ERJGEJ 0 X (0 kω) B./. R S.RES ERJGEJ X (0 kω) T 0./8. R S.RES ERJGEJ X (0 kω) B 09/. R S.RES ERJGE-JPW T 88./.8 R S.RES ERJGEJ 8 X (80 kω) T 07.8/. [EU//]=EUR-//, [EX///]=EXP-///, [US//]=USA-//, [S//]=SA-// [MAIN UNIT] REF ORDER H/V NO. NO. DESRIPTION M. LOATION R S.RES ERJGEJ X (0 kω) B 0./.9 R S.RES ERJGEJ X ( kω) B 09.7/ R S.RES ERJGEJ 7 X (7 kω) B./. R S.RES ERJGEJ 0 X (00 Ω) B 98./0. R S.RES ERJGEJ X ( kω) B.9/7. R S.RES ERJGEJ 8 X (8 kω) B./7. R S.RES ERJGEJ 8 X (8 kω) B 7./. R S.RES ERJGEJ X ( kω) B 7./7. R S.RES ERJGEJ 0 X (0 kω) B 0./8. R S.RES ERJGEJ 0 X (0 kω) B./7.9 R S.RES ERJGEJ X (. kω) B.7/9. R S.RES ERJGEJ 8 X (8 kω) B 9./0. R S.RES ERJGEJ 8 X (8 kω) B./9. R S.RES ERJGEJ 0 X (00 kω) B./. R S.RES ERJGEJ X (0 kω) B 0/8. R S.RES ERJGEJ 7 X (7 kω) B 00./0 R S.RES ERJGEJ 0 X (0 kω) B 7./7. R S.RES ERJGEJ 0 X (0 kω) B 9./8.8 R S.RES ERJGEJ 8 X (.8 kω) B 9./ R S.RES ERJGEJ 0 X ( MΩ) B.8/0. R S.RES ERJGEJ 0 X ( MΩ) B 0.8/. R S.RES ERJGEJ 0 X ( MΩ) B 7.9/.7 R S.RES ERJGEJ 0 X (00 kω) B 9./8. R S.RES ERJGEJ X (. MΩ) T 88/8. R S.RES ERJGEJ 7 X (.7 kω) T.9/8. R S.RES ERJGEJ 7 X (7 kω) T./8. R S.RES ERJGEJ 0 X (00 kω) B 0.9/.8 R S.RES ERJGEJ X ( kω) T./8. R S.RES ERJGEJ 7 X (7 kω) T 0./0 R S.RES ERJGEJ 0 X (0 kω) B 9.8/. R S.RES ERJGEJ X (. kω) B./.9 R S.RES ERJGEJ 0 X (0 kω) B 0./0. R S.RES ERJGEJ 0 X ( MΩ) B./0.7 R S.RES ERJGEJ X (0 kω) B / R S.RES ERJGEJ 0 X ( MΩ) B.8/0. R S.RES ERJGEJ 7 X (70 kω) B./0. R S.RES ERJGEJ 0 X ( kω) B 0./.8 R S.RES ERJGEJ X (. kω) B 9./. R S.RES ERJGEJ 0 X (0 kω) B./ R S.RES ERJGEJ 8 X (80 Ω) B./ R S.RES ERJGEJ 0 X ( MΩ) B 0./8. R S.RES ERJGEJ 0 X (00 Ω) B 7./0 R S.RES ERJGEJ 8 X (80 kω) B 8.7/8.8 R S.RES ERJGEJ 7 X (7 kω) B 8.7/0. R S.RES ERJGEJ 0 X (00 kω) B 8.7/.9 R S.RES ERJGEJ 7 X (70 kω) B 0./.9 R S.RES ERJGEJ 7 X (7 kω) B 7./. R S.RES ERJGEJ 7 X (7 kω) B.9/7.9 R S.RES ERJGEJ X ( kω) B./.9 R S.RES ERJGEJ 7 X (7 kω) B 0.9/. R S.RES ERJGEJ 7 X (7 kω) B 7./.7 R S.RES ERJGEJ X (. kω) B 98./8.9 R S.RES ERJGEJ 7 X (7 kω) T 9./.9 R S.RES ERJGEJ 7 X (7 kω) B 99./.8 R S.RES ERJGEJ 8 X (.8 kω) T 9.9/ R S.RES ERJGEJ 0 X (00 kω) B.8/8. R S.RES ERJGE-JPW T 89.9/9. R S.RES ERJGEJ 0 X (00 kω) B 0./7.7 R S.RES ERJGEJ 0 X (00 kω) B 7./.7 R S.RES ERJGE-JPW T 0/. R S.RES ERJGE-JPW B 90.9/8. R S.RES ERJGE-JPW B 90./. R S.RES ERJGEJ 0 X ( kω) B 89.7/. R S.RES ERJGEJ X (. kω) T 90./8.7 R S.RES ERJGE-JPW T 89./9.9 R S.RES ERJGEJ 7 X (70 Ω) B 8.8/0. R S.RES ERJGEJ 0 X (0 kω) B 8./. R S.RES ERJGEJ 7 X (.7 kω) B 8./.8 R S.RES ERJGEJ 0 X (00 Ω) B 8./. R S.RES ERJGEJ 7 X (70 Ω) B 79./0. R S.RES ERJGEJ 0 X (0 kω) B 8./0. R S.RES ERJGEJ 9 X (.9 kω) B 8./.7 R S.RES ERJGEJ X (0 Ω) B 8./. R S.RES ERJGEJ 0 X ( Ω) B 8./.8 R S.RES ERJGEJ 0 X (0 kω) B 87./7. R S.RES ERJGEJ X (. MΩ) T 90.9/7.9 R S.RES ERJGEJ 70 X (7 Ω) B 77.9/9. R S.RES ERJGEJ 0 X (0 kω) B 7.9/0.9 R S.RES ERJGEJ 8 X (80 Ω) B 80./. R S.RES ERJGEJ 9 X (9 kω) B 77./. R S.RES ERJGEJ 7 X (.7 kω) B 79./8.9 R S.RES ERJGEJ 0 X ( kω) B 80./9. R S.RES ERJGEJ 7 X (7 kω) B 8./9. R S.RES ERJGEJ 0 X (00 kω) B 7.9/9. R S.RES ERJGEJ X (. MΩ) T 80/0. R S.RES ERJGEJ 0 X ( kω) T 78.8/0.7 R S.RES ERJGEJ X ( kω) T 7./.7 R S.RES ERJGEJ 0 X (0 kω) T 7./.7 R S.RES ERJGEJ X (. kω) T 78.8/. R S.RES ERJGEJ 8 X (80 Ω) T 7./. R S.RES ERJGEJ 8 X (80 Ω) T 8.7/.8 R S.RES ERJGEJ X (. kω) T 8/.7 R S.RES ERJGEJ 0 X (00 Ω) T 8/8. R S.RES ERJGEJ 0 X (00 kω) B 9./. R S.RES ERJGE-JPW B 9./. M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) S.=Surface mount -

19 [MAIN UNIT] REF ORDER H/V NO. NO. DESRIPTION M. LOATION R S.RES ERJGEJ 0 X (0 kω) T 7.8/7. R S.RES ERJGEJ 0 X (0 kω) T 77./.9 R S.RES ERJGEJ 0 X (0 kω) T 7.7/. R S.RES ERJGEJ 8 X (8 kω) T 8/.7 R S.RES ERJGEJ 8X (80 kω) T 9./. R S.RES ERJGEJ 0 X ( kω) T 9.9/.7 R S.RES ERJGEJ 0 X ( kω) T 0./.8 R S.RES ERJGEJ X (0 kω) T 0.8/8.8 R S.RES ERJGEJ 0 X ( kω) B 89./. R S.RES ERJGE-JPW [EX], [S], [EX], [S], [S], [EX] B./9. R S.RES ERJGEJ 7 X (7 kω) B.9/. R S.RES ERJGEJ 7 X (7 kω) B./. R S.RES ERJGEJ 0 X (0 kω) B 8.8/. R S.RES ERJGEJ 0 X (0 kω) B 7.8/. R S.RES ERJGEJ 0 X (00 kω) B.9/9.9 R S.RES ERJGEJ 0 X (00 kω) B.9/0.9 R S.RES ERJGEJ 0 X (00 Ω) B 0./7.9 R S.RES ERJGEJ 0 X ( MΩ) B./. R S.RES ERJGEJ 0 X ( MΩ) B./. R S.RES ERJGEJ 0 X ( MΩ) B./0. R S.RES ERJGEJ 0 X ( MΩ) B 9./0. R S.RES ERJGEJ 0 X ( MΩ) T 9./. R S.RES ERJGEJ X ( kω) T 7/ R S.RES ERJGEJ X ( kω) T 79./. R S.RES ERJGEJ X ( kω) T 77./8. R S.RES ERJGEJ X (0 kω) B /0. R S.RES ERJGEJ 0 X ( kω) B./9. R S.RES ERJGEJ 0 X ( kω) B./8. R S.RES ERJGEJ 0 X ( kω) B 0./. R S.RES ERJGEJ 0 X ( kω) B 0.8/8. R S.RES ERJGEJ X ( kω) B 9./. R S.RES ERJGEJ X (. MΩ) B 0./7.7 R S.RES ERJGEJ 8 X (8 kω) B 9/7. R S.RES ERJGEJ 8 X (8 kω) B 9/.7 R S.RES ERJRKF X (0 kω) B 7./0. R S.RES ERAYKD V (0 kω) B 8/8. R S.RES ERJGEJ 0 X ( kω) B 7./. R S.RES ERJGEJ 0 X (00 Ω) T 08.8/9. R S.RES ERJGEJ X ( kω) T 78./9. R S.RES ERJGEJ X (0 Ω) T 9./9.9 R S.RES ERJGEJ 7 X (7 kω) B 8./7. R S.RES ERJGEJ 0 X (00 kω) B 7.8/. R S.RES ERJGEJ 0 X (00 kω) B 0./.9 R S.RES ERJGEJ 7 X (70 kω) B 0./. R S.RES ERJGEJ 7 X (7 kω) B 8./. R S.RES ERJGEJ 8 X (80 kω) B./. R S.RES ERJGEJ 70 X (7 Ω) T 07./0. R S.RES ERJGEJ 8 X (8 kω) B.8/. R S.RES ERJGEJ 0 X (00 Ω) B 78./7. R S.RES ERJGE-JPW [EU] only B./.7 R S.RES ERJGEJ X (0 kω) B 9.7/. R S.RES ERJGEJ 0 X (00 kω) B 9.7/. R S.RES ERJGEJ 0 X (0 kω) T 7.8/ S.ER 08 H H 070D-T B 9./ S.ER 08 H H 00B-T B./ S.ER 08 H H 70J-T B 8./ S.ER 08 H H 00B-T B./ S.ER 08 H H 0J-T B 8./ S.ER 08 JB H 0K-T B./ S.ER EJ0EBE0K T 0./ S.ER EJ0EBE0K T./ S.ER EJ0EB0K T 8/ S.ER 08 H H 70J-T T./ S.ER EJ0EBE0K T 09./ S.ER EJ0EBE0K B./ S.ER EJ0EB0K T.9/ S.ER EJ0EBE0K T 9.8/ S.TAN TEESVA 7M8L T./ S.ER EJ0EH0J T 0.8/ S.ER EJ0EBE0K T 99.7/ S.ER EJ0EBE0K T 00./ S.ER EJ0EBE0K T 98/ S.ER EJ0EBE0K T 9.7/ S.TAN TEESVA A 0M8L T 8/ S.ER 08 H H 90J-T T./ S.ER EJ0EBE0K T 9.9/ S.ER EJ0EBE0K B 79./ S.ER EJ0EBA0K T 09./ S.ER EJ0EBA0K T 0/ S.ER 08 H H 80J-T T./ S.ER EJ0EH00 B.7/ S.ER EJ0EHJ T 0.9/ S.ER EJ0EBE0K T 09.7/ S.ER EJ0EB0K B 0./ S.ER EJ0EBE0K B 07./ S.ER EJ0EBE0K B 0.7/ S.ER EJ0EBE0K T 09.9/ S.ER EJ0EHJ T 0./ S.ER EJ0EBE0K T 0./ S.ER EJ0EH00B B 0./ S.ER EJ0EBE0K T 99.8/. [EU//]=EUR-//, [EX///]=EXP-///, [US//]=USA-//, [S//]=SA-// [MAIN UNIT] REF ORDER H/V NO. NO. DESRIPTION M. LOATION S.ER EJ0EH80J B 0.7/ S.ER EJ0EH00B B 0.7/ S.ER EJ0EBE0K B 9./ S.ER EJ0EH080 B 9/ S.ER EJ0EBE0K B 00./ S.ER EJ0EB0K B 00./ S.ER EJ0EH80J B 9./ S.ER EJ0EBE0K B 9./ S.ER EJ0EB0K B 9./ S.ER EJ0EB0K B 9./ S.ER EJ0EBE0K T 97./ S.ER EJ0EBE0K T 97./ S.ER EJ0EBAK T 0./ S.ER EJ0EBE0K B 99./ S.ER EJ0EH80J T 0./ S.ER EJ0EBE0K T 9./ S.ER EJ0EB0K T 0.9/ S.ER EJ0EB0J0K T 9./ S.ER EJ0EBA0K T 00./ S.ER EJ0EHJ T 97./ S.ER EJ0EHJ T 97./ S.ER EJ0EBE0K B 70.8/ S.ER EJ0EB0K B 0./ S.ER EJ0EBHK B 09./ S.ER EJ0EBH7K B 0./ S.ER EJ0EBA0K T 8./ S.TAN TEESVA M8L B 0.9/ S.ER EJ0EB0K T 88./ S.ER EJ0EBEK B.9/ S.ER EJ0EBA0K T 9.9/ S.ER EJ0EHJ T 98./ S.ER EJ0EBE7K T 98/ S.ER EJ0EBEK T 9/ S.ER EJ0EBAK T 9./ S.ER EJ0EBE0K B 0./ S.ER EJ0EB0J0K B.8/ S.ER EJ0EBE0K B 0./ S.ELE EEEA00SR B.8/ S.ER EJ0EBA7K B 0./ S.ER EJ0EB0K B./ S.TAN TEESVA 0M8L B 8.9/ S.ER EJ0EBA7K B 7./ S.ELE EEEA0WP B 80.8/ S.TAN TEESVA 0J M8L B 7./ S.ER EJ0EB0K B./ S.ER EJ0EB0K B 09./ S.ER EJ0EBE0K B 8./ S.ER EJ0EBE0K B 7/ S.ER EJ0EBE0K B 9./ S.ER EJ0EBE0K B 9.7/ S.ER EJ0EH70J B 9.7/ S.ER EJ0EBE0K B 9./ S.ER EJ0EBE0K B 8./ S.ER EJ0EBA0K B./ S.ELE EEEA0WP B.8/ S.ELE EEE0JA0SR B 7./ S.ER EJ0EB0K T 0/ S.ER EJ0EH0RB B./ S.ER EJ0EH080 B./ S.ER EJ0EH0J B / S.ER EJ0EBA0K B./ S.ER EJ0EBA0K B./ S.ER EJ0EBE0K B./ S.ER 08 JB H 0K-T B./ S.ER EJ0EBA0K B 9/ S.ER EJ0EB0K T 79/ S.TAN TEESVA A M8L T 77./ S.ER EJ0EBAK T 80./ S.ER EJ0EBH9K B 9./ S.ER EJ0EBA0K T 0./ S.ER EJ0EBAK B./ S.ER EJ0EBA7K B 7./ S.ER EJ0EBA0K B 9.9/ S.ER EJ0EBE0K T 7.7/ S.ER EJ0EBE0K T 7.7/ S.ER EJ0EB0K B 7.9/ S.ER EJ0EBE0K B./ S.ER EJ0EB0K B.7/ S.ER EJ0EB0K B 9./ S.ER EJ0EB0K B 0.9/ S.ER EJ0EBE0K T.8/ S.ER EJ0EBE0K T./ S.ER EJ0EH00 B 08.8/ S.ER 08 H H 80J-T B./ S.ER 08 H H J-T B 8/ S.ER EJ0EBE0K T 09./ S.ER EJ0EBHK T 9.8/ S.ER 08 H H 0J-T B.7/ S.ER 08 H H 0J-T B./ S.ER EJ0EBE0K B./ S.ER EJ0EBE0K T./ S.ER EJ0EBA0K T 8./ S.ER EJ0EBE7K B.8/ S.ER EJ0EB0K B.8/9. M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) S.=Surface mount -

20 [MAIN UNIT] REF ORDER H/V NO. NO. DESRIPTION M. LOATION S.TAN TEESVA A 7M8L B 09.9/ S.ER EJ0EBE7K B 9.7/ S.ER EJ0EBE0K B 8.7/ S.ER EJ0EBE0K T 88./ S.ER EJ0EBE0K T 0./ S.ER EJ0EBA7K B./ S.ER EJ0EBE7K T./ S.ER EJ0EH00B B 97./ S.ER EJ0EBAK B 9./ S.ER EJ0EBH8K B./ S.ER EJ0EBK B./ S.ER EJ0EBE8K B.7/ S.ER EJ0EBHK B.8/ S.ER EJ0EBE0K B 0./ S.ER EJ0EBE0K T 09.8/ S.TAN TEESVB A M8L T 9.7/ S.ER EJ0EBA0K B./ S.ER EJ0EBE0K T 7./ S.ELE EEE0JA0SR B 8./ S.TAN TEESVA A 0M8L T 0./ S.ER EJ0EBA0K B 0.8/ S.ER EJ0EH070 T 97./ S.ER EJ0EH00B T 97.7/ S.TAN TEESVA A 7M8L B 0.9/ S.ER EJ0EBEK B.9/ S.ER EJ0EBHK T./ S.ER EJ0EB0K B 8./ S.ER EJ0EBA0K B./ S.TAN TEESVA 0M8R B 7./ S.ER EJ0EBE0K B / S.TAN ESTAY0R B 0./ S.TAN TEESVA A 0M8L B 0./ S.ER EJ0EBE0K B./ S.ER EJ0EB0J0K B 0./ S.ER EJ0EBA0K B./ S.ER EJ0EBA0K B 0./ S.ER EJ0EB0K B./ S.ER EJ0EBE0K B 9.7/ S.ER EJ0EBE0K B./ S.ER EJ0EBE0K B./ S.ER EJ0EBE0K B 9.7/ S.ER EJ0EBA0K B 98./ S.ER EJ0EBA0K B 99./ S.ER EJ0EBA0K T 0/ S.ER EJ0EBA0K T 0.7/ S.ER 08 JB A 0K-T T 9.8/ S.ER EJ0EB0K B / S.ER EJ0EB0K B.8/ S.ER EJ0EB0J0K B 9/ S.ER EJ0EB0K T 89./ S.ER EJ0EBE0K B 9.7/ S.ER EJ0EB0J0K B 8.7/ S.ER EJ0EH80J T 9./ S.ER EJ0EH80J T 9./ S.ER EJ0EH0J B 9/ S.ER EJ0EH0J B 88.8/ S.ER EJ0EBE0K B 88/ S.ER EJ0EH00B T 90./ S.ER EJ0EH080 B 87.8/ S.ER EJ0EBE0K B 8./ S.ER EJ0EBE0K B 8.8/ S.ER EJ0EH70J T 77./ S.ER EJ0EH00B B 8/ S.ER EJ0EH0RB B 8/ S.ER EJ0EH0J B 8/ S.ER EJ0EH00B B 8.9/ S.ER EJ0EH00B B 79./ S.ER EJ0EBE0K T 88./ S.ER EJ0EBE0K B 79.9/ S.ER EJ0EH00B B 87.8/ S.ER EJ0EH00B B 87./ S.ER EJ0EH70J B 8./ S.ER EJ0EH00B T 88./ S.ER EJ0EH00B T 90.9/ S.ER 08 H H 80J-T B 79./ S.ER 08 H H 0J-T B 77./ S.ER EJ0EBE0K B 7./ S.ER EJ0EBE0K T 79/ S.ER 08 H H 0J-T B 7.8/ S.ER EJ0EBE0K B 78.9/ S.ER EJ0EBE0K B 8/ S.ER EJ0EBE0K B 9./ S.ER 08 H H 0R-T B 7.7/ S.ER EJ0EBE0K B 78./ S.ER 08 H H 80J-T B./ S.ER 08 H H 00D-T T.8/ S.ER 08 JB E 0K-T T 77.8/ S.TAN TEESVA 0J 8M-8L T 78./ S.TAN TEESVA V M8L T 8/ S.TAN TEESVA V 0M8L T 77./ S.ER EJ0EBE0K T 7.8/ S.ER EJ0EBE0K T 79.9/ S.ER EJ0EBE0K B 97./ S.ER EJ0EB0K B 9.9/ S.ER EJ0EBE0K B 0/ S.ER EJ0EBA0K T 9./8.9 [EU//]=EUR-//, [EX///]=EXP-///, [US//]=USA-//, [S//]=SA-// [MAIN UNIT] REF ORDER H/V NO. NO. DESRIPTION M. LOATION S.ER EJ0EH70J T 8./ S.ER EJ0EBE7K T 8./ S.ER EJ0EBE0K T 9./ S.ER EJ0EH0J T 9./ S.ER EJ0EH00B T 9./ S.ER EJ0EBE0K T 9./ S.ER EJ0EB0K T 9./ S.ER EJ0EH00B T 9.9/ S.ER EJ0EH00B T 0./ S.ER EJ0EB0J0K T 08.7/ S.ER EJ0EH00B B 0.8/ S.ER EJ0EH00B B 0.8/ S.ER EJ0EH00B B 0.8/ S.ER EJ0EH0J T 0./ S.ER EJ0EBE0K T 9.8/ S.ER EJ0EH00B B 0.7/ S.ER EJ0EBE0K B 89/ S.ER 08 H H 80J-T T 9./ S.ER EJ0EBE0K B 0./ S.ER EJ0EBE0K T 08./ S.ER 08 JB 0J M-T B 0./ S.ER EJ0EBA0K B./ S.ER 08 H H 0J-T T./ S.ER EJ0EB0J0K B./ S.ER EJ0EBE0K T 8/ S.MLR EPU 0MA B 8.8/ S.ER EJ0EBE0K T 9.7/ S.ER EJ0EB0J0K B 77./ S.ER EJ0EB0J0K B 78./ S.ER EJ0EBE0K B./ S.ER EJ0EBE0K B./ S.ER EJ0EBE0K B 0./ S.ER EJ0EBE0K B 9./ S.ER EJ0EBE0K B 8./ S.ER EJ0EBHK B 0./ S.ER EJ0EB0J0K B 0/ S.ER EJ0EB0K B 8.9/ S.ER EJ0EBE0K B./ S.ER EJ0EH0J B 97./ S.ER EJ0EH70J B 90./ S.ER EJ0EBA0K B./ S.ER 08 H H 00B-T T 7./ S.ER 08 H H 00B-T T.9/ S.ER EJ0EBE0K B 00./ S.ER EJ0EBE0K B 9./ S.ER EJ0EBE7K B.9/. J NR HSJ-0000 J 0000 NR HSJ-000 J S.NR AXN00P B.8/. J S.NR BM0B-ASRS-TF T 7./.9 J S.NR HSJ-090 B./.9 DS S.LED LNJ0MURA T./8.8 DS S.LED LNJ0MURA T./7 DS LD LD A0B00X M MI KU-00 S SW SKHLLFA00 S ER TP70N00E0-F-90 EP PB B B EP 9000 S.BEA MMZ08Y 0BT T 0./9. EP 9000 S.BEA MMZ08Y 0BT B 0.8/. EP S.BEA MMZ08Y 0BT B./. EP S.BEA MMZ08Y 0BT B./9. EP S.BEA MMZ08Y 0BT B 7./ EP 9000 S.BEA MMZ08Y 0BT B./. EP LT SRN-8-SP-N-W [HASSIS UNIT] REF ORDER H/V NO. NO. DESRIPTION M. LOATION J 000 NR B-R SP SP SDRS-0P-008A W BL OP-9 M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) S.=Surface mount -