Feasibility Study of a 6.6 kv, 1 MW Transformerless BTB-Based Loop Controller. System Design and Zero-Sequence-Current Reduction

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1 6.6 kv 1MW BTB Feasibility Study of a 6.6 kv, 1 MW Transformerless BTB-Based Loop Controller System Design and Zero-Sequence-Current Reduction Shinsuke Yonetani, Student Member, Hideaki Fujita, Member, Hirofumi Akagi,Member, Naotaka Okada,Member This paper achieves a feasibility study of a 6.6 kv, 1 MW loop controller that consists of a transformerless backto-back configuration using two 5-level diode-clamped converters. However, the loop controller requires reducing the zero-sequence current circulating between the two distribution lines below than 0.2 A in rms, in order to avoid malfunction of line-to-ground fault protection relays. Moreover, all the dc voltages across four capacitors in the dc link have to be controlled equally. This paper presents a solution to these problems. Two common-mode chokes are installed at the ac side of each converter to suppress high-frequency zero-sequence currents, while feedback control is applied to eliminate low-frequency zero-sequence currents. Two bidirectional buck-boost dc-dc converters are employed to keep the four capacitor voltages equal. Simulation results verify viability and effectiveness of the loop controller, along with the developed theoretical analysis. 5 BTB Keywords: 5-level diode-clamped converter, common-mode current, dc capacitor voltage, Back-To-Back 1. (1) (2) Dept. of Electrical and Electronic Engineering, Tokyo Institute of Technology , O-okayama, Meguro-ku, Tokyo Central Research Institute of Electrical Power Industry , Iwado Kita, Komae PWM BTB Back-To-Back 6.6 kv 1MW 6kVIGBT/ 5 EMTDC/PSCAD kv B

2 kv 10 kv 6 6kVIGBT/ IGBT (3) 1 8 6kVIGBT (4) (7) 6kVIGBT 1kHz kv 0.2 A kV,1MW Table 1. The number of power devices, and their voltage and current ratings in the 6.6 kv, 1 MW transformerless loop controller. Device Number Retad value Main power circuit IGBT 48 6 kv, 200 A Clamping circuit Diode 72 6kV,200A Buck-boost dc-dc converters IGBT 8 6kV, 50A Overvoltage protection IGBT 4 6kV,200A 2 PWM kv 1MW BTB BTB A (8) B EMI electromagnetic interference L EMI L f C f R f 2 L CM1 L CM2 BTB EMI 1350 IEEJ Trans. PE, Vol.124, No.11, 2004

3 1 5 BTB Fig. 1. The transformerless BTB-based loop controller using two 5-level diode-clamped converters. 2 Fig. 2. Dc capacitor voltages and dc link voltage. 2 1 Table 2. Ratings and circuit parameters in Fig. 1. Power rating 1MW Rated voltage 6.6 kv AC link inductor L 14 mh(10% ) Winding resistance of AC inductor R 0.4 Ω(1% ) Common-mode choke 1 L CM1 200 mh Common-mode choke 2 L CM2 100 mh Line inductor L S 7mH(5%) Line resistor R S 1.5 Ω(4% ) DC capacitor voltage V dc 3kV DC capacitor C dc 1000 µf DC link voltage 4 V dc 12 kv Unit capacitance constant H 18 ms Inductor in voltage controller L C 150 mh High-pass-filter capacitor C f 10 µf High-pass-filter resistor R f 20 Ω High-pass-filter inductor L f 6.4 mh High-pass-filter loss 80 W Carrier frequency 900 Hz on a three-phase, 50-Hz, 6.6-kV, 1-MVA base 4. A BTB B B A A v Au e Au ( v Av e Av = R + L d ) i Au i Av dt (1) v Aw e Aw i Aw d q R + L d dt ωl ωl R+ L d dt i Ad i Aq = v Ad e Ad v Aq e Aq (2) e Ad e Aq 1 A d q i Ad i Aq A d q v Ad v Aq A d q d q v q p q p = v Ad i Ad (3) q = v Ad i Aq (4) i Ad i Aq p q A d e Ad q e Aq (1) i Ad i Aq B

4 e Ad e Aq = v Ad 0 R ωl ωl R i Ad i Aq K I T i Ad i Ad i Aq i dt Aq (5) K I i Ad i Ad i Aq i Aq i Ad i Aq d q PI K I 15Ω T 7.5 ms (5) BTB v P2 N2 A i Ad = p v Ad + K dc (4 V dc v P2 N2) (6) p A B K dc 0.1 S 4 3 v A0 i Au i Av i Aw i A0 = i Au + i Av + i Aw = i B0 (7) Fig A block diagram of current controller. i A0 i B0 v A0 K 0 = 700 Ω v A0 = K 0i A0 (8) v A0 e A v A0 3 A 4 A 4 e A IGBT 5. v P2 N2 v P2 M v M N2 v P2 P1 v P1 M v M N1 v N1 N A e A D D P1 D M A i A P1 M D P1 D M e A 0 ( 2 V dc e A < 0) D P1 = e A /V dc (0 e A < V dc) (9) 2 e A /V dc (V dc e A 2 V dc) 0 ( 2 V dc e A < V dc) 1 + e A D M = /V dc ( V dc e A < 0) 1 e A /V dc (0 e A < V dc) 0 (V dc e A 2 V dc) (10) 5 2 v P2 M v M N2 (8) 3 2 v P2 M v M N2 i A Fig. 4. A reference and four carrier waves. 4 V dc v P2 N2 5 e A D Fig. 5. Output voltage e A and duty factor D. v v 1 20 ms 1352 IEEJ Trans. PE, Vol.124, No.11, 2004

5 v P2 M v M N2 A 1 1 M v P2 N2 4 V dc e A i A v P2 M v M N2 2 V dc A 6 i A 50 Hz M D M i A (a) e A i A (b) i A 90 M D M i A 1 0 v P2 M v M N2 i A 100 Hz (11) e A v P2 M v M N2 2 (12) EA (a) Unity power factor (b) Zero power factor 6 i A 50 Hz M Fig. 6. Current flowing into node M, when i A is a 50-Hz sinusoidal waveform. e A = 2EA sin ωt (11) e A2 = 4 2( v P2 M v M N2 ) EA cos 2ωt (12) 3πV P2 N2 (12) M 2 7 v M N2 v P2 M M 7(a) M D M i A 0 v P2 M v M N2 7(b) M D M i A 0 v P2 M v M N2 v P2 M v M N2 v P2 M v M N2 2 v P2 M v M N2 K I 15 Ω =40% v P2 M v M N = K I [Ω] v P2 M v M N2 K I 2 v P2 M v M N2 v P2 M v M N2 e A2 2 1:1 L = 10% 4 K I (a) Inductive (b) Resistive 7 M 2 Fig. 7. Current flowing into node M, when i A is a 100- Hz sinusoidal waveform. 100 Hz R S 2ω(L S + L) v P2 M v M N2 K I = 2ω(L S + L) (13) 1 1/2ω 5 3 v P2 P1 v P1 M v P2 M v M N2 e A i A A v P2 P1 v P1 M V dc 8 P1 8(a) e A i A P1 D P1 i A 0 v P2 P1 v P1 M 8(b) i A 90 P1 1 0 v P2 P1 v P1 M 180 v P1 M B

6 i A = 2I A sin(ωt + φ) = 2I Ad sin ωt 2I Aq cos ωt (15) (9) D P1 A P1 1 T = 20 ms ī AP (a) Unity power factor (b) Zero power factor 8 P1 Fig. 8. Current flowing into node P1. ī AP = 3 T T 0 D P1 i A dt = 6 T T 4 0 D P1 i A dt (16) e A = V dc T Vdc T Vdc = 1 ω sin 1 ( Vdc 2EA ) (17) 9 Fig. 9. Block diagram of buck-boost converters. v P2 P1 BTB A B A B (18) E A = E B A B v P2 P1 v P1 M A B v P2 P1 v P1 M 5 4 v P2 P1 v P1 M P N 9 P v P2 P1 v P1 M ic P ic P L C i CP vc P K V = 1S K C = 0.1 Ω 1:1 L C v P2 P1 v P1 M K V ic P 5 5 L C ī CP A e A i A e A = 2E A sin ωt (14) 2E A V dc ī AP ī AP = 6 { TVdc T ( e A 4 i A dt + 2 e ) A i A dt T 0 V dc T Vdc V dc = 6 [ EA I Ad { 4ωTVdc 2sin(2ωT Vdc ) π } ωt 2 V dc + 2 ] 2I Ad cos(ωt Vdc ) (18) (18) I Aq SVG or STATCOM I Ad = 0 I Aq 0 P1 0 v P2 P1 v P1 M L C A B ī CP = ī AP + ī BP (19) I Ad = I Bd E A = E B ī CP = 0 v P2 P1 = v P1 M A B R L 1MW A B V A V B 6.4 kv 6.9 kv u v 20%, w 20% 11 i SAu THD 6km A B A B 1354 IEEJ Trans. PE, Vol.124, No.11, 2004

7 10 Fig. 10. Simulated system. Single-line diagram Fig Effect of zero-sequence-current control. 13 Fig. 13. Effect of dc capacitor voltage controller. 11 Fig. 11. Simulated waveforms in steady state. Total Harmonic Distortion 3.5% L C 20 A 12 i A0 1.5 A 0.2 A EMI EMI 13 v P2 P1 v P1 M 14 v P2 M v M N v P2 M v M N2 Fig. 14. Effect of a 100-Hz sinusoidal current on dc capacitor voltages v P2 M and v M N2. v P2 M v M N s 0.05 s 1 M N2 0MW i Au 100 Hz 0.05 s v P2 M v M N2 15 V B L C ī CP 1MW B

8 15 V B ī CP Fig. 15. Relation between voltage V B and dc reactor current ī CP. 7 F.Z. Peng, Z. Pan, K. Corzine, V. Stefanovic, and M. Leuthen: Voltage Balancing Control of Diode-Clamped Multilevel Rectifier/Inverter Systems, IEEE IAS Annual Meeting, Vol.1, pp ( ) 8 M. Hagiwara, H. Fujita, and H. Akagi: Performance of a Self-Commutated BTB HVDC Link System under a Single-Line-to-Ground Fault Condition, IEEE Trans. Power Electron., Vol.18, No.1, pp (2003-1) 9 M. Matsui: Neutral Point Voltage Stabilization Control Based on Harmonic Power Flow for Tree-Level PWM Inverter Type SVG, 1995 National Convention Record IEE Japan Industry Applications Society, No.144, pp (1995-8) (in Japanese) 3 PWM SVG, 6, No.144, pp (1995-8) BTB V A 6.4 kv 10 R L 10Ω 3.5 MW 0MW 10% (18) (14) (19) kV,1MW BTB 5 5 v P2 M v M N BTB IEEE IAS Committee Prize Paper Award 1 N. Okada: Control of Loop Distribution Network and Result, The Papers of Technical Meeting on PSE, IEE Japan, PSE-00-2 (2000-1) (in Japanese),, PSE-00-2 (2000-1) 2 F. Yoshii and H. Akagi: Configuration and Control of a Transformerless BTB-Based Loop Controller for Installation on Distribution Power Systems, The Papaers of Technical Meeting on SPC, IEE Japan, SPC (2002-2) (in Japanese) BTB,, SPC-02-22, (2002-2) 3 A. Nabae, I. Takahashi, and H. Akagi: A New Neutral-Point-Clamped PWM Inverter, IEEE Trans. IAS, Vol.17, No.5, pp (1981) 4 S. Ogasawara, T. Sawada, and H. Akagi: Analysis of the Neutral Point Potential Variation of Neutral-Point-Clamped Voltage Source PWM Inverters, T. IEE Japan, Vol.113-D, No.1, pp (1993-1) (in Japanese) PWM, D, 113, 1, pp (1993-1) 5 3, 5, Vol.5, No.516, pp (1993-3) 6 Y. Chen, B. Mwinyiwiwa, Z. Wolanski, and B. T. Ooi: Unified Power Flow Controller (UPFC) Based on Chopper Stabilized Diode-Clamped Multilevel Converters, IEEE Trans. PELS, Vol.15, No.2, pp (2000-3) IEEE IEEE Fellow 1998 IEEE IAS/PELS Distinguished Lecturer 2001 IEEE William E. Newell Power Electronics Award 2004 IEEE IAS Outstanding Achievement Award IEEJ Trans. PE, Vol.124, No.11, 2004