ΗΜΥ 408 ΨΗΦΙΑΚΟΣ ΣΧΕΔΙΑΣΜΟΣ ΜΕ FPGAs Εαρινό Εξάμηνο 2016 ΔΙΑΛΕΞΗ 1: ΕΙΣΑΓΩΓΗ ΚΑΙ ΠΛΗΡΟΦΟΡΙΕΣ ΜΑΘΗΜΑΤΟΣ* (*The Design-Warrior s Guide to FPGAs) ΧΑΡΗΣ ΘΕΟΧΑΡΙΔΗΣ Επίκουρος Καθηγητής, ΗΜΜΥ (ttheocharides@ucy.ac.cy)
ΔΙΟΙΚΗΤΙΚΑ Διδάσκων: Δρ. Χάρης Θεοχαρίδης Γραφείο: Green Park, #110 και Ερευνητικό Κέντρο ΚΙΟΣ Tηλέφωνο: 22892259 email: ttheocharides@ucy.ac.cy Ώρες Γραφείου (ΚΙΟΣ): Δευτέρα 11:00-13:00 και Πέμπτη 11:00-13:00, ή με ραντεβού Διαλέξεις: Δευτέρα, 13:30 15:00, Αίθουσα 115, ΧΩΔ 02 Εναλλακτική Πρόταση??????? - ΑΚΟΥΩ! Εργαστήριο: TBA Βοηθός Διδασκαλίας (to be confirmed): Αντρέας Γεωργίου URL: http://www.eng.ucy.ac.cy/theocharides/courses/ece408 <- ΘΑ ΑΝΑΒΑΘΜΙΣΤΕΙ ΣΥΝΤΟΜΑ. ΗΜΥ408 Δ01 Introduction.2 Theocharides, ECE, 2016
Paperless Course Think of the trees! Βιβλία: Michael John Sebastian Smith, Application Specific Integrated Circuits, Addison- Wesley Publishing Company, VLSI Design Series, 1040 pages, ISBN 0-201-50022-1, June 1997 - http://www-ee.eng.hawaii.edu/~msmith/asics/html/asics.htm FPGA Prototyping By Verilog Examples: Xilinx Spartan-3 Version 1st Edition, by Pong P. Chu There s one with VHDL as well. Advanced FPGA Design: Architecture, Implementation, and Optimization 1st Edition, by Steve Kilts The Design Warrior's Guide to FPGAs, 1st Edition; Devices, Tools and Flows, by Clive Maxfield,ISBN9780080477138 Σημειώσεις: pdf στην ιστοσελίδα μετά τις διαλέξεις ΔΕΝ ΘΑ ΦΕΡΝΩ ΤΥΠΩΜΕΝΕΣ ΣΗΜΕΙΩΣΕΙΣ Η ΟΤΙΔΗΠΟΤΕ ΑΛΛΟ! ΕΙΣΤΕ ΥΠΕΥΘΟΙΝΟΙ ΝΑ ΕΝΗΜΕΡΩΝΕΣΤΕ ΑΠΟ ΤΗΝ ΙΣΤΟΣΕΛΙΔΑ Η ΑΠΟ ΤΗΝ ΠΑΡΟΥΣΙΑ ΣΑΣ ΣΤΟ ΜΑΘΗΜΑ! ΗΜΥ408 Δ01 Introduction.3 Theocharides, ECE, 2016
ΒΑΘΜΟΛΟΓΙΑ Ασκήσεις εργαστηρίου 80% Είναι εργαστηριακό μάθημα... 1 η άσκηση 5 μονάδες 2 η άσκηση 10 μονάδες 3 η άσκηση 15 μονάδες 4 η άσκηση 30 μονάδες (ΟΜΑΔΙΚΗ) 5 η άσκηση 40 μονάδες (ΟΜΑΔΙΚΗ - περιλαμβάνει την τελική παρουσίαση) Στο εργαστήριο θα χωριστείτε σε ομάδες των 2. Η κάθε ομάδα θα πάρει το δικό της board ΑΝΑΜΕΝΕΤΑΙ ΟΜΩΣ ΙΣΗ ΣΥΜΜΕΤΟΧΗ!!! - Η πρώτη, δεύτερη, και τρίτη εργασία θα γίνουν ξεχωριστά. Τελική Εξέταση (εφ όλης της ύλης) 20% Απαραίτητες προϋποθέσεις επιτυχίας στο μάθημα είναι: η εξασφάλιση συνολικού βαθμού πέραν του 50% ΗΜΥ408 Δ01 Introduction.4 Theocharides, ECE, 2016
ΠΕΡΙΕΧΟΜΕΝΑ ΜΑΘΗΜΑΤΟΣ Περιεχόμενα Το μάθημα προσφέρει στους φοιτητές όλες τις βασικές γνώσεις για γρήγορη σχεδίαση υπολογιστικών συστημάτων με χρήση FPGA και γλώσσας σχεδιασμού HDL (VHDL or Verilog). Μέσω των διαλέξεων και των εργαστηριακών εργασιών, θα παρασχεθεί στους φοιτητές η απαραίτητη γνώση και πείρα που θα τους βοηθήσει να καταφέρουν τα αποτελέσματα που περιγράφονται στο συμβόλαιο μαθήματος. ΗΜΥ408 Δ01 Introduction.5 Theocharides, ECE, 2016
ΤΙ ΠΡΕΠΕΙ ΝΑ ΞΕΡΕΤΕ Προαπαιτούμενα: ΗΜΥ 210, 211, 212 και ΗΜΥ 213 και αποδεδειγμένη γνώση σε όλα από τα ακόλουθα: Βασικές Αρχές Προγραμματισμού Υπολογιστών Αριθμητικά Συστήματα Δυαδική Άλγεβρα Συνδυαστικά και Ακολουθιακά Κυκλώματα Οργάνωση και βασικά συνιστώσα ηλεκτρονικών υπολογιστών. ΗΜΥ408 Δ01 Introduction.6 Theocharides, ECE, 2016
ΔΙΑΓΡΑΜΜΑ ΜΑΘΗΜΑΤΟΣ Η τάξη έχει αρκετές απαιτήσεις Είναι Project-Based τάξη, όπου το κύριο φόρτο εργασίας θα είναι στην πραγματοποίηση εργαστηριακών ασκήσεων. Σχεδίαση, Υλοποίηση, Σύνθεση και Εφαρμογή με Χρήση Εργαλείων και Τελευταίας Τεχνολογίας FPGA Πίνακα. Διαλέξεις: 4 βδομάδες εισαγωγή και βασικά στοιχεία FPGA. 4 βδομάδες σχεδίαση και υλοποίηση εφαρμογών σε τελευταίου τύπου FPGAs 4 βδομάδες τρέχοντα και αναδυόμενα θέματα αρχιτεκτονικών FPGA. 1 βδομάδα παρουσιάσεις * ΗΜΥ408 Δ01 Introduction.7 Theocharides, ECE, 2016
Εργαστήριο Το μάθημα αυτό είναι καθαρά μάθημα εργαστηρίου. Το εργαστήριο θα χωριστεί σε πέντε μελέτες. Οι μελέτες θα είναι συνδεδεμένες μεταξύ τους, αλλά δεν είναι απαραίτητο να τελειώσετε μια μελέτη ώστε να πάρετε την επόμενη. Η κάθε μελέτη θα έχει διάρκεια εκτέλεσης από μία έως τρεις βδομάδες αναλόγως απαιτήσεων. Η κάθε μελέτη στοχεύει στην απόκτηση συγκεκριμένων εμπειριών και επίγνωση αρκετών προβλημάτων που συναντιούνται σήμερα στον κόσμο του σχεδιασμού με FPGAs. Το εργαστήριο διεξάγεται καθόλη την διάρκεια του εξαμήνου! - Το οποίο σημαίνει ότι θα πρέπει να προγραμματιστείτε καλύτερα γιατί δεν είμαι διαθέσιμος 24/7! Αν έχετε απορίες, ΕΛΑΤΕ ΝΑ ΜΕ ΔΕΙΤΕ (ή τον Αντρέα!) ΤΟ ΣΥΝΤΟΜΟΤΕΡΟ. Περισσότερα για το εργαστήριο σε μεταγενέστερο στάδιο ΗΜΥ408 Δ01 Introduction.8 Theocharides, ECE, 2016
The FPGA Board we will work 100-pin Hirose FX2 connector Three 6-pin Pmod connectors DB15HD VGA PS/2 keyboard Two DB9 RS-232 connectors RJ-45 Ethernet 16-pin header for optional LCD modules SMA connector for high-speed clock input http://www.digilentinc.com/products/detail.cfm?prod=s3e1600 ECE 408 L1. Introduction.9 Theocharides, 2016
Introduction to FPGAs... ECE 408 L1. Introduction.10 Theocharides, 2016
ECE 408 L1. Introduction.11 Theocharides, 2016
ECE 408 L1. Introduction.12 Theocharides, 2016
GENERAL PURPOSE MICRO- PROCESSORS μp Το Φάσμα Υλικού Υπολογιστών GRAPHICS PROCESSING UNIT GPU ASIC (Application- Specific Integrated Circuits ) DSP (Digital Signal Processors) FPGAs (Field- Programmable Gate Arrays) And Programmable Logic Traditional Architecture, Fetch - Decode Execute (typically) Graphics Processors, Optimized for Graphics and Video Processing Full Custom Circuits optimized to perform certain tasks Processors optimized in digital signal processing (audio, video, filters, etc.) Programmable hardware; technology enables user to activate certain configurations to perform logic and arithmetic functions, control and signal transmission ECE 408 L1. Introduction.13 Theocharides, 2016
What does FPGA stand for? Field Programmable Gate Array Field : in the field Programmable : Re-Configurable Change Logic Functions Gate Array : reference to ASIC internal architecture ECE 408 L1. Introduction.14 Theocharides, 2016
What is an FPGA? Field Programmable Gate Array (Very) Large Scale Integrated Circuit Digital Logic Programmed after manufacture rather than unchangeable Application Specific Integrated Circuit ASIC First appeared in 1980 s. Took off in last decade. Standard IC manufacturing process Following Moore s Law ECE 408 L1. Introduction.15 Theocharides, 2016
Why do we care? Essential Components in modern Computing Systems Data Acquisition (Millions Channels) Flexible/ Domain-Specific Computing! RECONFIGURABLE! ECE 408 L1. Introduction.16 Theocharides, 2016
What is an FPGA? Field Programmable Gate Array Configurable (Programmable) General Logic Blocks + Configurable Interconnects + Special Purpose Blocks (Embedded Processors) Configured (multiple times) to perform variety of tasks Programmable interconnect Programmable logic blocks Simple Logic Block Islands in a Sea of Interconnects 10,000 100,000+ (Massively Parallel Processing!) ECE 408 L1. Introduction.17 Theocharides, 2016
Little bit of History FPGAs appeared in the 1980 s. Took off in last decade really. Bridge gap between simple Programmable Logic and semi custom ASICs (Application Specific Integration Circuits). PLDs ASICs SPLDs CPLDs The GAP Gate Arrays Structured ASICs* Standard Cell Full Custom *Not available circa early 1980s ECE 408 L1. Introduction.18 Theocharides, 2016
l l l Previous Generations Logic Devices Simple Logic (used to glue other ICs together) Reprogrammable (UV light, electrically eraseable) Cheap Easy to Program Many different variations Eg. Implement Logic as Sum of Products Terms SPLDs PLDs CPLDs a b c a!a b!b c!c & & & a & b & c a & c!b &!c Predefined link Programmable link Programmable OR array PROMs PLAs PALs GALs etc. Predefined AND array w = (a & c) (!b &!c) x = (a & b & c) (!b &!c) y = (a & b & c) w x y ECE 408 L1. Introduction.19 Theocharides, 2016
ASICs Large Complex Functions Customised for Extremes of Speed, Low Power, Radiation Hard (and many more customizations) (Very) Expensive (in small quantities) (Very) Hard to Design. Long Design cycles. Not Reprogrammable. High Risk Semi Custom Gate Arrays. Basic cells I/O cells/pads Channels (a) Single-column arrays (b) Dual-column arrays ASICs Gate Arrays Structured ASICs Standard Cell Full Custom Increasing complexity ECE 408 L1. Introduction.20 Theocharides, 2016
FPGAs best of both worlds Large Complex Functions Programmability, Flexibility. PLDs SPLDs CPLDs The GAP ASICs Gate Arrays Structured ASICs* Massively Parallel Architecture Standard Cell Full Custom Fast Turnaround Designs *Not available circa early 1980s Mass produced. Cheap! Can Prototype ASICs Used to be Power Hungry Programmable interconnect Programmable logic blocks ECE 408 L1. Introduction.21 Theocharides, 2016
The world of digital integrated circuits Integrated Circuits Full-Custom ASICs Semi-Custom ASICs User Programmable PLD FPGA PAL PLA PML LUT (Look-Up Table) MUX Gates ECE 408 L1. Introduction.22 Theocharides, 2016
Non-Conventional Implementation Methods ASIC Application Specific Integrated Circuit designs must be sent for expensive and time consuming fabrication in semiconductor foundry designed all the way from behavioral description to physical layout FPGA Field Programmable Gate Array bought off the shelf and reconfigured by designers themselves no physical layout design; design ends with a bitstream used to configure a device ECE 408 L1. Introduction.23 Theocharides, 2016
What makes up an FPGA? Configurable Logic Blocks Block RAMs Block RAMs I/O Blocks Block RAMs ECE 408 L1. Introduction.24 Theocharides, 2016
What characterizes Reconfigurable Computing? Parallelism, specialization, hardware-level adaptation Parallelism customized to meet design objectives Logic specialized to perform specific function Functionality changed as problem requirements change ECE 408 L1. Introduction.25 Theocharides, 2016
Microprocessor-based Systems (Temporal) Data Storage (Register File) A B C ALU 64 Generalized to perform many functions well. Operates on fixed data sizes. Inherently sequential - Constrained even with multiple data paths. ECE 408 L1. Introduction.26 Theocharides, 2016
Reconfigurable Computing if (A > B) { H = A; L = B; } else { H = B; L = A; } A Functional Unit H B L Create specialized hardware for each application. Functional units optimized to perform a special task. ECE 408 L1. Introduction.27 Theocharides, 2016
Example: Bubblesort Problem (Spatial) A B A B H L H L A B A B H L H L A H B L Smallest Largest Adapt interconnect to problem. Take advantage of parallelism. ECE 408 L1. Introduction.28 Theocharides, 2016
Implementation Spectrum Microprocessor Reconfigurable Hardware ASIC ASIC gives high performance at cost of inflexibility. Processor is very flexible but not tuned to the application. Reconfigurable hardware is a nice compromise. ECE 408 L1. Introduction.29 Theocharides, 2016
Reconfigurable Hardware A B C D Look-up table (LUT) Out A B C D = out Each LUT operates on four one-bit inputs. Output is one data bit. Can perform any boolean function of four inputs 2 4 2 = 64K functions (4096 patterns) ECE 408 L1. Introduction.30 Theocharides, 2016
Translating a Design to an FPGA C program Circuit Array.. C = A+B. A B + C CAD to translate circuit from text description to physical implementation well understood. CAD to translate from C program to circuit not well understood. Very difficult for application designers to successfully write highperformance applications Need for design automation! ECE 408 L1. Introduction.31 Theocharides, 2016
High-level Compilers Difficult to estimate hardware resources. Some parts of program more appropriate for processor (hardware/software codesign). Compiler must parallelize computation across many resources. Engineers like to write in C rather than pushing little blocks around. C = A+B A + C B for (i = 0; i<n, i++) {.. } ECE 408 L1. Introduction.32 Theocharides, 2016
Circuit Compilation 1. Technology Mapping LUT 2. Placement LUT Assign a logical LUT to a physical location.? 3. Routing Select wire segments And switches for Interconnection. ECE 408 L1. Introduction.33 Theocharides, 2016
Two Bit Adder Made of Full Adders A B C o FA C i A+B = D S Logic synthesis tool reduces circuit to SOP form S = ABC i + ABC i + ABC i + ABC i A B C i LUT C o A B C i LUT S C o = ABC i + ABC i + ABC i + ABC i ECE 408 L1. Introduction.34 Theocharides, 2016
Processor + FPGA Three possibilities daughtercard Proc FPGA chip Backplane bus (e.g. PCI) 1. FPGA serves as coprocessor for data intensive applications possible project. Proc FPGA chip 2. FPGA serves as embedded computer for low latency transfer. Reconfigurable Functional Unit ECE 408 L1. Introduction.35 Theocharides, 2016
Processor + FPGA (cont..) 3. Processor integration Processor RF ALU FPGA FPGA logic embedded inside processor. A number of problems with 2 and 3. - Process technology an issue. - ALU much faster than FPGA generally. - FPGA much faster than the entire processor. ECE 408 L1. Introduction.36 Theocharides, 2016
Multi-FPGA Systems F F F F F F F F F Most applications don t fit on one device. Create need for partitioning designs across many devices. Effectively a netlist computer Each FPGA is a logic processor interconnected in a given topology. ECE 408 L1. Introduction.37 Theocharides, 2016
Dynamic Reconfiguration L L L L What if I want to exchange part of the design in the device with another piece? Need to create architectures and software to incrementally change designs. Effectively a configuration cache Examples: encryption, filtering. ECE 408 L1. Introduction.38 Theocharides, 2016
Logic Element Inputs Look-Up Table (LUT) Out Clock State Enable ECE 408 L1. Introduction.39 Theocharides, 2016
Field-Programmable Gate Array Logic Element Tracks LE LE LE LE LE LE LE LE LE LE LE LE Each logic element outputs one data bit. Interconnect programmable between elements. Interconnect tracks grouped into channels. ECE 408 L1. Introduction.40 Theocharides, 2016
FPGA Architecture Issues Logic Element Need to explore architectural issues. How much functionality should go in a logic element? How many routing tracks per channel? Switch population? ECE 408 L1. Introduction.41 Theocharides, 2016
Real World Physical Issues S S Wires have real cost Modelling FPGA delay. Improving performance through buffering/segmentation. Technology dependent. The cost of reconfigurability. ECE 408 L1. Introduction.42 Theocharides, 2016
Which Way to Go? ASICs High performance Low power Low cost in high volumes FPGAs Off-the-shelf Low development cost Short time to market Reconfigurability ECE 408 L1. Introduction.43 Theocharides, 2016
FPGA Advantages Manufacturing cycle for ASIC is very costly, lengthy and engages lots of manpower Mistakes not detected at design time have large impact on development time and cost FPGAs are perfect for rapid prototyping of digital circuits Easy upgrades like in case of software Unique applications reconfigurable computing ECE 408 L1. Introduction.44 Theocharides, 2016
So...what can we do with FPGAs? ECE 408 L1. Introduction.45 Theocharides, 2016