+3V3 Supply. +3V0 Flash + VCCPGMy +2V5 FPGA VCC + FPGA I/O +1V1 FPGA Core. Overview. abaxor engineering GmbH
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3 6 7 8 Supply +V0 Flash + PGMy +V FPG + FPG I/O +V FPG ore Overview 6 7 8
4 6 7 8 I0NK_ IO H IO P IO L IO J VRFN0 N IO/IFFIO_TX_L9N/IFFOUT_L9N IO/IFFIO_RX_L0N/IFFOUT_L0N/QL J IO/IFFIO_TX_L9P/IFFOUT_L9P/QL IO/IFFIO_RX_L0P/IFFOUT_L0P/QL J IO/IFFIO_RX_LN/IFFOUT_LN/QSNL K IO/IFFIO_TX_LN/IFFOUT_LN/QL IO/IFFIO_RX_LP/IFFOUT_LP/QSL K IO/IFFIO_TX_LP/IFFOUT_LP F IO/IFFIO_TX_LN/IFFOUT_LN/QL IO/IFFIO_RX_LN/IFFOUT_LN/QL F IO/IFFIO_TX_LP/IFFOUT_LP/QL F IO/IFFIO_RX_LP/IFFOUT_LP/QL G IO/IFFIO_RX_LN/IFFOUT_LN K O/IFFIO_TX_L6N/IFFOUT_L6N/QL H IO/IFFIO_RX_LP/IFFOUT_LP L IO/IFFIO_TX_L6P/IFFOUT_L6P/QL G IO/IFFIO_TX_L7N/IFFOUT_L7N J IO/IFFIO_RX_L8N/IFFOUT_L8N/QL L IO/IFFIO_TX_L7P/IFFOUT_L7P/QL H IO/IFFIO_RX_L8P/IFFOUT_L8P/QL M IO/IFFIO_RX_L9N/IFFOUT_L9N/QSNL L IO/IFFIO_TX_L0N/IFFOUT_L0N/QL R IO/IFFIO_RX_L9P/IFFOUT_L9P/QSL M IO/IFFIO_TX_L0P/IFFOUT_L0P P IO/IFFIO_TX_LN/IFFOUT_LN/QL R IO/IFFIO_RX_LN/IFFOUT_LN/QL N IO/IFFIO_TX_LP/IFFOUT_LP/QL T IO/IFFIO_RX_LP/IFFOUT_LP/QL N IO/IFFIO_RX_LN/IFFOUT_LN L IO/IFFIO_TX_LN/IFFOUT_LN/QL T IO/IFFIO_RX_LP/IFFOUT_LP M IO/IFFIO_TX_LP/IFFOUT_LP/QL R I0NK_ IO R IO U6 VRFN0 V TK L6 TMS P6 TO P TI N6 S_T0,SO/T0 V S_T/T U S_T/T U S_T/T M SO/T P LK K6 IO/T6/IFFIO_RX_N/IFFOUT_N/Q M7 LVS_RX N/. IO/T/IFFIO_TX_N/IFFOUT_N V IO/T8/IFFIO_RX_P/IFFOUT_P/Q N7 LVS_RX P/. IO/T7/IFFIO_TX_P/IFFOUT_P/Q V IO/T0/IFFIO_RX_N/IFFOUT_N/QSN M0 IO/T9/IFFIO_TX_N/IFFOUT_N/Q U7 IO_U7/. IO/T/IFFIO_RX_P/IFFOUT_P/QS N0 IO/T/IFFIO_TX_P/IFFOUT_P T7 IO/T/IFFIO_RX_N/IFFOUT_N/Q M8 LVS_RX N/. IO/T/IFFIO_TX_6N/IFFOUT_6N/Q P IO/LKUSR/IFFIO_RX_P/IFFOUT_P/Q M9 LVS_RX P/. IO/T/IFFIO_TX_6P/IFFOUT_6P/Q R IO/PR_ON/IFFIO_RX_7N/IFFOUT_7N N IO/PR_RY/IFFIO_TX_8N/IFFOUT_8N/Q P8 IO/PR_RROR/IFFIO_RX_7P/IFFOUT_7P P IO/IFFIO_TX_8P/IFFOUT_8P/Q N8 R0 R0 IO_R/. IO_R/. IO_T/. IO_T/. IO_R/. R0 k 0 FPG_TK FPG_TMS FPG_TO FPG_TI FPG_T0 FPG_T FPG_T FPG_T 0 G_/6. 0 R0 G_/6. G_/6. G_/6. G_9/6. G_6/6. G_/6.6 G_/6.6 G_8/6. G_0/6. G_/6. G_/6.6 G_/6.6 INIT_ON 0 0 enable INIT_ON option in Quartus Sotfware IO_P FPG_LK IO_P R0 08 FPG_SO M0 IO_P R06 0R, NP L_INIT L-060, green, NP FPG_TK FPG_TO FPG_TMS FPG_TI FPG_T0 FPG_T FPG_T FPG_T 7 FPG_SO FPG_LK 6 PGM T0 T T T S LK R07 8 k R08 I0 k, NP 09 PINH-X PQSI8N, alternativ NQ0S I0NK_9 MSL0 J6 MSL MSL MSL MSL ONFIG ONF_ON STTUS JP H G G 6 6 IO_P FPG_ R09 R0 0R 0R, NP FPG_ONFIG FPG_STTUS PGM MSL0: 0 = fast, = standard FPG_ONF_ON R FPG_TK FPG_TO R 0 PGM R R -0SOL-7 FPG_TI FPG_TMS 0 FPG_ONF_ON M0 PGM R 0R N700P, L_ONF L-060, green -0SOL-7 N700P,, NP FPG ofig + ebug IO 6 7 8
5 6 7 8 I0NK_ IO T8 IO U6 IO U IO R VRFN0 V IO/RZQ_0/IFFIO_TX_N/IFFOUT_N U IO/IFFIO_RX_6N/IFFOUT_6N/Q V IO/IFFIO_TX_P/IFFOUT_P/Q U IO/IFFIO_RX_6P/IFFOUT_6P/Q V IO/IFFIO_RX_7N/IFFOUT_7N/QSN M IO/IFFIO_TX_8N/IFFOUT_8N/Q U8 IO/IFFIO_RX_7P/IFFOUT_7P/QS L IO/IFFIO_TX_8P/IFFOUT_8P V7 IO/IFFIO_TX_9N/IFFOUT_9N/Q U7 IO/IFFIO_RX_0N/IFFOUT_0N/Q V6 IO/IFFIO_TX_9P/IFFOUT_9P/Q T7 IO/IFFIO_RX_0P/IFFOUT_0P/Q V IO/LKN/IFFIO_RX_N/IFFOUT_N U IO/IFFIO_TX_N/IFFOUT_N/Q R8 IO/LKP/IFFIO_RX_P/IFFOUT_P T IO/IFFIO_TX_P/IFFOUT_P/Q P8 IO/IFFIO_TX_N/IFFOUT_N T6 IO/IFFIO_RX_N/IFFOUT_N/Q P IO/IFFIO_TX_P/IFFOUT_P/Q R7 IO/IFFIO_RX_P/IFFOUT_P/Q P IO/IFFIO_RX_N/IFFOUT_N/QSN M IO/IFFIO_TX_6N/IFFOUT_6N/Q R6 IO/IFFIO_RX_P/IFFOUT_P/QS N IO/IFFIO_TX_6P/IFFOUT_6P P6 IO/IFFIO_TX_7N/IFFOUT_7N/Q N7 IO/IFFIO_RX_8N/IFFOUT_8N/Q R IO/IFFIO_TX_7P/IFFOUT_7P/Q N6 IO/IFFIO_RX_8P/IFFOUT_8P/Q T IO/LKN/IFFIO_RX_9N/IFFOUT_9N N IO/IFFIO_TX_0N/IFFOUT_0N/Q U IO/LKP/IFFIO_RX_9P/IFFOUT_9P P IO/IFFIO_TX_0P/IFFOUT_0P/Q T IO_P 0 0 I0NK_ IO K IO M6 VRFN0 M7 IO/RZQ_/IFFIO_TX_RP/IFFOUT_RP/QR L6 IO/INIT_ON/IFFIO_RX_RP/IFFOUT_RP L IO/PR_RQUST/IFFIO_TX_RN/IFFOUT_RN/QR L IO/R_RROR/IFFIO_RX_RN/IFFOUT_RN K IO/O/IFFIO_TX_RP/IFFOUT_RP/QR M8 IO/IFFIO_RX_RP/IFFOUT_RP/QR J IO/VP_ONFON/IFFIO_TX_RN/IFFOUT_RN/QR N8 LVS_TX_LK_N IO/IFFIO_RX_RN/IFFOUT_RN/QR J IO/V_O/IFFIO_TX_RP/IFFOUT_RP K7 LVS_TX_LK_P IO/IFFIO_RX_R6P/IFFOUT_R6P/QSR G IO/V_LRN/IFFIO_TX_RN/IFFOUT_RN/QR K6 IO/IFFIO_RX_R6N/IFFOUT_R6N/QSNR H IO/IFFIO_TX_R7P/IFFOUT_R7P/QR L7 IO/IFFIO_RX_R8P/IFFOUT_R8P/QR J6 LVS_RX_LK N IO/IFFIO_TX_R7N/IFFOUT_R7N K8 IO/IFFIO_RX_R8N/IFFOUT_R8N/QR J LVS_RX_LK P LVS_RX_0_N I0NK_ LVS_RX_0_P IO T8 IO V9 VRFN0 U0 IO/IFFIO_TX_7N/IFFOUT_7N V6 IO/IFFIO_RX_8N/IFFOUT_8N/Q U IO/IFFIO_TX_7P/IFFOUT_7P/Q V7 IO/IFFIO_RX_8P/IFFOUT_8P/Q U IO/IFFIO_RX_9N/IFFOUT_9N/QSN P9 IO/IFFIO_TX_0N/IFFOUT_0N/Q T LVS_RX_LK_0_N IO/IFFIO_RX_9P/IFFOUT_9P/QS P0 IO/IFFIO_TX_0P/IFFOUT_0P T LVS_RX_LK_0_P IO/FPLL_L_LKOUT,FPLL_L_LKOUTN/IFFIO_TX_N/IFFOUT_N/Q V8 IO/IFFIO_RX_N/IFFOUT_N/Q T9 IO/FPLL_L_LKOUT0,FPLL_L_LKOUTP,FPLL_L_F/IFFIO_TX_P/IFFOUT_P/Q U8 IO/IFFIO_RX_P/IFFOUT_P/Q R9 IO/LKN/IFFIO_RX_N/IFFOUT_N T IO/IFFIO_TX_N/IFFOUT_N/Q U9 IO/LKP/IFFIO_RX_P/IFFOUT_P R IO/IFFIO_TX_P/IFFOUT_P/Q V0 IO_V6 IO_U IO_V7 IO_U IO_V8 IO_U8 LVS_RX N LVS_RX P 06 IO_P 07 ST_LVS_TX MU_P/6. ST_LVS_TX MU_N/6. ST_LVS_RX SPU_P/6. ST_LVS_RX SPU_N/6. R0 IO_P IO_P R_error: When you use the dedicated R_RROR pin configured as an open-drain output, connect this pin through an external 0-kΩ pull-up resistor to PGM. When you do not use the dedicated R_RROR pin configured as an open-drain output and when this pin is not used as an I/O pin, connect this pin as defined in the Quartus II software. (PG-00-.7) IO_P_SL/8.7 R0 0R LVS_RX_0_P LVS_RX_0_N LVS_RX_LK_0_N LVS_RX_LK_0_P LVS_RX N LVS_RX P LVS_RX P/. LVS_RX N/. LVS_RX P/. LVS_RX N/. IO_U8 IO_U IO_R/. X _9/0/_- IO_T/. LVS_TX_LK_P LVS_TX_LK_N LVS_RX_LK P LVS_RX_LK N IO_R/. IO_V8 IO_V7 IO_U IO_R/. IO_T/. IO_U7/. IO_V6 IO_T_N/. IO_T_P/. IO_T_N/. IO_T_P/. LVS or S X IO_T0_N/. IO_T0_P/. IO_T6_N/. IO_T6_P/. IO_T8_N/. IO_T8_P/. 790_9/0/_- IO_P_OUT 7 8 0n, 6V 0n, 6V 0n, 6V 0n, 6V IO_P 0n, 6V 6 0n, 6V FPG + I/O 6 7 8
6 6 7 8 I0NK_7 IO7 6 IO7 IO7 IO7 VRF7N0 IO/LKP/IFFIO_RX_T9P/IFFOUT_T9P F IO/IFFIO_TX_T0P/IFFOUT_T0P/QT 6 IO_T0_P/. IO/LKN/IFFIO_RX_T9N/IFFOUT_T9N F IO/IFFIO_TX_T0N/IFFOUT_T0N/QT 6 IO_T0_N/. IO/IFFIO_RX_TP/IFFOUT_TP/QT IO/IFFIO_TX_TP/IFFOUT_TP/QT IO_T_P/. IO/IFFIO_RX_TN/IFFOUT_TN/QT IO/IFFIO_TX_TN/IFFOUT_TN/QT IO_T_N/. IO/IFFIO_RX_TP/IFFOUT_TP/QST IO/IFFIO_TX_TP/IFFOUT_TP 7 IO/IFFIO_RX_TN/IFFOUT_TN/QSNT IO/IFFIO_TX_TN/IFFOUT_TN/QT 8 IO/IFFIO_RX_TP/IFFOUT_TP/QT IO/IFFIO_TX_T6P/IFFOUT_T6P/QT 6 IO_T6_P/. IO/IFFIO_RX_TN/IFFOUT_TN/QT IO/IFFIO_TX_T6N/IFFOUT_T6N 7 IO_T6_N/. IO/LK0P/IFFIO_RX_T7P/IFFOUT_T7P F9 IO/IFFIO_TX_T8P/IFFOUT_T8P/QT IO_T8_P/. IO/LK0N/IFFIO_RX_T7N/IFFOUT_T7N F0 IO/IFFIO_TX_T8N/IFFOUT_T8N/QT IO_T8_N/. IO/IFFIO_RX_T9P/IFFOUT_T9P/QT IO/IFFIO_TX_T0P/IFFOUT_T0P/QT IO/IFFIO_RX_T9N/IFFOUT_T9N/QT 0 IO/IFFIO_TX_T0N/IFFOUT_T0N/QT IO/IFFIO_RX_TP/IFFOUT_TP/QST 9 IO/IFFIO_TX_TP/IFFOUT_TP IO_T_P/. IO/IFFIO_RX_TN/IFFOUT_TN/QSNT 9 IO/IFFIO_TX_TN/IFFOUT_TN/QT 0 IO_T_N/. IO/IFFIO_RX_TP/IFFOUT_TP/QT IO/IFFIO_TX_TP/IFFOUT_TP/QT 9 IO/IFFIO_RX_TN/IFFOUT_TN/QT 0 IO/RZQ_/IFFIO_TX_TN/IFFOUT_TN FPG_LK IO_P 08 IO_P 0n, 6V 09 SM-.0000MHZ IO_P Q0 INH OUT FPG_LK I0NK_8 IO8 9 IO8 6 VRF8N0 7 IO/LK9P/IFFIO_RX_TP/IFFOUT_TP G6 IO/IFFIO_TX_T6P/IFFOUT_T6P/QT 7 IO/LK9N/IFFIO_RX_TN/IFFOUT_TN F6 IO/IFFIO_TX_T6N/IFFOUT_T6N/QT 6 IO/IFFIO_RX_T7P/IFFOUT_T7P/QT 7 IO/FPLL_TL_LKOUT0,FPLL_TL_LKOUTP,FPLL_TL_F/IFFIO_TX_T8P/IFFOUT_T8P/QT IO/IFFIO_RX_T7N/IFFOUT_T7N/QT 8 IO/FPLL_TL_LKOUT,FPLL_TL_LKOUTN/IFFIO_TX_T8N/IFFOUT_T8N/QT IO/IFFIO_RX_T9P/IFFOUT_T9P/QST 8 IO/IFFIO_TX_T0P/IFFOUT_T0P IO/IFFIO_RX_T9N/IFFOUT_T9N/QSNT F7 IO/IFFIO_TX_T0N/IFFOUT_T0N/QT IO/IFFIO_RX_TP/IFFOUT_TP/QT IO/IFFIO_TX_TP/IFFOUT_TP/QT IO/IFFIO_RX_TN/IFFOUT_TN/QT IO/IFFIO_TX_TN/IFFOUT_TN G_7/6. G_0/6. G_/ FPG + LK 6 7 8
7 6 7 8 IO_P I0NK_ IO F8 IO G6 VRFN0 7 IO/LK6P/IFFIO_RX_R9P/IFFOUT_R9P F IO/IFFIO_TX_R0P/IFFOUT_R0P/QR H7 L0 IO/LK6N/IFFIO_RX_R9N/IFFOUT_R9N G IO/IFFIO_TX_R0N/IFFOUT_R0N/QR G7 L IO/IFFIO_RX_RP/IFFOUT_RP/QR G IO/FPLL_R_LKOUT0,FPLL_R_LKOUTP,FPLL_R_F/IFFIO_TX_RP/IFFOUT_RP/QR J8 IO/IFFIO_RX_RN/IFFOUT_RN/QR H6 IO/FPLL_R_LKOUT,FPLL_R_LKOUTN/IFFIO_TX_RN/IFFOUT_RN/QR H8 IO/IFFIO_RX_RP/IFFOUT_RP/QSR 6 IO/IFFIO_TX_RP/IFFOUT_RP 8 IO/IFFIO_RX_RN/IFFOUT_RN/QSNR F6 IO/IFFIO_TX_RN/IFFOUT_RN/QR 8 IO/IFFIO_RX_RP/IFFOUT_RP/QR G8 L IO/IFFIO_TX_R6P/IFFOUT_R6P/QR 8 IO/IFFIO_RX_RN/IFFOUT_RN/QR F7 L IO/IFFIO_TX_R6N/IFFOUT_R6N 7 oard Version [0..]=[8, 8, 8, 7] ''=IO_P, '0'= 0 IO_P 0 0 L L L L0 R0 L0 0R L-060, green R0 L0 0R L-060, red R0 L0 0R L-060, green R0 L0 0R L-060, red FPG oard Version 6 7 8
8 6 7 8 X60 ST_LVS_RX SPU_P/. ST_LVS_RX SPU_N/. ST_LVS_TX MU_P/. ST_LVS_TX MU_N/. 6 7 S S S S S S6 S7 S80MUTG 60 * F L _S G_0/. G_/. G_/. G_6/. G_8/. G_0/. G_/. G_/. X G_/. G_/. G_/. G_7/. G_9/. G_/. G_/. G_/. PINH-X9 G_0/. G_/. 60-0SOL-7 G_/. G_/. 60-0SOL-7 G_/. G_/. 60-0SOL-7 G_7/. G_6/. 60-0SOL-7 G_8/. G_9/ SOL-7 G_0/. G_/. 607 G_/. G_/. -0SOL SOL-7 G_/. G_/ SOL-7 ST + ebug 6 7 8
9 6 7 8 I0 V8 V V U T T R0 P7 P P7 N N9 N M M6 M L8 L L9 L7 K K0 K8 K J7 J J9 J7 H H H0 H8 H6 G G9 G7 G F F8 F I0_FPLL _FPLL _FPLL H _FPLL N _FPLL F _FPLL N _FPLL F I0 M L L0 L8 K K9 K7 J J0 J8 H H9 H7 G G0 G8 I0UX _UX _UX 6 _UX 0 _UX _UX R _UX T0 _UX R6 I0P P K P J P R7 P R P R8 P K P H P78 8 P78 _FPG u, 6V 706 IO_P F70 7 +V u, 6V u, 6V 7 F u, 6V +V R70 0R 70 +V 7 7 7u, 6V 7 7 7u, 6V I0T T T_V I0RRF RRF_TL RF_TL u, 6V u, 6V R k0, % 79 7 F V I0PGM PGM PGM T6 PGM M PGM I0NU NU NU NU NU 8 FPG Power 6 7 8
10 6 7 8 M-HOL80 MOUNT-HOL0 M-HOL80 MOUNT-HOL0 P 80 P 80 8 R80 6 P NL N/PSV 0k I80 P SMLTRT u, 6V P 0u, 6V P VV 80 7 ST LXST u, 6V PGOO F P P P P P P R80 R80 0R P VOUT VLO R80 LX LX LX LX ILIM LXS TON PGOO_+V 6 P 0 7 R80 k +V TP_+V NR00T0M R807 k R806 96k L u, V, SR < 0m 807 u, 6V P 8 8 PGOO_+V R80 L80 0R L-060, red I80 IN OUT FULT ILIM N PW6-7 PGOO_+V 809 u, 6V 8 6 IO_P_SL/. R8 8k I80 VOUT ON/OFF N LP98-xxx-.0 _ +V +V PINH-X +V R8 R808 0R, NP TP_+V0 R809 0R 80 u, 6V 0R, NP JP80 R8 0R, NP PGM 0 m F IO_P PGOO_+V F u, 6V N * I80 VOUT NR/F TPS77Q 8 +V TP_+V 0n, 6V 8 u, 6V 800 m (00 m transient Vcc_aux) P P KR80 KR80KR80 Power Supplies 6 7 8
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