Kirin (FX2 with NS) VER : 1A

Kirin (FX with NS) VR : RII-SOIMM PG, RII-SOIMM PG, MHz R II M S Turion Rev.F ual-ore/ Sempron Rev.F Single-ore ual-ore W / Single-ore W ( Sg socket) PG,,, PU VR PG LOKS PG Thermal Monitor SYSTM VP R II TT HRGR /TT onn. RUN POWR SW PG PG PG PG PG PG Panel onnector PG VG onn. PG ST - H PG Fixed PT O PG UIO PG udio Jacks PG M PG Tip Ring PG LVS VG ST II I /zalia HT_LINK RS FG PG,,, _LINK S G PG,,, LP K NS/ PG X-us MHz PI PI-() US.(P) PI-() US.(P) US.(P,P) US.(P,P) xpress ard PG Mini ard (WLN) PG US onn. Right Side x PG US onn. ack side x PG M () RJ/Magnetics PG PG in ard R in onn. PG, PG Mini PI(for debug) PG M S Socket Fan onn FX M K/ onn. O onn. VG onn. ash onn. TI RSM R-TT onn. TP onn. US- US- L onn. R II LN with Modem trancformet LI SW onn xpress onn. TI S P ST onn. M Mini ard Latch Mini ard onn. Power Jack R in onn. US-, Phone Jack/MI K Touch Flash SPK onn. onn. Pad ROM attery onn. PG PG PG QUNT OMPUTR LOK IGRM Size ocument Number Rev FX Friday, May, ate: Sheet of

Page INX escription LOK IGRM FRONT PG THLON HT I/F THLON RII MMORY THLON TRL & UG THLON PWR & GN RII SOIMMX RII TRMINTION RS-HT LINK I/F RS-PI LINK I/F RS-LVS RS-POWR LOK GNRTOR SM-PI/PI/LP SM PI/US/ SM H/POWR SM STRPS L ONN RT /PI R RR R RR ONN ST H & PT O MINI ard MINI ard M ONN P & FLSH US MI & Screw hole SWITH & TP & L zelia O UIO ONN LN(M) LN JK K & THRML & FN HRGR (MX) VHOR (MX) SYSTM (MX) VP & R (MX) RUN POWR SW IN,att MINI PI(for debug) Power On Sequence Power On iagram SMUS LOK FRONT PG QUNT OMPUTR Size ocument Number Rev FX ate: Thursday, May, Sheet of

PROSSOR HYPRTRNSPORT INTRF VLT_x N VLT_x R ONNT TO TH LT_RUN POWR SUPPLY THROUGH TH PKG OR ON TH I. IT IS ONLY ONNT ON TH OR TO OUPLING NR TH PU PKG VLT_RUN U VLT_ VLT_ VLT_ VLT_ VLT_ VLT_ VLT_ VLT_.U_.V_ () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N () HT_IN_P () HT_IN_N N P M M L M K K H H G H F F F N N L M L L J K G H G G F L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_IN_H L_IN_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L L_OUT_H L_OUT_L T T V U V V Y W T R U U V U W W HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () HT_OUT_P () HT_OUT_N () +.V_VP VLT_RUN L FJHS_ L FJHS_ ohm().u_.v_.u_.v_.u_.v.u_.v changed from p to p as M suggestion P_V P_V LYOUT: Place bypass cap on topside of board NR HT POWR PINS THT R NOT ONNT IRTLY TO OWNSTRM HT VI, UT ONNT INTRNLLY TO OTHR HT POWR PINS PL LOS TO VLT POWR PINS VLT_RUN () HT_LKIN_P () HT_LKIN_N () HT_LKIN_P () HT_LKIN_N J K J J L_LKIN_H L_LKIN_L L_LKIN_H L_LKIN_L L_LKOUT_H L_LKOUT_L L_LKOUT_H L_LKOUT_L Y Y Y W HT_LKOUT_P () HT_LKOUT_N () HT_LKOUT_P () HT_LKOUT_N () R./F HT_TLIN_P P HT_PU_TLOUT_P HT_TLIN_N L_TLIN_H L_TLOUT_H T T P HT_PU_TLOUT_N R./F L_TLIN_L L_TLOUT_L R T () HT_TLIN_P N L_TLIN_H L_TLOUT_H R HT_TLOUT_P () () HT_TLIN_N P L_TLIN_L L_TLOUT_L R HT_TLOUT_N () thlon S Processor Socket QUNT OMPUTR THLON HT I/F Size ocument Number Rev FX ate: Friday, May, Sheet of

V_VTT_SUS_PU IS ONNT TO TH V_VTT_SUS POWR SUPPLY THROUGH TH PKG OR ON TH I. IT IS ONLY ONNT ON TH OR TO OUPLING NR TH PU PKG +.V_SUS Processor R Memory Interface R K/F U M Q M Q () M Q[..] PU_M_VRF M Q M_T M_T M Q[..] () F M Q M Q M_T M_T F M Q M Q M_T M_T M Q M Q M_T M_T for +.V_R_VTT Y M Q R M Q M_T M_T W M Q feedback.u_v p_v K/F M Q M_T M_T Y M Q M Q M_T M_T F M Q VTT_SNS M Q M_T M_T M Q () VTT_SNS F M Q M_T M_T F M Q M Q M_T M_T M Q M Q M_T M_T F M Q +.V_SUS P_V M Q M_T M_T Y M Q +.V_R_VTT M Q M_T Y U M_T M Q M Q M_T M_T W M Q M Q M_T M_T W W M Q R MMVRF VTT M Q M_T M_T M Q./F VTT M Q M_T M_T Y Y M Q R VTT_SNS VTT M Q M_T M_T M Q VTT F M Q M_T M_T M Q M_ZN VTT W F M Q M_T M_T M Q M_ZP MMZN VTT F M Q M_T M_T F M Q MMZP VTT M Q M_T M_T M Q VTT M Q M_T M_T M Q M Q M_T Y R VTT M_T M Q M Q M_T./F M_T M Q (,) M S# V M_S_L M_LK_H Y M_LKOUT () M Q M_T M_T Y M Q (,) M S# J M_S_L M_LK_L M_LKOUT# () M Q M_T M_T W M Q (,) M S# V M_S_L M_LK_H M_LKOUT () M Q M_T M_T W M Q (,) M S# T M_S_L M_LK_L F M_LKOUT# () M Q M_T M_T M Q M Q M_T M_T M Q (,) M S# Y M_S_L M_LK_H F M_LKOUT () M Q M_T M_T M Q (,) M S# J M_S_L M_LK_L F M_LKOUT# () M Q M_T M_T Y M Q (,) M S# W M_S_L M_LK_H M_LKOUT () G M Q M_T M_T H M Q (,) M S# U M_S_L M_LK_L M_LKOUT# () G M Q M_T M_T H M Q PL THM LOS TO M Q M_T M_T M Q (,) M_K H M_K M_OT W M_OT (,) M Q M_T M_T M Q PU WITHIN " (,) M_K J M_K M_OT W M_OT (,) G M Q M_T M_T J M Q (,) M_K J M_K M_OT V M_OT (,) G M Q M_T M_T H M Q (,) M_K J M_K M_OT U M_OT (,) M Q M_T M_T F M Q (,) M [..] M M M Q M_T M_T F K M Q M [..] (,) M M_ M_ J M M Q M_T M_T K M Q M M_ M_ J M M Q M_T M_T V M Q M M_ M_ W M M Q M_T M_T F K M Q M M_ M_ L M M Q M_T M_T L M Q M M_ M_ L M M Q M_T M_T R M Q M M_ M_ U M M Q M_T M_T L M Q M M_ M_ L M M Q M_T M_T L M Q M M_ M_ M M M Q M_T M_T G L M Q M M_ M_ L M M Q M_T M_T G M M Q M M_ M_ N M M Q M_T M_T M M Q M M_ M_ N M M Q M_T M_T F M M Q M M_ M_ N M M Q M_T M_T M M Q M M_ M_ N M M Q M_T M_T H N M Q M M_ M_ P M M Q M_T M_T N M Q M M_ M_ P M M Q M_T M_T R M Q M_ M_ T M Q M_T M_T H M Q M Q M_T M_T M Q (,) M S# K M_NK M_NK K M S# (,) M Q M_T M_T M Q (,) M S# R M_NK M_NK T M S# (,) M Q M_T M_T H M Q (,) M S# T M_NK M_NK U M S# (,) G M Q M_T M_T H M Q M Q M_T M_T G M Q (,) M RS# T M_RS_L M_RS_L U M RS# (,) M Q M_T M_T H M Q (,) M S# U M_S_L M_S_L V M S# (,) M Q M_T M_T F M Q (,) M W# U M_W_L M_W_L U M W# (,) M_T M_T G M M M M M M M_M M_M Y R II: M/TRL/LK M M M M M_M M_M M M thlon S M M M_M M_M Y M M M M M_M M_M M M Processor Socket M M M_M M_M F M M M M M_M M_M M M M M M_M M_M M M () M M[..] M_M M_M M M[..] () M QS M QS M QS M QS R: T M QS +.V_R_VTT M QS thlon S M QS M QS M QS Processor Socket M QS M QS M QS M QS M QS M QS () M QS[..] M QS () M QS[..].U_.V_.U_.V_.U_.V_.U_.V_.U_.V.U_.V.U_.V.U_.V M QS# M QS# M QS# M QS# M QS# M QS# M QS# M QS# M QS# M QS# M QS# +.V_R_VTT M QS# M QS# M QS# M QS# () M QS#[..] M QS# () M QS#[..] p_v p_v p_v p_v P_V P_V P_V P_V To SOIMM socket (Far) M QS M QS# M QS M QS# M QS M QS# M QS M QS# M QS M QS# M QS M QS# M QS M QS# M QS M QS# F F F F M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L M_QS_H M_QS_L W W Y W G G G G G H M QS M QS# M QS M QS# M QS M QS# M QS M QS# M QS M QS# M QS M QS# M QS M QS# M QS M QS# To SOIMM socket (near) QUNT OMPUTR THLON RII MMORY Size ocument Number Rev FX Friday, May, ate: Sheet of

() () PU_V_RUN PU_V_RUN.U_.V_ PULK PULK# LYOUT: ROUT V TR PPROX. mils WI (US x mil TRS TO XIT LL FIL) N mils LONG..U_.V +.V_RUN LMPGSN_ L p_v U_.V_ p_v R /F_ p_v PU_LKIN_S_P PU_LKIN_S_N () () If M SI is not used, the SI pin can be left unconnected and SI should have a -Ω (±%) pulldown to VSS. +.V_SUS PU_SI PU_SI R R R R R for PU rev.f, if for rev.g, populate R,R,R,R and depopulate R *_N *_N *_N *_N PU_SI_R PU_SI_R place them to PU within " To Power () () ORF+V ORF- THLON ontrol and ebug VLT_RUN for +.V_SUS feedback () VIO_F_H R R./F./F T T T VIO_F_H P_V PU_V_RUN PU_HT_RST# PU_LL_PWROK PU_LTSTOP# T T R PU_LKIN_S_P PU_LKIN_S_N PU_SI_R PU_SI_R F F F F F PU_HTRF P PU_HTRFR F W Y U V V RST_L PWROK LTSTOP_L SI SI HT_RF HT_RF V_F_H V_F_L VIO_F_H VIO_F_L LKIN_H LKIN_L THRMTRIP_L PROHOT_L VI VI VI VI VI VI PU_PRSNT_L PSI_L F H_THRMTRIP# H_PROHOT# PU_PRSNT# +.V_SUS R T +.V_SUS PSI# () H_THRMTRIP# () VI () VI () VI () VI () VI () VI () PSI_L is a Power Status Indicator signal. This signal is asserted when the processor is in a low powerstate. PSI_L should be connected to the power supply controller, if the controller supports skipmode, or diode emulation mode. PSI_L is asserted by the processor during the and S states. R R close U within mil, & close U within mil PU_RY PU_TMS PU_TK PU_TRST# PU_TI G F RY TMS TK TRST_L TI RQ_L TO PU_RQ# PU_TO (,) PU_PWRG (,) LT_STOP# R R K R PU_LL_PWROK PU_LTSTOP# change for S from S () PU_TST_THRM () PU_TST_THRM add port to Page U Thermal I T T T T T T PU_TST_H_YPSSLK_H PU_TST_L_YPSSLK_L PU_TST_PLLTST PU_TST_PLLTST PU_TST_P PU_TST_P PU_TST_NLOG_T PU_TST_IRKMON PU_TST_THRM PU_TST_THRM PU_TST_GT PU_TST_RIN G H F W W Y TST_H TST_L TST TST TST TST TST TST TST TST TST TST TST TST TST TST TST TST_H TST_L TST TST TST TST TST TST_H TST_L TST TST TST TST F J H F K PU_TST_H_FLKOUT_P R./F PU_TST_L_FLKOUT_N ROUT S Ohm IFFRNTIL PIR PL IT LOS TO PU WITHIN " PU_TST_TSTUP PU_TST_SNN PU_TST_H_PLLHRZ_P PU_TST_L_PLLHRZ_N PU_TST_URNIN# PU_TST_NLOGOUT PU_TST_IG_T T T T T T R K T T T T PU_RSV_M_LK_P PU_RSV_M_LK_N PU_RSV_M_LK_P PU_RSV_M_LK_N P P N N RSV RSV RSV RSV RSV RSV RSV RSV H PU_M_RST# PU_M_RST# PU_RSV_VISTR PU_RSV_VISTR T T T T () LT_RST# R R K PU_HT_RST# R can be used for MI verifing, place close to PU T T T T PU_RSV_M_LK_P PU_RSV_M_LK_N PU_RSV_M_LK_P PU_RSV_M_LK_N R R P R RSV RSV RSV RSV MIS RSV RSV RSV RSV RSV RSV RSV RSV RSV H G R W R H H PU_RSV_VN_F_P PU_RSV_VN_F_N PU_RSV_OR_TYP T T T M NPT S SOKT Processor Socket change TST ////// to be N pin without pull up or pull down +.V_SUS R H_PROHOT# +.V_RUN R *K_N : depopulate R & Q, because M rrata "PROHOT_L should not be used as an output from the processor" delete H_THRMTRIP# circuit JHT Q PU_TST_URNIN# R +.V_SUS +.V_SUS *MMT_N PU_PRSNT# R K/F GN GN PU_TST_H_YPSSLK_H R /F Resreved GN PU_RQ# Resreved GN PU PROHOT# () PU_TST_SNN R PU_RY RQ_L GN PU_TST_L_YPSSLK_L R /F PU_TK RY GN R R PU_TST_PLLTST R PU_TMS TK GN PU_TST_PLLTST PU_TI TMS GN *K_N R *K_N PU_TRST# TI GN PU_PROHOT# () If no use which Net PU_TO TRST_L GN Q TO GN *MMT_N need pull-up or down *MMT_N VIO GN +.V_SUS PU_RST# PU_HT_RST# VIO RST_L Q GN +.V_SUS add HT connector for debug convenience HT ONNTOR *HT conn_n S this pin is.v,need it level-shift. delete thermal sensor QUNT OMPUTR THLON TRL & UG Size ocument Number Rev FX Friday, May, ate: Sheet of

+V_OR G H J J J K K K K L L L L L M M M M N N N P P R R R R T T T T T T U U U U V V V U V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V POWR V V V V V W V Y V J V K V L V M V P V T V U V V VIO H VIO J VIO K VIO K VIO K VIO K VIO L VIO M VIO M VIO M VIO M VIO N VIO P VIO P VIO P VIO P VIO R VIO T VIO T VIO T VIO T VIO U VIO V VIO V VIO V VIO V VIO Y thlon S Processor Socket +V_OR +.V_SUS UF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS F VSS F VSS F VSS F VSS F VSS F VSS F VSS F VSS F VSS H VSS H VSS H VSS H VSS J VSS GROUN VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J J J J J J J K K K K K K K L L L L L L L M M M M N N N N N P P P P P R R R R T T T T T T U U U U U U U U V V V V V V V W Y Y N +V_OR +V_OR +.V_SUS +.V_SUS +.V_SUS U_V_ U_V_ U_V_ OTTOMSI OUPLING U_V_ U_V_.U_.V.U_.V.U_.V P_V U_V_ OUPLING TWN PROSSOR N IMMs PL LOS TO PROSSOR S POSSIL.U_.V_ U_V_ U_V_.U_.V_ U_V_.U_.V.U_.V_.U_.V_ U_V_.U_V.U_.V U_V_.U_.V add more two p ap as M suggestion.u_.v.u_.v thlon S Processor Socket.U_V.U_V P_V P_V P_V P_V P_V F thlon Sg upg Top View PROSSOR POWR N GROUN QUNT OMPUTR THLON PWR & GN Size ocument Number Rev FX ate: Thursday, May, Sheet of

M_LKOUT# M M M M Q M QS# M QS M M M M QS# M QS M M M M M M M Q M QS# M M Q M M M M M M Q M QS# M M M Q M_LKOUT M QS# M M M QS M QS M M QS M Q M Q M_LKOUT# M QS# M M M M Q M_LKOUT M M QS M MVRF_IM MVRF_IM M Q M Q M Q M Q M QS# M M M QS M Q M Q M Q M Q M Q M Q M Q M Q M Q M QS# M M M QS M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q SMT M M M Q M M M M M SMK M M_LKOUT M QS M M M_LKOUT# M_LKOUT M M Q M M_LKOUT# M M M QS# M Q M QS# M Q MVRF_IM M Q M Q M Q M Q M Q M Q M Q M Q M QS M QS M QS M Q M Q M Q M M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M M M Q M QS# M Q M Q M Q M Q M Q M M Q M Q M Q M Q M Q M M M M M M M Q M QS# M Q M QS# M QS# M QS# M QS# M M M M M M M QS M QS M QS M QS M M M Q M Q M Q M Q M_LKOUT# M_LKOUT M_LKOUT M_LKOUT# M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q SMT () SMK () +.V_RF +.V_RUN +.V_SUS +.V_SUS +.V_SUS +.V_SUS +.V_RUN +.V_RUN +.V_SUS +.V_SUS M [..] (,) M_K (,) M_K (,) M RS# (,) M S# (,) M W# (,) M S# (,) M S# (,) M_OT (,) M Q[..] () M_LKOUT () M_LKOUT# () M_LKOUT () M_LKOUT# () M_OT (,) M S# (,) M S# (,) M S# (,) M QS#[..] () M QS[..] () M M[..] () M S# (,) M S# (,) M_LKOUT () M_LKOUT# () M_LKOUT () M_LKOUT# () M_OT (,) M_K (,) M_K (,) M_OT (,) M [..] (,) M S# (,) M S# (,) M S# (,) M QS#[..] () M QS[..] () M M[..] () M RS# (,) M S# (,) M W# (,) M Q[..] () M S# (,) M S# (,) M S# (,) M S# (,) Size ocument Number Rev ate: Sheet of QUNT OMPUTR FX RII SOIMMX Friday, May, Size ocument Number Rev ate: Sheet of QUNT OMPUTR FX RII SOIMMX Friday, May, Size ocument Number Rev ate: Sheet of QUNT OMPUTR FX RII SOIMMX Friday, May,.hange R socket(p/n, escription, footprint, part reference, value).swap R trace as "fx_swap- & "e.a_swap-".u_v.u_v U_V_ U_V_.P_V.P_V.U_V.U_V.U_V.U_V.U_V.U_V P R SRM SO-IMM (P) JIM FOXONN_S-NRN-F P R SRM SO-IMM (P) JIM FOXONN_S-NRN-F Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q N N N N N/TST M M M M M M M M QS QS QS QS QS QS QS QS K K K K K K VRF RS S W S S S S S SL Vspd V V V V V V V V V V V V VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS QS QS QS QS QS QS QS QS OT OT VSS VSS VSS VSS VSS VSS VSS VSS VSS.U_V.U_V U_V U_V.U_V.U_V R K/F R K/F.U_V.U_V R R R K/F R K/F.U_V_.U_V_.U_V.U_V R *_N R *_N.U_V.U_V.U_V.U_V.U_V.U_V P R SRM SO-IMM (P) JIM FOXONN_S-NSN-F P R SRM SO-IMM (P) JIM FOXONN_S-NSN-F Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q N N N N N/TST M M M M M M M M QS QS QS QS QS QS QS QS K K K K K K VRF RS S W S S S S S SL Vspd V V V V V V V V V V V V VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS QS QS QS QS QS QS QS QS OT OT VSS VSS VSS VSS VSS VSS VSS VSS VSS R K R K *U_.V N *U_.V N *U_.V N *U_.V N.U_V.U_V.U_V.U_V.P_V.P_V.P_V.P_V.U_V.U_V.U_V.U_V.P_V.P_V.U_V.U_V.U_V.U_V U_V_ U_V_.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V_.U_V_.U_V.U_V

+.V_R_VTT (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) (,) M_K M_K M_K M_K M_OT M_OT M_OT M_OT M S# M S# M S# M W# M S# M RS# M S# M S# M S# M W# M S# M RS# M S# M S# M S# M S# M S# M S# M S# M S# M S# M S# M S# M W# M S# M RS# M S# M S# M S# M W# M S# M RS# R R R R R R R R R R R R R R R R R R R R R R R R R R R R RTT termination changed from ohm to ohm as M suggestion (,) M [..] M R +.V_R_VTT M R M RP PR- *U_.V N M M RP PR- *U_.V N M M RP PR-.U_V M.U_V M RP PR-.U_V.U_V M M RP PR-.U_V M.U_V M RP PR-.U_V M.U_V.U_V M M RP PR- *.U_V_N *.U_V_N.U_V.U_V (,) M [..].U_V M RP PR-.U_V.U_V *.U_V_N.U_V M M M M RP RP PR- PR-.U_V M.U_V *.U_V_N M M RP PR-.U_V M RP PR-.U_V.U_V *.U_V_N M M M RP PR-.U_V M R M R M M RP PR- QUNT OMPUTR RII TRMINTION Size ocument Number Rev FX ate: Friday, May, Sheet of

U VHT_PKG () HT_OUT_P R HT_RXP () HT_OUT_N R HT_RXN () HT_OUT_P R HT_RXP () HT_OUT_N R HT_RXN () HT_OUT_P U HT_RXP () HT_OUT_N U HT_RXN () HT_OUT_P U HT_RXP () HT_OUT_N U HT_RXN () HT_OUT_P W HT_RXP () HT_OUT_N W HT_RXN () HT_OUT_P HT_RXP () HT_OUT_N HT_RXN () HT_OUT_P HT_RXP () HT_OUT_N HT_RXN () HT_OUT_P HT_RXP () HT_OUT_N Y HT_RXN () HT_OUT_P T HT_RXP () HT_OUT_N R HT_RXN () HT_OUT_P U HT_RXP () HT_OUT_N U HT_RXN () HT_OUT_P V HT_RXP () HT_OUT_N U HT_RXN () HT_OUT_P V HT_RXP () HT_OUT_N V HT_RXN () HT_OUT_P HT_RXP () HT_OUT_N HT_RXN () HT_OUT_P HT_RXP () HT_OUT_N HT_RXN () HT_OUT_P HT_RXP () HT_OUT_N HT_RXN () HT_OUT_P HT_RXP () HT_OUT_N HT_RXN () HT_LKOUT_P W HT_RXLKP () HT_LKOUT_N W HT_RXLKN () HT_LKOUT_P Y HT_RXLKP () HT_LKOUT_N W HT_RXLKN () HT_TLOUT_P P HT_RXTLP () HT_TLOUT_N P HT_RXTLN PRT OF HYPR TRNSPORT PU I/F HT_TXP P HT_IN_P () HT_TXN P HT_IN_N () HT_TXP P HT_IN_P () HT_TXN P HT_IN_N () HT_TXP M HT_IN_P () HT_TXN M HT_IN_N () HT_TXP M HT_IN_P () HT_TXN M HT_IN_N () HT_TXP L HT_IN_P () HT_TXN L HT_IN_N () HT_TXP G HT_IN_P () HT_TXN G HT_IN_N () HT_TXP J HT_IN_P () HT_TXN J HT_IN_N () HT_TXP F HT_IN_P () HT_TXN F HT_IN_N () HT_TXP N HT_IN_P () HT_TXN N HT_IN_N () HT_TXP L HT_IN_P () HT_TXN M HT_IN_N () HT_TXP K HT_IN_P () HT_TXN K HT_IN_N () HT_TXP J HT_IN_P () HT_TXN K HT_IN_N () HT_TXP G HT_IN_P () HT_TXN H HT_IN_N () HT_TXP F HT_IN_P () HT_TXN F HT_IN_N () HT_TXP HT_IN_P () HT_TXN F HT_IN_N () HT_TXP HT_IN_P () HT_TXN HT_IN_N () HT_TXLKP L HT_LKIN_P () HT_TXLKN L HT_LKIN_N () HT_TXLKP J HT_LKIN_P () HT_TXLKN J HT_LKIN_N () HT_TXTLP N HT_TLIN_P () HT_TXTLN P HT_TLIN_N () R./F HT_RXLP HT_TXLP R /F HT_RXLN HT_RXLP HT_TXLP HT_TXLN R./F HT_RXLN HT_TXLN RSM HT QUNT OMPUTR RS-HT LINK I/F Size ocument Number Rev FX ate: Friday, May, Sheet of

+_IN +_IN +.V_LN +PWR_SR +PWR_SR +V_SUS +PWR_SR +.V_RUN +.V_RUN *.U_V_N *.U_V_N *.U_V_N *.U_V_N *.U_V_N *.U_V_N *.U_V_N *.U_V_N *.U_V_N +PWR_SR VLT_RUN +.V_LN +PWR_SR VLT_RUN +PWR_SR +.V_VP +.V_VP +V_OR +V_OR +V_OR +.V_SUS +.V_R_VTT +.V_SUS *.U_V_N *.U_V_N *.U_V_N +.V_R_VTT *.U_V_N +.V_SUS +.V_R_VTT +.V_SUS *.U_V_N *.U_V_N +.V_R_VTT *.U_V_N +.V_SUS +.V_R_VTT +.V_SUS +.V_R_VTT +.V_RUN +.V_RUN +.V_RUN +.V_RUN +.V_SUS +.V_SUS +V_RUN +V_RUN +.V_SUS *.U_V_N *.U_V_N *.U_V_N +.V_SUS +PWR_SR +.V_R_VTT +.V_SUS *.U_V_N *.U_V_N +.V_R_VTT *.U_V_N +.V_SUS +.V_R_VTT +.V_SUS +.V_R_VTT reserve more ap. between +.V_R_VTT & +.V_SUS *.U_V_N *.U_V_N *.U_V_N GN +.V_SUS +.V_R_VTT +.V_SUS *.U_V_N *.U_V_N +.V_R_VTT *.U_V_N +.V_RUN +.V_R_VTT +.V_SUS +.V_R_VTT +.V_SUS *.U_V_N *.U_V_N *.U_V_N +.V_R_VTT +.V_VP delete PI signal, original LN & Mini ard of U G GFX_RXP G GFX_RXN J GFX_RXP J GFX_RXN J GFX_RXP J GFX_RXN L GFX_RXP L GFX_RXN L GFX_RXP L GFX_RXN M GFX_RXP M GFX_RXN M GFX_RXP M GFX_RXN P GFX_RXP P GFX_RXN P GFX_RXP P GFX_RXN R GFX_RXP R GFX_RXN R GFX_RXP R GFX_RXN U GFX_RXP U GFX_RXN W GFX_RXP W GFX_RXN Y GFX_RXP Y GFX_RXN V GFX_RXP W GFX_RXN GFX_RXP GFX_RXN W GPP_RXP W GPP_RXN PRT OF PI I/F GFX GFX_TXP J GFX_TXN H GFX_TXP K GFX_TXN K GFX_TXP K GFX_TXN L GFX_TXP L GFX_TXN L GFX_TXP N GFX_TXN N GFX_TXP P GFX_TXN P GFX_TXP P GFX_TXN R GFX_TXP R GFX_TXN R GFX_TXP T GFX_TXN U GFX_TXP V GFX_TXN V GFX_TXP V GFX_TXN W GFX_TXP W GFX_TXN W GFX_TXP Y GFX_TXN GFX_TXP GFX_TXN GFX_TXP GFX_TXN GFX_TXP GFX_TXN GPP_TXP GPP_TXN Place these caps close to connector GPP_TXP_ () PI_RXP GPP_TXP.U_V GPP_RXP PI_TXP () GPP_TXN_ () PI_RXN GPP_TXN PI_TXN () PI I/F GPP.U_V GPP_RXN GPP_TXP_ () MINI_PI_RXP Y GPP_RXP GPP_TXP.U_V MINI_PI_TXP () GPP_TXN_ () MINI_PI_RXN GPP_RXN GPP_TXN.U_V MINI_PI_TXN () GPP_RXP GPP_RXN GPP_TXP GPP_TXN _TXP_ () _RXP W S_TXP _TXP () _TXN_ () _RXN PI I/F S.U_V S_RXP W S_TXN.U_V S_RXN _TXN () _TXP_ () _RXP S_TXP.U_V S_RXP _TXP () _TXN_ () _RXN S_RXN S_TXN.U_V _TXN () R K V_PKG P_IST(P_LI) P_PL(P_LRP) R /F R.K/F_ R /F P_TXIST(N) P_NL(P_LRN) R: R: KOhm FOR RS.KOhm FOR RS.KOhm FOR RS NI FOR RS RSM HT R: Ohm FOR RS Ohm FOR RS R: Ward update to Ohm FOR RS KOhm FOR RS QUNT OMPUTR RS-PI LINK I/F Size ocument Number Rev FX ate: Friday, May, Sheet of

+.V_RUN L HTPV +.V_RUN L VQ +.V_RUN L V_N +.V_RUN R _ V KHS U_V.U_.V KHS U_V.U_V KHS.U_.V.U_V.U_V +.V_RUN L PLLV T LK (,) LT_STOP# KHS added as FM application for +.V_RUN RP PR-.K +.V_RUN U_V +.V_RUN Q NW--F Q NW--F +.V_RUN +.V_RUN R K Q MMT.U_.V R K T_ () LK_ () LT_STOP#_N () () () VG_R VG_GRN VG_LU LO_ROM#: LO ROM STRP NL High, LO ROM STRP ISL Low, LO ROM STRP NL close to N R /F R /F (,,,,) LINK_RST# () N_PWRG () NSR_LKP () NSR_LKN () SLINK_LKP () SLINK_LKN () R /F () N_OS VQ () LLOW_LTSTOP R () HTRFLK R R *K_N LO_ROM# R by default R R R R MRQ# () PHL_LK () PHL_T () S_N_THRM () S_N_THRM : reserve for N thermal iode T T RS deleted caused by Svideo defeature external trace become to internal trace RS R.U_V +.V_RUN R.K/F V PLLV HTPV V_N () VSYN () HSYN R /F LK R T R R R T N_RST# LT_STOP#_N K *.K_N *.K_N *.K_N *.K_N R R R T T T *_N *_N STRP_T K/F U V V G VSSN H VSSN VI VSSI VQ VSSQ _R Y_G OMP_ R F GRN G LU VSYN HSYN RST SL S HTPV HTPVSS RT/TVOUT PLLV(PLLV) PLLVSS SYSRST# POWRGOO LTSTOP# LLOW_LTSTOP HTTSTLK HTRFLK F GFX_LKP GFX_LKN G S_LKP G S_LKN FT_GPIO FT_GPIO FT_GPIO FT_GPIO FT_GPIO FT_GPIO FT_GPIO FT_GPIO FT_GPIO FT_GPIO FT_GPIO PM PLL PWR TV_SWITH K TVLKIN PLLV OSIN OSOUT(PLLV) *.K_N MRQb I_LK I_T THRMLIO_P THRMLIO_N TMS_HP _T TSTMO STRP_T PRT OF LOKs MIS. RSM HT VO LVS +.V_RUN TXOUT_LP TXOUT_LN TXOUT_LP TXOUT_LN TXOUT_LP H TXOUT_LN G TXOUT_LP TXOUT_LN TXOUT_UP TXOUT_UN TXOUT_UP TXOUT_UN TXOUT_UP TXOUT_UN TXOUT_UP TXOUT_UN TXLK_LP TXLK_LN TXLK_UP H TXLK_UN G LPV LPVSS LVR_ LVR_ LVR_ LVR_ LVSSR LVSSR LVSSR LVSSR LVSSR LVSSR LVSSR F LVSSR F LVS_IGON LVS_LON G LVS_LN F VO_(GPP_TXP) VO_(GPP_TXN) VO_(N) VO_(GPP_RXP) VO_(GPP_RXN) VO_(N) VO_(N) VO_(GPP_TXN) VO_(GPP_TXP) VO_(GPP_RXN) VO_(GPP_RXP) VO_(N) VO_VSYN(N) VO_(N) VO_HSYN(N) VO_IKP(N) VO_IKN(N) R *_N +.V_RUN L_PON LVS_LON LVS_LN reserve ohm to connect "LVS_LON" to L conn directly R T T T T T T T T T T T T T T T T T T TXLOUT+ () TXLOUT- () TXLOUT+ () TXLOUT- () TXLOUT+ () TXLOUT- () T T is single ch, change to dual ch as FM TXUOUT+ () TXUOUT- () TXUOUT+ () TXUOUT- () TXUOUT+ () TXUOUT- () T T TXLLKOUT+ () TXLLKOUT- () TXULKOUT+ () TXULKOUT- ().U_V.U_.V.U_V HK L TO OHM.U_.V L_POWR_ON () RS: LVR=.V +.V_RUN KHS +.V_RUN L KHS R L_PON R LVS_LON R LVS_LN K/F K/F K/F L KHS.U_V.U_.V OSOUT() VO_() VO_() VO_() VO_() VO_() VO_() VO_() VO_() OSOUT VO_ VO_ VO_ VO_ VO_ VO_ VO_ VO_ PLLV GPP_TXP GPP_TXN GPP_RXP GPP_RXN GPP_TXN GPP_TXP GPP_RXN GPP_RXP : change "FPK_N" from connected with "LVS_LN" directly to connected with "LVS_LON" by a N gate () FPK_N LVS_LON R K U NSZPX_NL N_PWRG U NSZPX_NL R RS-LVS LON () QUNT OMPUTR Size ocument Number Rev FX ate: Friday, May, Sheet of

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS U RSM HT PR OF M V V V F V H G J H J F L M M J P T N P R U T U U Y Y W Y Y Y R G Y Y GROUN SUGGST RMOV L SM S PU. PLN FS UNR THIS PLN VLT_RUN ohm() VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS F G Y P R M J G J L L L L M M M M N N L P P P R R R W Y U H W Y G H R T T R H M F M V +.V_VP ohm() L FJHS +.V_RUN U_V +.V_RUN V +.V_RUN L RS: V=.V +.V_RUN L LMPGSN L +.V_RUN L U_V R RS: Ohm RSISTOR U_V VR TIG.U_.V_ VVO VPLL.U_.V_ U_V SW TIG SW TIG.U_V U_V SW U_V V ohm (m) U_V_ U_V_ U_V U_V U_V U_V U_V.U_V U_V V U_V U_V VHT_PKG V_PKG V_PKG V_PKG U_V_ U_V U_V U V_HT PRT OF V_HT V_HT V_HT V_HT Y V_HT W V_HT V_HT V_HT V_HT V_HT V_HT V_HT V_HT V_HT POWR J V_ J V_ V_(V_) V_(V_) U V_(V_) W V_(V_) V_(V_) V_(V_) V_(V_) V_(V_) VR_ VR_ V_VO(VR_) V_VO(VR_) V_VO(VR_) V_(VPLL_) F V_(VPLL_) F VSS(VSSPLL_) G VSS(VSSPLL_) VHT_PKG M V_PKG V_PKG RSM HT V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ V_ G M F L L L L M R M N N N J H P P R R U U P L J G U U U_V U_.V_ U_V U_V U_V_ U_V_ V_N U_V_ U_V_ U_V U_V U_V U_V U_V U_V U_V +.V_VP JP SHORT P U_.V_ N RS POWR STTS Power Signal S S VHT VR V V V V V ON ON ON ON ON ON ON ON ON ON ON ON ON ON VI ON ON PLLV ON ON HTPV ON ON VR ON ON LPV ON ON LVR ON ON S S/S LVR ON ON G RS-POWR QUNT OMPUTR Size ocument Number Rev FX ate: Thursday, May, Sheet of

+.V_RUN L KHS LK_V LK_V L KHS +.V_RUN ohm/ m U_V_.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V.U_V U_V_ - PL LL SRIL TRMINTION RSISTORS LOS TO U - PUT OUPLING PS LOS TO lock Gen.POWR PIN (,,) PT_SM (,,) PLK_SM Q *N-LF_N +.V_RUN L () LK_RST_IN# +.V_RUN R +.V_RUN R R *K_N Q *N-LF_N +.V_RUN L SMT SMK.. LK_V XT LK FRQUNY SLT TL(MHZ) FS FS FS PU Hi-Z X ohm/ m.. KHS R : add "LK_RST_IN#" connected to GPIO for LK enable as TI suggestion R *K_N SRLK HTT [:]. Hi-Z PI X/ X/... LK_V_RF LK_V_US Parallel Resonance rystal US........... ohm/ m.. KHS U_V R K Hi-Z. U_V.U_V P....U_V P LK_XOUT_R Y.MHZ () () SMK SMT Ioh = * Iref (.m) Voh =.V @ ohm OMMNT Reserved Reserved Reserved Reserved Reserved Reserved R *M_N R LK_V.... Normal THLON operation heck M clock LK_XIN SMK SMT R /F U VPU V_SR V_SR V_SR V_SR V_ V_TIG V_RF VHTT GN_PU GN_SR GN_SR GN_SR GN_SR GN_ GN_TIG GN_RF GNHTT XIN LK_XOUT XOUT RST_IN# N SMLK SMT IRF IS V GN PULKT PULK PULKT PULK SRLKT SRLK TIGLKT TIGLK TIGLKT TIGLK TIGLKT TIGLK TIGLKT TIGLK SRLKT SRLK SRLKT SRLK SRLKT SRLK SRLKT SRLK SRLKT SRLK SRLKT SRLK SRLKT SRLK LKRQ# LKRQ# LKRQ# MHz_ MHz_ FS/RF FS/RF FS/RF HTTLK LK_V LKRQ# ONTROL SR,, LKRQ# ONTROL SR,,, TIG LKRQ# ONTROL SR,,TIG// PULK_XT_R R /F PULK#_XT_R R /F SLINK_LKP_R SLINK_LKN_R NSR_LKP_R NSR_LKN_R SSR_LKP_R SSR_LKN_R become to no used as FM application GPP_LKP_R GPP_LKN_R GPP_LKP_R GPP_LKN_R R.K R.K R R R /F R /F R /F R /F T T R /F R /F R /F R /F R /F R /F LK_V on for PMI, for FM no used LK_M R R /F S_OSIN_R N_OSIN_R HTRFLK_R R /F T NW_LKRQ# () MINI_LKRQ# () USLK () R.K R.K R.K R /F R /F R /F LK_V PULK () PULK# () R./F R./F R./F R.K R./F R./F R.K R.K S_OSIN () N_OS () R./F R R R HTRFLK () R./F R./F R./F *_N *_N *_N R./F R./F SLINK_LKP () SLINK_LKN () NSR_LKP () NSR_LKN () SSRLK () SSRLK# () LK_PI_NW () LK_PI_NW# () LK_PI_MINI_ () LK_PI_MINI_# () QUNT OMPUTR LOK GNRTOR Size ocument Number Rev FX ate: Friday, May, Sheet of

+.V_SUS U.U_V R.K LL LRP LRN LI +.V_VP (,,,,) LINK_RST# PI Power RT.U_V S LIRTION RSISITOR VLU S S OHM % OHM %.K % OHM % ohm.k % +.V_RT_LO +.V_SR RT_N +.V_VP add +.V LO circuit for VRT R K/F U OUT F IN R L TIG U_V_ U_V U_V U_V.U_.V_ T NSZPX_NL GN N MI-. U_V_ R *R_N R L SKT-Y-S R K U_V SUYIN_MGNL RT-TTRY change as FM T *_N.U_V +PWR_SR _PWRG () SSRLK () SSRLK# () () () () () () () () U_V RXP _RXN _RXP _RXN T T T T _TXP _TXN _TXP _TXN T T T T PI_VR PI_VR _RXP RXN RXP RXN_ PI_LRP PI_LRN PI_LI PI_PV Ti Recommend Vendor: NSK Part Number: NXG.KFU PPM. K_X K_X TI recommand have internal pull-up PU_PWR_S K_X R FOR S, ONNT TO PU_PG/LT_PG K FOR S, ONNT TO K_X SSMUXSL/GPIO VRT (,) PU_PWRG R T T T T (,) LT_STOP# () PU_SI JP () PU_SI T.U_V *lear P_N () LLOW_LTSTOP T H_PSLP# R T /F () LT_RST# LT_RST# R.U_V.U_V_ U_V.U_V.U_V.U_V R M R R +.V_RUN R.U_V R P.U_V m.u_v.u_v.u_v.u_v /F_.K/F_ Y.KHZ M P reserve R for MI verifing, place close to S G U _RST# J PI_RLKP J PI_RLKN P PI_TXP P PI_TXN M PI_TXP M PI_TXN K PI_TXP K PI_TXN H PI_TXP H PI_TXN T PI_RXP T PI_RXN T PI_RXP T PI_RXN M PI_RXP M PI_RXN M PI_RXP M PI_RXN PI_LRP PI_LRN U U PI_LI PI_PV F PI_VR_ F PI_VR_ F PI_VR_ G PI_VR_ G PI_VR_ G PI_VR_ G PI_VR_ J PI_VR_ J PI_VR_ L PI_VR_ L PI_VR_ L PI_VR_ N PI_VR_ PI_PVSS X X S XTL PI XPRSS INTRF PU_PG/LT_PG W INTR/LINT W NMI/LINT W INIT# SMI# SLP#/LT_STP# IGNN#/SI M#/SI Y FRR# STPLK#/LLOW_LTSTP H PU_STP#/PSLP_V# PSLP_O#/GPIO W PRSLPVR LT_RST#/PRSTP#/PROHOT# S S xmm PILK Part of PILK PILK PILK PILK PILK PILK SPIF_OUT/PILK/GPIO PU LP PI INTRF RT PI LKS PIRST# /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM /ROM #/ROM #/ROM #/ROMW# # FRM# VSL#/ROM IRY# TRY#/ROMO# PR/ROM STOP# PRR# SRR# RQ# RQ# RQ# RQ#/GPIO RQ#/GPIO GNT# GNT# GNT# GNT#/GPIO GNT#/GPIO LKRUN# LOK# INT#/GPIO INTF#/GPIO INTG#/GPIO INTH#/GPIO L L L L LFRM# LRQ# LRQ#/GNT#/GPIO MRQ#/RQ#/GPIO SRIRQ RTLK RT_IRQ#/GPIO VT RT_GN U T U V W U V T J W Y W W Y J J H J H H H G G F J G H G F Y G J G H H F H G G F F F F G G H H F J H W F F PI_MINI R PI_ R PI_PM R T PI_LK R PI_LN R PI_LK R T PIRST#_ FRM# VSL# IRY# TRY# PR STOP# PRR# SRR# RQ# RQ# RQ# RQ# RQ# GNT# GNT# GNT# GNT# GNT# LKRUN# PI_LOK# INT# INTF# INTG# INTH# L L L L LFRM#/FWH LRQ# LRQ# MRQ# SRIRQ U_V [..] VRT # (,,) # (,,) # (,,) # (,,) FRM# (,,) VSL# (,,) IRY# (,,) TRY# (,,) PR (,,) STOP# (,,) PRR# (,,) SRR# (,,) RQ# () RQ# () RQ# () INT# () INTF# () INTG# () INTH# () PLK_MINI PLK_ PLK_PM PILK PLK_LN PILK [..] (,,,) (,,) _PWRG dd for debug. PIRST#_ RQ# : Media ard RQ# : LN RQ# : Mini PI GNT# : Media ard GNT# () GNT# : LN GNT# () GNT# : Mini PI GNT# () LKRUN# (,,,) INT# : Media ard INTF# : LN INTG# : Mini PI INTH# : Mini PI L/FWH () L/FWH () L/FWH () L/FWH () LFRM#/FWH () MRQ# () SRIRQ (,,) RT_LK () UTO_ON# () PLK_MINI (,) PLK_ (,) PLK_PM () PILK () PLK_LN () PILK () *P_N R.K R +.V_RUN PI_LOK# R INT# R INTF# R INTG# R INTH# R P SRIRQ PRR# FRM# TRY# STOP# RQ# VSL# RQ# RQ# IRY# RQ# RQ# SRR# GNT# GNT# GNT# GNT# GNT# PR L L L L MRQ# LKRUN# LRQ# LRQ# Reserved For MI PLK_MINI *P_N PLK_ PLK_PM *P_N *P_N PILK *P_N PLK_LN PILK *P_N *P_N.U_V U NSZPX_NL *_N PIRST# R RN RN RN RN R R R R R R R RN *.K_N *.K_N *.K_N *.K_N *.K_N S P +.V_RUN *K_N *.KX_N *.KX_N *.KX_N *.KX_N *.K_N *.K_N *K/F_N *K/F_N *K/F_N *K/F_N K *KX_N PIRST# (,,) *.U_N +.V_RUN *.U_N *.U_N : pull down for S, reserve R connected to +.V_RUN R *K_N R K H_PSLP# H_PSLP# should be put down, reserve R for verifing QUNT OMPUTR SM-PI/PI/LP Size ocument Number Rev FX ate: Friday, May, Sheet of

PU/P PU_PROHOT# SUS_STT# SUS# SUS# NSWON# PM# SWI# RI# GPM# GVNT# PI_WK# S_THRMTRIP# XTVNT# PLK_SM PT_SM S_LL# GPIO RIN# GPIO RST_H# GPIO GPIO PSPK _SIN Z_SIN _SIN _ITLK_R Z_SYN Z_SOUT Z_ITLK () _ITLK_M () Z_ITLK R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R K_.K/F_ K_ +V_S *.K/F N *.K/F N *K N *.K/F N *K N *K N *K N *K N *.K/F N *K N *K N.K_.K_ *K N *K N *K N *K N *K N *K N K_ *K N *K N *K N *K N *K N *K N *K N R _ *P N R _ *P N +.V_RUN Z_ITLK S_OSIN () SUS# () SUS# () NSWON# (,,) _PWRG () () () elay ms after S powerok () RSMRST# *.U N () S_OSIN.U_ Z_RST# (,,) PM# GT RIN# SWI# (,) PI_WK# () PU_PROHOT# () RST_H# () PSPK (,,) PLK_SM (,,) PT_SM (,) PU_PWRG R K_ () _SOUT_M R * N *P N : pull down for S PM# RI# SUS# SUS# NSWON# SUS_STT# R K_ R K_ R K_ GT RIN# SWI# XTVNT# GVNT# GPM# PI_WK# PU_PROHOT# S_THRMTRIP# RSMRST# GPIO GPIO GPIO I RST_H# I PSPK PLK_SM PT_SM K_ K_ I I * N GPIO S_LL# For S N US_OP# US_OP# US_OP# US_OP# Z_RST# R * N () US_OP# US_OP# () US_OP# US_OP# US_OP# () T SI# SI# () KSMI# KSMI# T () _SOUT () _SIN () Z_SIN T T T For S, depopulate R For S, populatet R T +V_S R R R R Z_ITLK Z_SOUT Z_SYN _ITLK_R _SOUT _SIN Z_SIN _SIN _SYN_R _RST# For S ball is N R _ *K N () _SYN_M R _ Z_SOUT R _ Z_SYN () Z_SOUT () Z_SYN () Z_RST# *P N *P N U S S S xmm PI_PM#/GVNT# Part of RI#/XTVNT# F SLP_S# SLP_S# PWR_TN# PWR_GOO SUS_STT# F TST TST G TST F GIN G KRST# LP_PM#/GVNT# LP_SMI#/XTVNT# S_STT/GVNT# F SYS_RST#/GPM# WK#/GVNT# LINK/GPM# G SMLRT#/THRMTRIP#/GVNT# RSMRST# M_OS OS / RST ST_IS#/GPIO ROM_S#/GPIO GHI#/ST_IS#/GPIO W_PWRG/GPIO SMRTVOLT/ST_IS#/GPIO SHUTOWN#/GPIO SPKR/GPIO SL/GPO# S/GPO# SL/GPO# F S/GPO# _SL/GPIO _S/GPIO SSMUXSL/ST_IS#/GPIO LL#/GPIO ZLI US O GPIO US_O#/SLP_S/GPM# US_O#/Z_OK_RST#/GPM# US_O#/GVNT# US_O#/GVNT# US_O#/R_RST#/GPM# US_O#/GPM# US_O#/GPM# US_O#/GPM# US_O#/GPM# US_O#/GPM# N Z_ITLK M Z_SOUT K Z_SIN/GPIO L Z_SYN K Z_RST# L _ITLK/GPIO L _SOUT/GPIO L Z_SIN/GPIO J Z_SIN/GPIO J Z_SIN/GPIO M _SYN/GPIO L _RST#/GPIO N N N N N T N N N T T T T T T delete luetooth for defeature USP+ () USP- () USP+ () USP- () USP+ () USP- () delete cause no TV Mini ard USP+ () USP- () USP+ () USP- () USP+ () USP- () V_US * N R _ R _ () _RST#_M *P N *P N PI / WK UP VNTS US INTRF US PWR USLK S_M_X R US_ROMP US_ROMP R US_TST US_TST US_HSP+ G US_HSM- H US_HSP+ H US_HSM- G US_HSP+ US_HSM- US_HSP+ G US_HSM- H US_HSP+ US_HSM- US_HSP+ US_HSM- US_HSP+ US_HSM- US_HSP+ G US_HSM- H US_HSP+ G US_HSM- H US_HSP+ US_HSM- VTX_ VTX_ VTX_ VTX_ VTX_ VRX_ VRX_ VRX_ VRX_ VRX_ V VSS VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ VSS_US_ F VSS_US_ F VSS_US_ F VSS_US_ F VSS_US_ F VSS_US_ F VSS_US_ F VSS_US_ G VSS_US_ G VSS_US_ H VSS_US_ H VSS_US_ J VSS_US_ J VSS_US_ J VSS_US_ J VSS_US_ J VSS_US_ J R * N *P N R _.K/F_ USLK () N HNG R'S FOOTPRINT TO *P N R _ *P N US: US NN US: ard reader US: US NN US: US: US NN US: MINI R US: US NN US: US power V_US +.V_V Z_RST# U/V_.U_ U/V_.U_.U/V/XR U/V_ Z_RST# KSMI# US_OP# SI# US_OP# US_OP# US_OP# US_OP# US_OP# US_OP# +.V_RUN U/V_.U_ R R R R QUNT OMPUTR SM PI/US/ US power use S power,ut Over current signal datasheet is S only,ut TI F say use S is ok R R RP.U_ I I I I (GPIO) (GPIO) (GPIO) (GPIO) +V_S RN *KX N L TIG U/V_ *K N *.K/F N *KX N +V_S RP *KX N L SKT-Y-S *K N I R *K N I R *K N I R *K N I R : change from +.V_SUS to +V_S +V_S K_ K_ K_ K_ oard Revision Size ocument Number Rev FX SST *.U N ate: Friday, May, Sheet of

() ST_L# ST Power +.V_RUN SKT-Y-S L +.V_VP SKT-Y-S L +.V_VP TIG_ L U/V_ R R R () () ST_TXP ST_TXN () ST_RXN () ST_RXP +V_RUN * N * N * N R.K/F_ U/V_ U/V_ U/V_ +.V_RUN XTLV_T PLLV_T XTLV_T PLLV_T +.V_T ST clock Option U/V_ R.K/F_ Q MMT U/V_ U/V_ +.V_T.U_ R populate L,L,L; depopulate R,R,R.U_.U_ PLLV_T XTLV_T.U_ +.V_T T T ST_TX+_ ST_TX-_ T T K/F_ ST_L.U_ T T T T T T T T ST_X ST_X.U_ U H ST_RX- J ST_RX+ H ST_TX+ J ST_TX- H ST_RX- J ST_RX+ H ST_TX+ J ST_TX- H ST_RX- J ST_RX+ H ST_TX+ H ST_TX- H ST_RX- J ST_RX+ J ST_TX+ H ST_TX- F ST_L ST_X ST_X ST_T#/GPIO PLLV_ST_ J PLLV_ST_ XTLV_ST V_ST_ V_ST_ V_ST_ V_ST_ F V_ST_ F V_ST_ G V_ST_ G V_ST_ H V_ST_ H V_ST_ J V_ST_ J V_ST_ J V_ST_ J V_ST_ J V_ST_ VSS_ST_ VSS_ST_ VSS_ST_ VSS_ST_ VSS_ST_ VSS_ST_ VSS_ST_ VSS_ST_ VSS_ST_ VSS_ST_ VSS_ST_ F VSS_ST_ F VSS_ST_ F VSS_ST_ F VSS_ST_ G VSS_ST_ G VSS_ST_ G VSS_ST_ G VSS_ST_ G VSS_ST_ G VSS_ST_ G VSS_ST_ G VSS_ST_ G VSS_ST_ G VSS_ST_ H VSS_ST_ H VSS_ST_ S For First build,if next build no use remove from OM. S S xmm Part of SRIL T SRIL T POWR SPI ROM HW MONITOR T / I_IORY I_IRQ I_ I_ I_ I_K# I_RQ I_IOR# I_IOW# I_S# I_S# I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO I_/GPIO SPI_I/GPIO SPI_O/GPIO SPI_LK/GPIO SPI_HOL#/GPIO SPI_S#/GPIO LN_RST#/GPIO ROM_RST#/GPIO FNOUT/GPIO FNOUT/GPIO FNOUT/GPIO FNIN/GPIO FNIN/GPIO FNIN/GPIO TMP_OMM TMPIN/GPIO TMPIN/GPIO TMPIN/GPIO TMPIN/TLRT#/GPIO VIN/GPIO VIN/GPIO VIN/GPIO VIN/GPIO VIN/GPIO VIN/GPIO VIN/GPIO VIN/GPIO V VSS L FJHS U +.V_RUN VQ_V ohm/ VQ_ S S xmmvss_ PHRY () VQ_ VSS_ IRQ () Part of U/.V_ U/V_ U/V_ U/V_ U/V_ U/V_ VQ_ VSS_ P () VQ_ VSS_ P () L VQ_ VSS_ Y P () L VQ_ VSS_ PK# () M VQ_ VSS_ PRQ () P VQ_ VSS_ PIOR# () P U/V_.U_.U_.U_.U_.U_ VQ_ VSS_ PIOW# () T VQ_ VSS_ W PS# () V VQ_ VSS_ W PS# () W VQ_ VSS_ P[..] () W P VQ_ VSS_ W P VQ_ VSS_ W P.U_.U_.U_.U_.U_.U_ VQ_ VSS_ P VQ_ VSS_ F P VQ_ VSS_ G H P L VQ_ VSS_ J P FJHS VQ_ VSS_ J P +.V_VP V_.V VQ_ VSS_ H P VQ_ VSS_ ohm/ G P VQ_ VSS_ G P VQ_ VSS_ F P U/V_ U/V_ U/V_ U/V_ U/V_ VQ_ VSS_ H F P U/.V_ VQ_ VSS_ J P VQ_ VSS_ J P VQ_ VSS_ J P VQ_ VSS_ VSS_ M.U_.U_.U_.U_.U_.U_ V_ VSS_ M V_ VSS_ N V_ VSS_ N V_ VSS_ J N V_ VSS_ J R G V_ VSS_ R G.U_.U_ V_ VSS_ U V_ VSS_ G U V_ VSS_ U V_ VSS_ V G L V_ VSS_ V +V_S S_S_V V_ VSS_ VSS_ M T SKT-Y-S S_.V_ VSS_ V +.V_RUN S_.V_ VSS_ F R K_ U/V_ U/V_ U/V_.U_.U_.U_ S_.V_ VSS_ J S_.V_ VSS_ N L_TST () J S_.V_ VSS_ P LMP_STT# () K W +.V_S_R H_N# () +.V_S L S_.V_ VSS_ SKT-Y-S VSS_ G P S_.V_ VSS_ H P R * N.U_.U_.U_ S_.V_ VSS_ S_N_THRM () H P U/V/XR_.U_ S_.V_ VSS_ H T *.U/V/_N S_.V_ VSS_ VSS_ T S_N_THRM () R * N US_PHY_.V_ VSS_ +.VUS_PHY US_PHY_.V_ VSS_ V : reserve for US_PHY_.V_ VSS_ L +.V_RUN N thermal iode M R K_.U_ US_PHY_.V_ US_PHY_.V_ V M PU_PWR_S +.V_RUN R _ PI_VSS_ PI_VSS_ P PU_PWR=.V WHN S PU_PWR PI_VSS_ M PU_PWR=.V WHN S V +.V_VP R * N V_VRF PI_VSS_ V_VRF PI_VSS_ L L PI_VSS_ SKT-Y-S SKT-Y-S VK_.V PI_VSS_ N PI_VSS_ +.V_RUN +.V_VP VK_.V PI_VSS_ M.U/V/XR PI_VSS_ VSSK PI_VSS_.U/V/XR VK_.V PI_VSS_ V L PI_VSS_ PI_VSS_ V PI_VSS_ PI_VSS_ +.V_RUN V PI_VSS_ PI_VSS_ V SKT-Y-S PI_VSS_ PI_VSS_ V PI_VSS_ PI_VSS_ V.U/V/XR U/V_.U_ PI_VSS_ PI_VSS_ V PI_VSS_ PI_VSS_ V PI_VSS_ PI_VSS_ U PI_VSS_ PI_VSS_ T +V_RUN R K/F_ PI_VSS_ PI_VSS_ T V_VRF PI_VSS_ PI_VSS_ T PI_VSS_ PI_VSS_ T +.V_RUN PI_VSS_ PI_VSS_ T U/V_.U_ PI_VSS_ PI_VSS_ P SW PI_VSS_ PI_VSS_ S POWR F F G J J L L M M M M N N P P P R R R T T U U V V V V V V W W Y G J J J F G G G H J J J K L L L L L M M M N N P P P P P *P N Y R *M N *P N *MHZ_ST_N ST_X R /F_ ST_X R_OM_ML R./F Modify Resistor Y OUT O MHZ_OS V VSS V_Y +.V_RUN L LMS_.U_.U_ +.V_S L SKT-Y-S +.VUS_PHY U/V_.U_.U_ : add one more ap. for S.U_.U_ QUNT OMPUTR SM H/POWR Size ocument Number Rev FX ate: Friday, May, Sheet of

S has K internal P for _SOUT K internal PU for RT_LK,xternal PU/P is not required. +.V_RUN +V_S +.V_RUN +.V_RUN +.V_RUN +.V_RUN +V_S () _SOUT () RT_LK R *K N R *K N R *K N R K_ R *K N R K_ () UTO_ON# R *K N delete S setting () () PILK PILK (,) PLK_MINI (,) PLK_ R *K N R *K N R K_ R *K N R K_ R *K N PLK_MINI PLK_ RQUIR STRPS PULL HIGH _SOUT US UG STRPS RT_LK INTRNL RT FULT PI_LK PI_LK PI_LK PI_LK US INT. PLL FULT PU IF=K FULT H, H = PI ROM H, L = SPI ROM PULL LOW IGNOR UG STRPS FULT XTRNL RT US XT. MHZ PU IF=P L, H = LP ROM FULT L, L = FWH ROM +.V_RUN +.V_RUN +.V_RUN +.V_RUN +.V_RUN +.V_RUN R *K N R *K N R *K N R *K N R *K N R *K N (,,,) (,,,) (,,,) S HS K INTRNL PU FOR PI_[:] (,,,) (,,,) (,,,) R *.K N R *.K N R *.K N R *.K N R *.K N R *.K N UG STRPS PULL HIGH PULL LOW PK# US LONG RST FULT US SHORT RST PI_ Use Long Reset FULT Use Short Reset PI_ US PI PLL FULT YPSS PI PLL PI_ US PI LK FULT YPSS PI LK PI_ US I PLL FULT YPSS I PLL PI_ US FULT PI STRPS FULT US PROM PI STRPS PI_ boot fail time disabled FULT boot fail time enabled QUNT OMPUTR SM STRPS S Only S Only S Only Size ocument Number Rev FX ate: Friday, May, Sheet of

+V_SUS +.V_RUN +LV +V_LW Q J FN_NL TXULKOUT- () R TXULKOUT+ () K_ MLK TXUOUT- () TXUOUT+ () +.V_RUN +V_SUS.U/V/ R TXUOUT- () _ *U_N TXUOUT+ () LV_ON as Tom suggestion, connect R R TXUOUT- () *K_N K_ +V_LW to "MLK" & "MT". TXUOUT+ () +LV Q R TXLLKOUT- () K_.U/V/ TXLLKOUT+ () change name as S. NW--F Q MT TXLOUT- () NW--F TXLOUT+ () () L_POWR_ON.U/V/.U/V/ TXLOUT- () *U_N TXLOUT+ () +.V_RUN TXLOUT- () LO_LK/T change to PHL_LK/T TXLOUT+ () Q that connected to TI N PHL_T R.K_ TU +.V_RUN PHL_LK () PHL_T () PHL_LK R.K_ +.V_RUN.U/V/ +LV +G_PWR_SR L_TST () dress : H --ontrast +.V_LW H --acklight +G_PWR_SR change name as LON ().U/V/ MLK (,) R.U/V/ R _ MT (,) K_ R _ +V_LW SMUS ddress LI_L_PRS# need to connected to. LMP_STT# () M' inverter support - e-populate. SW ' inverter support - Populate *HH-HPT_N J_FI-TS-VF-R () LI_L_PRS# GPIO.U/V/ P/V/ P/V/ () LI_L# SIG GN LI_L# is connected to pull high circuit, then, as Page of. - For iscrete: e-populate J,R,,,,,,,,, change name as S. On FM,L_TST & LMP_STT connect to S ; on FX??. +PWR_SR mil as Tom suggestion, connect to "MLK" & "MT". R K_.U/V/ mil Q SIV-T- INV_PWR_SR_ON change name as INV_PWR_SR_ON_R R K_ MINON (,,) Q NW--F L ONN QUNT OMPUTR Size ocument Number Rev FX ate: Friday, May, Sheet of

+V_RUN VG is kept as FM's solution. Page has some change for LK & T. Place ll of those Inductors aps close to JVG < mils HH-PT +.V_RUN R () VG_R L.U/V/ LMPGSN () VG_GRN R GRN RT_V L JVG LMPGSN () VG_LU *U_N LU L LMPGSN Place,, close to JVG < mils R R R +.V_RUN +V_RUN /F_ /F_ /F_ *P_N *P_N *P_N *P_N *P_N *P_N M_I# GRN HH-PT T P RT_V.U/V/ Z-N-F *U_N.U/V/ RP PR-.K () HSYN R _ () T_ () LK_ HSYN_R JVG_HS LU R _ L R LMS K_ Place near U <mil P/V/ P/V/ *U_N HSYN_ U HTGGW +.V_RUN () VSYN VSYN_ U HTGGW R _ Place near U <mil VSYN_R R _ *P_N JVG_VS L LMS *P_N *P_N *P_N delete Svideo for defeature RT QUNT OMPUTR Size ocument Number Rev FX ate: Friday, May, Sheet of

+.V_R +.V_R +.V_R U/V/.U/V/.U/V/.U/V/.U/V/.U/V/ copy to FX (,,,) [..] GN GN PI us GN GN GN PowerOnReset for Vccore GN Route GRST# to GPIOG (pin ) of the SIO companion GN GN chip, and name the signal US_GRST#. GN If US_GRST# is controlled by the sysem, then GN does not need to apply. +.V_R GN +.V_R If R is populated, both GN GN and R can be depop. GN R GN K_ R Route to GPIOG (pin ) on the +.V_R +.V_R K_ SIO companion chip, with () US_GRST# the signal named _HWSPN# R *_N GRST# should be asserted only _HWSPN# () U/V/ HWSPN# R *_N R R when system power supply is on. K_ K_ R K_ pull down to Memory Stick disable MSN disable MS & X X ard disable XN PI us Serial ROM disable Waiting to check LINK UIO S PI LKS PIN S ard nable (,,) PR PR (,,) # /# UIO MM ard nable PLK_PM (,,) # /# UIO (,,) # /# (,,) # /# UIO R _ ISL UIO () RQ# RQ# () GNT# GNT# UIO/SRIRQ# SRIRQ (,,) (,,) FRM# FRM# (,,) IRY# IRY# (,,) TRY# TRY# PI us (,,) VSL# R K_ VSL# (,,) STOP# +.V_R Interrupt STOP# INT# (,,) PRR# as application +.V_RUN PRR# Media card Interrupt (,,) SRR# SRR# INT# INT# () (,,) PM# U/V/ Q *TU_N.U/V/.U/V/ (,,) PIRST# () PLK_PM.U/V/.U/V/ Place the power caps close to the relation pins..u/v/.u/v/ R *_N.U/V/ (,,,) LKRUN# The IH schematics need to include a orelogic LOKRUN# pull-up resistor to implement LKRUN#, and the IH schematics must have a pull-down, or constantly drive thesignal low, in order to disable LKRUN#. U V_PI V_PI V_PI V_PI V_PI V_PI V_ROUT V_ROUT V_ROUT V_ROUT V_ROUT GRST# PIRST# V_RIN PILK PM# LKRUN# RT_V PI / OTHR V_V V_M TST R K_ Place the power caps close to the relation pins. T P.U/V/ U/V/ +.V_RUN R _ change name for Waiting to check +.V_R Waiting to check LINK S SRIRQ PIN PLK_PM PLK_PM R *_N *P_N Refer to LL M schematic X /PI QUNT OMPUTR Size ocument Number Rev FX ate: Friday, May, Sheet of

deleted for defeature.v_phyv, connection with +.V_R power.v_phyv, Inductor Required between +.V_R and V_PHY mils +.V_R +.V_RUN_PHY L LMPGSN U/V/.U/V/ U modify.u/v/ P/V/ V_PHY V_PHY V_PHY V_PHY Place these caps as close to the U as possible. TPIS XI XO TPN TPP.TPN & TPP, Short to GN if the Port Is Not Used FIL I/S TPN TPP RXT VRF MIO MIO MIO MIO MIO MIO MIO MIO S/X/MS_T S/X/MS_T S/X/MS_T S/X/MS_T S/X/MS_T () S/X/MS_T () S/X/MS_T () S/X/MS_T () MIO MIO S/X/MS_M S/X/MS_M () MIO MIO changed for S/MM/SIO only MIO MIO MIO S_WP#(XR/#) S_# S_WP#(XR/#) () S_# () MIO MIO S/X/MS_LK () MIO M_PWR_TRL_ () RSV MIO MIO T P RT_V R RR QUNT OMPUTR Size ocument Number Rev FX ate: Friday, May, Sheet of

O NOT INSRT S/MM SIMULTNOUSLY. changed for S/MM/SIO only +.V_RUN_R +.V_RUN_R R.U/V/.U/V/.U/V/ K_ ON () S/X/MS_T S/X/MS_T S-P(/T) S-P(T) S/X/MS_T S/X/MS_T () () S/X/MS_M () S/X/MS_LK () S/X/MS_T S/X/MS_M S/X/MS_LK S/X/MS_T.k Ohm Register Required etween S/MM_V and GN R _ R K_ S-P(M) S-P(Vss) S-P(Vdd) S-P(LK) S-P(Vss) S-P(T) S-P(T) S-SW(GN) SW(RSV) S-SW(WP) FOXONN_WK-RP-F SIOGN S/X/MS_T S_WP#(XR/#) S/X/MS_T () S_# () S_WP#(XR/#) () IN R RR For S/MS power +.V_R U IN OUT N +.V_RUN_R () M_PWR_TRL_ N GN GTU U/V/.U/V/ QUNT OMPUTR R RR ONN Size ocument Number Rev FX ate: Friday, May, Sheet of

ST H Place close to connector side +V_RUN +V_SUS +VH +VH +VH LINK_RST# H RK STN OT side. ST_RX-_ ST_RX+_ ST_RXN () ST_RXP () Locate caps, near H onn. Length match ST RX- & ST RX+ within mils. Q *SIV_N +.V_RUN ST drive vendors will use only V supply from the system and will derive.v on the drive. If drive power ON goals are not achieved, drive vendors +.V_RUN will use both V and.v supplies *U/V/_N *U/V/_N *.U/V/_N *P/V/_N from the system. Initial power saving +V_SUS *.U_N GN using.v from system is less than %. RXP ST_TXP () RXN ST_TXN () GN Power stimate: R ST_RX-_ Place closed to ST drive power consumption estimate at R *K_N TXN ST_RX+_ *K_N TXP H connector MobileMark is.w. n additional mw GN can be saved using Intel's IMST driver. *.U_N () H_N#.V +.V_RUN Q.V *MMST--F_N.V GN GN GN V +VH change name for V RST_H# -RST_H V R * N () RST_H# GN RSV copy to FX (,,,,) LINK_RST# LINK_RST# R _ GN V +.V_RUN +V_RUN V V PT O R _ U/V/ U/V/ Q *TU_N.U/V/ P/V/ R *K N TH H-TP MOLX_- TH H-TP : reserve L for current measurement, can be removed and short directly after RTS ; and change +V_RUN to +V_O for O side power P/V/ P/V/ Waiting to check TH TH -RST_H P () P[..] P P P P () PIOR# +.V_RUN P P () PIOW# P P () PK# P P () IRQ P P () PHRY P P () PRQ R P PRQ () P.K_ PIOR# () P PIOW# () P PHRY PK#_R PK# +V_O () PS# IRQ R _ () PS# P +V_O P P R K_ PS# PS# IL# R /F_ +V_O +V_O R *_N U/V/ U/V/.U/V/ P/V/.U/V/ Pin. able select H=Slave,L=Master Place closed to MO connector R _ +V_O ON SUYIN-MRGZL +V_O +V_O ohm/ L LMPGSN +V_RUN QUNT OMPUTR ST H & PT O O Screw TOP side. O Screw Size ocument Number Rev FX ate: Friday, May, Sheet of

MINI R change name for Mini ard Latch copy to FX Waiting to check J MOLX_- (,) PI_WK# R * N (,,) PM# R * N WK# +.V_RUN +.V_RUN +.V_RUN.U/V/.U/V/.U/V/.U/V/.U/V/ J +.V_RUN +.V_RUN WK# WK#.V_ delete luetooth RSRV_ GN for defeature RSRV_.V_ () MINI_LKRQ# LKRQ# UIM_PWR UIM_T : move position for direct connection GN () LK_PI_MINI_# UIM_LK.U/V/.U/V/ RFLK- () LK_PI_MINI_ RFLK+ UIM_RST deleted for media GN UIM_VPP board defeature HH-PT dded per MI WLN_RIO_IS# () requirement..u/v/ delete pin for media board +.V_LN GN R * N UIM_ defeature ; delete pin & WLN_RIO_# UIM_ W_ISL#, the debug signal GN PRST# LINK_RST# (,,,,) () MINI_PI_RXN PRn.VUX +.V_LN () MINI_PI_RXP PRp GN.V_ GN SM_LK.U/V/ GN PLK_SM (,,) () MINI_PI_TXN PTn SM_T PT_SM (,,) () MINI_PI_TXP PTp GN GN US_- USP- () RSRV_ US_+ USP+ () PI-xpress TX and RX direct to connector RSRV_ GN RSRV_ L_WWN# RSRV_ L_WLN# L_WLN_OUT# () RSRV_ L_WPN# L_T_OUT () RSRV_.V_ R *_N RSRV_ GN RSRV_.V_ depopulat R for luetooth function disabled MOLX_- MINI ard QUNT OMPUTR Size ocument Number Rev FX ate: Friday, May, Sheet of

xpress ard TH H-P- TH H-P- change name for copy to FX Waiting to check NW R GUI POST TOP side. swap traces as "fx_swap-" +.V_SUS () () USP+ USP- L *LWHNSQ_N USP-_L USP-_R PUS# PP# _SHN# R K_ R K_ R K_ R _ +V_R R _ ON USP-_R GN_ USP-_L USas application +.V_SUS PUS# US+ PUS# RSV_ RSV_ (,,) PLK_SM Q SMLK (,,) PT_SM +.V_R Max. m, verage m *TU_N SMT reserve for pull up +.V_SUS +.V +V_R Max. m, verage m +.V_R NWR_PI_WK# +.V (,) PI_WK# WK# +V_RUX R_RST# +.VUX R as application U R _ PRST# *K N +.V_.VIN +.V_RUN +.V_ (,,,,) LINK_RST# _SHN# SYSRST#.VIN () NW_LKRQ# LKRQ# SHN# () PP# PP# () XPRR_STY# +V_R R *_N R_RST# STY#.VOUT () LK_PI_NW# RFLK- PUS# PRST#.VOUT () LK_PI_NW RFLK+ PP# PUS# GN_ PP# UXIN +.V_SUS () PI_RXN PRn RLKN UXOUT +V_RUX () PI_RXP PRp O# GN_.VIN +.V_RUN () PI_TXN PTn.VIN () PI_TXP PTp GN_.VOUT +.V_R.VOUT J_PX--S PI-xpress TX and RX direct to connector N GN J PXFSPH-P N N N N R/TPSRGP +.V_R Max. m, verage m +V_R Max. m, verage m : change from only net name to symbol "power point" +V_R +V_RUX +.V_R +.V_R +.V_R +.V_R.U/V/ +.V_RUN U/.V/.U/V/.U/V/.U/V/.U/V/ *.U_N *.U_N.U/V/.U/V/.U/V/.U/V/.U/V/ +.V_SUS +.V_RUN xpress ard QUNT OMPUTR Size ocument Number Rev FX ate: Friday, May, Sheet of

M INTRF M Layout Notes. Tip and Ring trace width = mils. Spacing between Tip and Ring = mils. Tip and Ring connector pitch = mils. Keep out area from Tip and Ring to other signals = mils. Power and Ground minimum trace width to connector = mils. Route Tip and Ring on one layer only (top or bottom). Modem internal cable wire size = WG (stranded or twisted pair wire) change name for TH M_NUT M STN OT Side +.V_SUS.U/V/.U/V/ copy to FX Waiting to check ON J FOXONN_JM-L-F MI requirement on GN Reserved () _SOUT_M I_STO Reserved GN.V +.V_SUS ON () _SYN_M M L LMS I_SYN GN TIP TIP_L () _SIN I_ITLK_M R _ I_STIN GN RING RING_L () _RST#_M I_RST# I_ITLK _ITLK_M () L LMS Place R close to J MOLX_- TYO_-- R R *P/KV/_N *P/KV/_N *_N *_N *P_N *P_N MI SOLUTION Place, close to ON delete luetooth for defeature M ONN QUNT OMPUTR Size ocument Number Rev FX ate: Friday, May, Sheet of

pin updated as "FX K GPIO define v" +.V_ +.V_SR +.V_LW add R for +._SR & R connected to +.V_LW as power concern about the leakage; create +.V_. NV R K_ +.V_ +.V_SR to +.V_ (,) THRM_SYS_PWR# modify for thermal protect P_ R Y delete HWPG_.V.KHZ (,) () () *P N R *_N M_ HWPG_SYS HWPG_.V PU_ORPG +.V_ R K_ P_ U/V/XR_.U_ * N PLK_ (,,) SRIRQ () LFRM#/FWH () L/FWH () L/FWH () L/FWH () L/FWH (,) PLK_ GT () PS_I () LOM_LOW_PWR# () PP# () US_K_N# () TLK () TT () PSL# () NUML# () UX_N () PT_LRM# () RSMRST# () PT_O () VRON (,,) MINON (,,,) SUSON (,) S_ON & FLSH ROM R.U_ () () () () () () () () () () () () () () () () () () () () () () () () () () () () () K/F_ KSMI# SWI# SI# RIN# MX MX MX MX MX MX MX MX MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY () PS_I_ISL# () SROL# () US_SI_N# () WLN_RIO_IS# () TL# () TL# +.V_SUS.U_ GT RIN# +.V_RUN +.V_RUN MX MX MX MX MX MX MX MX MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY TLK TT PSL# NUML# +.V_SUS VRON MINON SUSON S_ON S# HWPG_.U_ SRIRQ LFRM#/FWH L/FWH L/FWH L/FWH L/FWH PLK_ *_N R R K/F_ K KX _KX R T T T T T.U_.U_ K_ U +.V_ SRIRQ LRQ LFRM L L L L LLK LRST SMI PWURQ V IOP/SI G/IOP KRST/IOP KSIN KSIN KSIN KSIN KSIN KSIN KSIN KSIN KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT TINT TK TO TI TMS PSLK/IOPF PST/IOPF PSLK/IOPF PST/IOPF PSLK/IOPF PST/IOPF PSLK/IOPF PST/IOPF KX/KLKOUT KX IOPJ/ST IOPJ/ST IOPJ/ST IOPJ/PFS IOPJ/PLI IOPJ/RKL_RSTO IOPM/ IOPM/ IOPM/ IOPM/ IOPM/ IOPM/ IOPM/ IOPM/ SL SL LK.U_ P/ IRTLY R _ V V V V V V Host interface Key matrix scan JTG debug port PS interface PORTM PORTJ- GN GN GN GN GN GN GN R * N R ms VRT HWPG_ ===> N_PWRG ===> _PWRG NORTH RIG SOUTH RIG _ PORT- Input output PWM or PORT PORT GN V PORT PORT PORTH PORTI PORTJ- PORT- PORTK PORTL.U_ VT IOP IOP/ IOP/ IOP/ P/ N/ IOP/PWM IOP/PWM IOP/PWM IOP/PWM IOP/PWM IOP/PWM IOP/PWM IOP/PWM IOP/URX IOP/UTX IOP/USLK IOP/SL IOP/S IOP/RING/PFIL IOP IOP/SL IOP/S IOP/T IOP/T/XWINT IOP/T IOP/T/XWINT IOP/LKOUT IOP/RI/XWINT IOP/RI/XWINT IOP/XWINT IOP/SWIN IOP/XWINT IOP/LPP/XWIN IOP/LKRUN/XWINT IOPH//NV IOPH//NV IOPH//R IOPH//R IOPH//TRIS IOPH//SHM IOPH/ IOPH/ IOPI/ IOPI/ IOPI/ IOPI/ IOPI/ IOPI/ IOPI/ IOPI/ IOPJ/R IOPJ/WR SLIO IOP IOP IOP IOP IOPK/ IOPK/ IOPK/ IOPK/ IOPK/ IOPK// IOPK// IOPK//R IOPL/ IOPL/ IOPL/ IOPL/ IOPL/WR N N N N N N N N N N.U_ T T THRMTRIP_SIO LI_L_SIO# SUS# HWPG_ NV NV R R TRIS SHM T R SHM MLK MT UIO_V_ON _PM# PT_SMLK PT_SMT FN_TH FPK_N LI_L_PRS# R _ V_IN INSTNT_ON_SW# MIN_PWR_SW# SUS# TF_INT# R _ R# WR# FOR ONLY *U/V N R delete pull up circuit of T_PWRON# T T POUT () US_GRST# () _HWSPN# () PT_TRIP_SL () XPRR_STY# () R R SHM=: nable shared memory with host IOS.U_ R THRMTRIP_SIO () SUS# () SUS# () TF_INT# () LKRUN# (,,,) NV NV R R TRIS SHM S# R# WR# _PM# LI_L_SIO# LK_RST_IN# () N_PWRG () P () N_MUT (,) RTH_L# () MY () : change from _ () RTH_L to RTH_L# PT_PRS# () PU PROHOT# () MLK (,) MT (,) UIO_V_ON () PT_SMLK (,) PT_SMT (,) FN_TH () FPK_N () LI_L_PRS# () _PWRG (,,) VLT_RUN_ON () V_IN (,) *K N *K N K_ PT_O_IINP () : added as Loki's suggestion R *.K N as FM NSWON# () +.V_ R- +.V_ +.V_SUS R K_ I/O ddress Index (HFGH, HFGL) U ST Micro MW/M-LV/SSTVF # O# W# R _.U/V/ Q *PTTT_N RST#/N RY/Y#/N N N N V V GN GN Reserved PT_SMLK PT_SMT LN_PM# () V_PWROK T +.V_.U_ ata F F (HFGH, HFGL)+ LI_L# () +.V_ +.V_ INSTNT_ON_SW# MIN_PWR_SW# R K_ U/V/ VRT VRT PT_SMLK/T : harger, attery MLK/T : L, Password, PU internal thermal diode R K_ R K_.U_ R K_ R K_ U/V/ +.V_ +.V_SR to +.V_ MLK MT delete PL connector QUNT OMPUTR P & FLSH delete pull up circuit of RF_SW#, TV_SNS#_, MONITOR_PLUG# R.K/F_ Instant on power switch input only R K_ R K_ R.K/F_ U SL S INSTNT_POWR_SW# () POWR_SW# (,) M-WMNTP +.V_ Size ocument Number Rev FX Friday, May, ate: Sheet of WP V GN