Κεφάλαιο 2 Εντολές Η γλώσσα της Μηχανής (Instructions Language of the Computer)

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1 Κεφάλαιο 2 Εντολές Η γλώσσα της Μηχανής (Instructions Language of the Computer) 1

2 Τι θα μάθουμε σε αυτό το Κεφάλαιο: Instructions (Εντολές): the words of the computer language human form: Assembly language computer form: Machine language (binary) Learn simple instruction set relationship with high-level programming language (C language) implementation in hardware MIPS popular architecture, we ll study its instruction set (ISA) Stored program concept instructions and data of different types can be stored in memory as numbers Step-by-step learning learn the MIPS instruction set a piece at a time 2

3 Αρχιτεκτονική MIPS Developed at Stanford University by Prof. J. Hennessy and a group of graduate students Similar to other architectures developed since the 1980's In 1984 the MIPS Computer Systems Corp. was founded to build highperformance Unix workstations with MIPS processors Other SPARC Hitachi SH PowerPC Motorola 68K MIPS IA-32 ARM Almost 100 million MIPS processors manufactured in 2002 Used by DEC, NEC, Nintendo, Cisco Silicon Graphics, Sony, Siemens, LSI Logic, Sales of microprocessors by ISA 3

4 Αριθμητική MIPS All instructions have 3 operands (τελεστές ή μεταβλητές) and can only perform 1 operation at a time Operand order is fixed (destination first) Example: C code: MIPS code : a = b + c add a, b, c a, b, c are registers (we ll talk about registers in a bit) The natural number of operands for an operation like addition is three requiring every instruction to have exactly three operands, no more and no less, conforms to the philosophy of keeping the hardware simple 4

5 Αριθμητική MIPS (συν.) Addition of more than 2 number is performed by a series of 2-number addition instructions Example: C code: a = b + c + d + e; MIPS code : add a, b, c # a=b+c add a, a, d # a=b+c+d add a, a, e # a=b+c+d+e # -- the comment symbol, effective till end of line Unlike other programming languages, assembly allows only 1 instruction per line 5

6 Αριθμητική MIPS (συν.) Design Principle 1: simplicity favors regularity (η απλότητα ευνοεί την κανονικότητα) Of course this complicates some things... more instructions are needed (n instructions for the summation of n+1 numbers) Operands must be registers, only 32 registers provided for MIPS (In contrast, Ιntel processor allows for instructions to operate directly with data in memory) Each register in MIPS contains 32 bits This is MIPS-32. There also exists MIPS-64, for bit registers. 6

7 Αριθμητική MIPS (συν.) What will be the output of the C compiler for each of the following 2 programs? C statements C Compiler MIPS instructions a = b + c; d = a e; f = (g + h) (j + j); 7

8 Αριθμητική MIPS (συν.) What will be the output of the C compiler for each of the following 2 programs? C statements C Compiler MIPS instructions a = b + c; add a, b, c d = a e; sub d, a, e f = (g + h) (i + j); add t0, g, h add t1, i, j sub f, t0, t1 8

9 Καταχωρητές (Registers) Arithmetic instructions operands must be registers (hardware), only bit (=word) registers provided, restricted Design Principle 2: smaller is faster Why? MIPS convention for register names: $s0, $s1, $s2, for registers corresponding to variables in the high-level program $t0, $t1, $t2, for temporary variables necessary to compile the high-level program into MIPS code Example: f = (g + h) (i + j); add t0, s1, s2 # register $t0 holds g+h add t1, s3, s4 # register $t1 holds i+j sub s0, t0, t1 # register $s0 holds f 9

10 Καταχωρητές vs. Μνήμη Compiler associates variables with registers What about programs with lots of variables Recall the basic computer structure: Control Input Memory Datapath Output Processor I/O Use memory (μνήμη) to store all high-level program instructions, data, and results Transfer data from memory to registers, when needed Must have MIPS data transfer instructions (lw, sw) 10

11 Οργάνωση Μνήμης Εντολή Φόρτωσης (lw) Viewed as a large, single-dimension array, with an address. To access a word in memory, the instruction must supply the address of the data A memory address is an index into the array (0, 1, 2, ) "Byte addressing" means that the index points to a byte of memory bits of data 8 bits of data 8 bits of data 8 bits of data 8 bits of data 8 bits of data 8 bits of data Let A be array of 100 words (= 1 byte), g is $s1, h is $s2, base register is $s3 g = h + A[5]; lw $t0, 5($s3) #lw = load word add $s1, $s2, $t0 base register: array starting address offset: the constant in data transfer (5) 11

12 Οργάνωση Μνήμης για ΜΙPS Bytes are nice, but most data items use larger "words" For MIPS, registers hold 32 bits of data, thus, a word is 32 bits or 4 bytes bits of data 32 bits of data 32 bits of data 32 bits of data Byte address of 0 th word is 0 Byte address of 1 st word is 4 Byte address of 2 nd word is 8 Byte address of n th word is n x bytes with byte addresses from 0 to words with byte addresses 0, 4, 8, For the example of the previous slide (g = h + A[5];): lw $t0, 20($s3) #5x4=20 add $s1, $s2, $t0 12

13 Εντολές φόρτωσης και αποθήκευσης - Παράδειγμα C code: A[12] = h + A[8]; MIPS code: lw $t0, 32($s3) # 32 = 8x4 add $t0, $s2, $t0 sw $t0, 48($s3) # store word Compiler assigns: base register to $s3 (address of beginning of array A) variable h to register $s2 Store word has destination last Remember arithmetic operands are registers, not memory! Can t write: add 48($s3), $s2, 32($s3) 13

14 Αριθμητικές εντολές με Σταθερούς -- Άμεσες Εντολές Let 4 be a constant in C language stored at memory address AddrConstant4, and the beginning of the program data in memory associated with $s1. To add 4 to $s3: lw $t0, AddrConstant4($s1) # $t0 = constant 4 add $s3, $s3, $t0 # $s3 = $s3 + $t0 OR addi $s3, $s3, 4 # $s3 = $s3 + 4 addi is called and immediate instruction. Allows an operand to be a constant Design Principle 3: Make the common case fast 14

15 Μέχρι στιγμής έχουμε μάθει: MIPS loading/storing words but addressing bytes arithmetic on registers only Instruction Meaning add $s1, $s2, $s3 $s1 = $s2 + $s3 addi $s1, $s2, 100 $s1 = $s sub $s1, $s2, $s3 $s1 = $s2 $s3 lw $s1, 100($s2) $s1 = Memory[$s2+100] sw $s1, 100($s2) Memory[$s2+100] = $s1 15

16 Γλώσσα Μηχανής Διάταξη εντολών Instructions are kept in the computer as a series of high and low electronic signals binary digits Instructions, like registers and words of data, are also 32 bits long Example: add $t1, $s1, $s2 registers have numbers, $t1=9, $s1=17, $s2=18 (we ll see the complete list later) Instruction Format (=layout of the instruction): Machine Language op rs rt rd shamt funct Can you guess what the field names stand for? 16

17 Διάταξη Εντολών Μηχανής (συν.) Each of the fields has fixed size and tell the computer a specific information: op (6 bits): basic operation of the instruction, opcode rs (5 bits): source register for 1 st operand rt (5 bits): source register for 2 nd operand rd (5 bits): destination register to put result shamt (5 bits): shift amount (later!) funct (6 bits): function to be performed, function code Why do we allocate 5-bits for register representation? What s the maximum number of operations that can be performed? 17

18 Διάταξη Εντολών Μηχανής (συν.) For simplicity/better readability, the machine instruction is often represented in Hex ( ) 2 becomes ( ) 16 18

19 Είδη διατάξεων εντολών (συν.) What happens if an instruction requires longer fields? Consider the load-word and store-word instructions, where you need to specify 2 registers and 1 constant What would the regularity principle have us do? New principle: Good design demands a compromise Introduce a new type of instruction format I-type for Immediate and data transfer instructions other format was R-type for Register instructions Example: lw $t0, 32($s2) bits 5 bits 5 bits 16 bits op rs rt 16 bit number Where's the compromise? How one distinguishes which format? 19

20 Κωδικοποίηση (Encoding) εντολών MIPS Instruction Format op rs rt rd shamt funct address add R 0 Reg Reg Reg sub R 0 Reg Reg Reg addi I 8 Reg Reg address lw I 35 Reg Reg address sw I 43 Reg Reg address Field sizes (in # bits): Field op rs rt rd shamt funct address Size 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits 16 bits Instructions add and sub have the same op field funct determines the arithmetic operation (sub, add) to perform 20

21 Εντολές MIPS (συν.) There s no subi instruction Less common in C, Java addi can be used since the constant can be negative 21

22 Η έννοια του Αποθηκευμένου Προγράμματος Instructions are bits Programs are stored in memory to be read or written just like data Processor Memory Editor program (machine code) C compiler (machine code) Book text Source code in C For editor program Fetch & Execute Cycle Instructions are fetched and put into a special register Bits in the register "control" the subsequent actions Fetch the next instruction and continue The program counter is a register that holds the address of the next instruction to be executed memory for data, programs, compilers, editors, etc. 22

23 Εντολές Λογικής Logical Operations C operator Java operator MIPS instruction Shift left << << sll Shift right >> >>> srl Bit-by-bit AND & & and, andi Bit-by-bit OR or, ori Bit-by-bit NOT ~ ~ nor nor is implemented using a nor with one operand zero in shift operators, fill with zero and/or/not operators are 3-register operators, ex. and $t0, $t1, $t2 # $t0 = $t1 & $t2 nor $t0, $t1, $t2 # $t0 = ~( $t1 $t2 ) Which instruction format do we need for these logic operations (I-type of R-type)? 23

24 Εντολές Λογικής (συν.) Τhere are also andi and ori operations for immediate logic operations on a constant andi $s1, $s2, 100 # $s1 = $s2 & 100 ori $s1, $s2, 100 # $s1 = $s2 100 Which instruction format do we need for these logic operations (I-type of R-type)? Shift operations: sll $t2, $s0, 4 # $t2 = $s0 << 4 i.e., shift the contents of $s0 4 bits to the left, fill with zeros the 4 rightmost positions, and store result in $t2 4 is called the shift amount and is represented by the shamt field in the R-type instruction format Shift left by i bits gives multiplication by 2 i 24

25 Εντολές Ελέγχου (Control Instructions) Decision making instructions alter the execution flow, it may be needed based on the input data and the values created during computation i.e., change the "next" instruction to be executed MIPS conditional branch instructions: bne $t0, $t1, L1 # branch to statement labeled # with L1 if not equal beq $t0, $t1, L1 # branch to statement labeled # with L1 if equal Example: if (i==j) h = i + j; (i $s0, j $s1, h $s3)... bne $s0, $s1, L1 add $s3, $s0, $s1 L1:... 25

26 Εντολές Ελέγχου (συν.) MIPS unconditional branch instructions: j label Example: if (i!=j) beq $s4, $s5, Else h=i+j; add $s3, $s4, $s5 else j Exit h=i-j; Else:sub $s3, $s4, $s5 Exit:... Can you build a simple for loop? 26

27 Εντολές Ελέγχου (συν.) C language While (save[i] == k) i += 1; i $s3 k $s5 base of save[ ] at $s6 save[ ] n k k k j x Assembly language 27

28 Μέχρι στιγμής έχουμε εξετάσει: Instruction Meaning add $s1,$s2,$s3 $s1 = $s2 + $s3 sub $s1,$s2,$s3 $s1 = $s2 $s3 lw $s1,100($s2) $s1 = Memory[$s2+100] sw $s1,100($s2) Memory[$s2+100] = $s1 bne $s4,$s5,l Next instr. is at L if $s4 $s5 beq $s4,$s5,l Next instr. is at L if $s4 = $s5 j Label Next instr. is at Label logic operators immediate operators Formats: R I J op rs rt rd shamt funct op rs rt 16 bit address op 26 bit address 28

29 Ροή Ελέγχου We have: beq, bne, what about branch-if-lessthan (blt)? Often useful! New instruction (set to 0/1 on less than): slt $t0, $s1, $s2 #$t0=1 if $s1<$s2, else t0=0 slti $t0, $s2, 10 #$t0=1 if $s2<10, else t0=0 MIPS does not include a direct blt (branch-if-else) instruction for simplicity (keeps clock cycle smaller or # of clock cycles needed less) Instead, MIPS uses beq, bne, slt, slti and register $zero (which always contains value 0) to perform blt instructions. How? 29

30 Μέχρι στιγμής έχουμε μάθει για τη ΜΙPS: MIPS operands (τελεστές) Name Example Comments 32 registers $s0, $s1, $s7 $t0, $t1, $t7 $zero --Fast location for data. In MIPS, data must be in registers to perform arithmetic. -- MIPS register $zero always equals Registers $s0--$s7 map to and registers $t0--$t7 map to memory words Memory[0], Memory[4], Memory[ ] Accessed only by data transfer instructions. MIPS uses byte addresses, so sequential words differ by 4. Memory holds data structures, such as arrays, and spilled registers, such as those saved on procedure calls. 30

31 Μέχρι στιγμής έχουμε μάθει για τη ΜΙPS (συν.): MIPS Assembly Language (Εντολές) Category Arithmetic Instructions Example Meaning Comments Add add $s1, $s2, $s3 $s1 = $s2 + $s3 3 operands; data in register Subtract sub $s1, $s2, $s3 $s1 = $s2 - $s3 3 operands; data in register Add Immediate addi $s1, $s2, 100 $s1 = $s Used to add constants Data Transfer Load word lw $s1, 100($s2) $s1 = Memory[$s2+100] Data from memory to register Store word sw $s1, 100($s2) Memory[$s2+100] = $s1 Data from register to memory And and $s1, $s2, $s3 $s1 = $s2 & $s3 Bitwise AND Or or $s1, $s2, $s3 $s1 = $s2 $s3 Bitwise OR Nor nor $s1, $s2, $s3 $s1 =~( $s2 $s3) Bitwise NOR Logic And Immediate and $s1, $s2, 100 $s1 = $s2 & 100 Bitwise AND with Constant Or Immediate or $s1, $s2, 100 $s1 = $s2 100 Bitwise OR with Constant Shift left sll $s1, $s2, 10 $s1 = $s2 << 10 Shift left by Constant Shift right slr $s1, $s2, 10 $s1 = $s2 >> 10 Shift right by Constant 31

32 Μέχρι στιγμής έχουμε μάθει για τη ΜΙPS (συν.): MIPS Assembly Language (Εντολές) συν. Category Instructions Example Meaning Comments Conditional Branch Branch on equal Branch on not equal Set on less than beq $s1, $s2, L if ($s1 == $s2) go to L Equal test; PC relative branch bne $s1, $2, L if ($s1!= $s2) go to L Not equal test; PC relative slt $s1, $s2, $s3 if ($s2<$s3) $s1 = 1; else $s1 = 0 Compare less than; for beq, bne Set less than immediate slti $s1, $s2, 100 if ($s2<100) $s1 = 1; else $s1 = 0 Compare less than constant; for beq, bne Unconditional Jump Jump j L go to L Jump to target address 32

33 Μέχρι στιγμής έχουμε μάθει για τη ΜΙPS (συν.): MIPS Machine Language (ex. in decimal) Name Format Example Comments Add R add $s1, $s2, $s3 Sub R sub $s1, $s2, $s3 Addi I addi $s1, $s2, 100 Lw I lw $s1, 100($s2) Sw I sw $s1, 100($s2) Beq I beq $s1, $s2, 100 Bne I bne $s1, $s2, 100 Slt R slt $s1, $s2, $s3 Slti I slti $s1, $s2, 100 J J j Field size 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits All MIPS instructions 32 bits Format R R op rs rt rd Shamt funct Arithmetic Instruction format Format I I op rs rt Address / immediate Transfer, branch, Imm. Format Format J J op Target address Jump instruction format 33

34 Υποστήριξη Διαδικασιών από Υλικό (Supporting Procedures in Computer Hardware) Procedure (or Function): stored subroutine that performs a specific task based on the parameters with which it is called Usage: Better program structure Increases program readability Reuse! 34

35 Υποστήριξη Διαδικασιών από Υλικό (συν.) Six steps always followed in procedure execution: Place parameters in a place for the procedure to access them Transfer control to the procedure Acquire storage resources needed for the procedure Perform desired procedure task Place results (values) in a place for the calling program (or main program) to access them Return control to the point of origin (since a procedure can be call from several points in a program) 35

36 Υποστήριξη Διαδικασιών από Υλικό (συν.) Registers used for procedure calling: $a0 - $a3: argument registers (4) to pass parameters to the procedure $v0 - $v1: value registers (2) to return procedure values $ra : return address register used to return to the point of origin Special Procedure Instruction: jal ProcedureAddress jump-and-link instruction; jumps to an address and at the same time saves the address of the following instruction in a register indicated by $ra in MIPS, i.e., calls the procedure 36

37 Υποστήριξη Διαδικασιών από Υλικό (συν.) The stored-program concept implies that the address of the current instruction being executed is always known Kept in a register call the Program Counter (PC) (Μετρητής Προγράμματος) jal saves PC + 4 in $ra. Why? How do we return from a Procedure? jr $ra # unconditional jump to address # in register $ra 37

38 Υποστήριξη Διαδικασιών από Υλικό (συν.) In summary: Caller (= Main Program or another Procedure) stores parameters in $a0 - $a3 performs a jal ProcedureAddress to call the procedure Callee (= Procedure) performs calculations saves the results in $v0 - $v1 performs a jr $ra to return to the Caller 38

39 Υποστήριξη Διαδικασιών από Υλικό (συν.) What if more registers are needed by the procedure? Save contents of registers used by the caller before the procedure is invoked, and restore them later Saving of registers to the memory is called memory spilling Use stack = data structure for register spilling, part of memory, LIFO structure Stack Pointer ($sp) points to the most recently allocated address in the stack Use pop and push operations on the stack 39

40 Παράδειγμα Consider the following C Procedure: int leaf_example (int g, int h, int i, int j) { int f; } f = (g + h) (i + j); return f; Let g $a0, h $a1, I $a2, j $a3, f $s0 What is the compiled MIPS code? 40

41 Παράδειγμα (συν.) Leaf_example: # start with procedure label Register spilling in stack (push) addi $sp, $sp, -12 sw $t1, 8($sp) sw $t0, 4($sp) sw $s0, 0($sp) # make room in stack for 3 items # push $t1 in stack # push $t0 in stack # push $s0 in stack The stack pointer and the stack (a) before, (b) during, and (c) after the procedure call 41

42 Παράδειγμα (συν.) Body or procedure Save return value add $t0, $a0, $a1 # $t0 = g + h add $t1, $a2, $a3 # $t1 = i + j sub $s0, $t0, $t1 # f = (g + h) (i + j) add $v0, $s0, $zero # to return $v0 = f = $s0 + 0 Restore Registers (pop) lw $s0, 0($sp) lw $t1, 4($sp) lw $t0, 8($sp) # restore $s0 from stack # restore $t1 from stack # restore $t0 from stack Return jr $ra # return = jump back to caller 42

43 Υποστήριξη Διαδικασιών από Υλικό (συν.) How do we know which register to save before executing a procedure? MIPS separates registers in 2 groups: 1. $t0 - $t9: temporary registers, not preserved 2. $s0 - $s7: saved registers, must preserve if used by the procedure 43

44 Υποστήριξη Διαδικασιών από Υλικό (συν.) Nested Procedures: A procedure that does not call another procedure or recurses is called a leaf procedure In practice, many procedures are not leaf procedures they call other procedures and/or they recurse (clone themselves) Consider the following: Procedure A with parameter 5 ($a0 = 5, $ra is set) called by the main program Procedure B with parameter 10 (($a0 = 10, $ra is set again) called by Procedure A Will A be able to continue with accurate data? Will A be able to return to the main program? Use stack principle again (more in the Laboratory!!) 44

45 Υποστήριξη Διαδικασιών από Υλικό (συν.) Static Vs Automatic data: Remember static storage class in C? exist across entire program (including all procedures) In contrast, automatic storage class: exist only in the procedure in which the data is declared (local to procedures) MIPS uses a global pointer $gp to point to the static data stored in memory 45

46 Πολιτική Χρήσης Καταχωρητών Name Register number Usage Preserved on call $zero 0 the constant value 0 n.a $v0-$v1 2-3 values for results and expression evaluation no $a0-$a3 4-7 arguments no $t0-$t temporaries no $s0-$s saved yes $t8-$t more temporaries no $gp 28 global pointer yes $sp 29 stack pointer yes $fp 30 frame pointer yes $ra 31 return address yes Register 1 (called $at) is reserved for the assembler and registers (called $k0-$k1) are reserved for the operating system 46

47 Υποστήριξη Διαδικασιών από Υλικό (συν.) Allocation of space in the stack for additional data: The stack can also be used for local data of a procedure that do not fit in a register (ex. arrays of structures) Procedure Frame (or activation record): segment of the stack that contains a procedure s saved registers and local variables Frame Pointer ( $fp ): register containing the location of the saved registers and local variables of a procedure (i.e., points to 1 st word of the procedure frame) 47

48 Υποστήριξη Διαδικασιών από Υλικό (συν.) Stack allocation (a) before, (b) during, and (c) after the procedure call: $fp points to 1 st word of frame $sp points to top of stack $sp can change during the program execution whereas $fp is fixed, thus it s easier to reference data using the $fp when $fp is used, it is initialized using the address in $sp, then $sp is restored using $fp 48

49 Υποστήριξη Διαδικασιών από Υλικό (συν.) Allocation of space for additional data in the Heap Heap: part of memory allocated to dynamically allocated data (malloc(), free()) Machine code for program executed Memory 49

50 Επεξεργασία κειμένου MIPS also provides instructions useful for text processing Remember ASCII code? 8-bit codes for characters (printable and control) lb : loads a byte from memory in the rightmost 8 bits of a register sb: stores the rightmost 8 bits of a register to memory To copy a byte from a memory location to another memory location: lb $t0, 0($sp) # read byte (= 1 character) from source sb $t0, 0($gp) # write byte (= 1 character) to destination MIPS also supports instructions for load/store of half words (= 16 bits), useful for Unicode used by Java lh $t0, 0($sp) # read 2 bytes (= 1 character) from source sh $t0, 0($gp) # write 2 bytes (= 1 character) to destination 50

51 Σταθεροί και Διευθύνσεις 32-bit We'd like to be able to load a 32-bit constant into a register, ex. load constant into register $t0 Must use two instructions, new "load upper immediate" instruction Machine code $t0 lui $t0, filled with zeros Then must get the lower order bits right, i.e., ori $t0, $t0, $t0 ori In MIPS, the assembler is responsible to create the long constants or addresses using the reserved $at register $t

52 Κώδικας Assembly vs. Γλώσσα Μηχανής Assembly provides convenient symbolic representation much easier than writing down numbers e.g., destination first Machine language is the underlying reality e.g., destination is no longer first Assembly can provide 'pseudoinstructions' e.g., move $t0, $t1 exists only in Assembly would be implemented using add $t0,$t1,$zero When considering performance you should count real instructions 52

53 Επισκόπηση MIPS για διατάξεις εντολών simple instructions, all 32 bits wide very structured, no unnecessary baggage only three instruction formats R I J op rs rt rd shamt funct op rs rt 16 bit address op 26 bit address rely on compiler to achieve performance what are the compiler's goals? help compiler where we can 53

54 Διευθύνσεις για Branches και Jumps Εντολές: bne $t4,$t5,label Next instruction is at Label if $t4 $t5 beq $t4,$t5,label Next instruction is at Label if $t4 = $t5 j Label Next instruction is at Label Διατάξεις εντολών: I J op rs rt 16 bit address op 26 bit address Addresses in the above 2 instruction formats cannot be of 32 bits (max is 2 16 for I-type, 2 26 for J-type) Implies that no program can be larger of 2 16 bits or 2 26 bits How do we handle this with load and store instructions? 54

55 Διευθύνσεις για Branches και Jumps (συν.) Εντολές διακλάδωσης υπό συνθήκη : bne $t4,$t5,label Next instruction is at Label if $t4 $t5 beq $t4,$t5,label Next instruction is at Label if $t4=$t5 Διάταξη εντολής: I op rs rt 16 bit address Could specify a register to be added to the branch address (like in lw and sw) so that the branch instruction will calculate: PC = register + address in branch instruction This allows a program to be as large as 2 32 bits and still be able to use conditional branches This type of addressing is called relative addressing mode (actual branch address value is calculated relative to the contents of the register) most conditional branches are local (principle of locality), thus PC-relative addressing PC = PC + address in branch instruction 55

56 Διευθύνσεις για Branches και Jumps (συν.) Εντολή άλματος (jump): j Label # Next instruction is at Label jal Label # Call procedure Label Διάταξη εντολής: J op 26-bit address Pseudodirect addressing PC = high order bits of PC && address in jump instruction Jump instructions just use high order bits of PC address boundaries of 256 MB 56

57 Διευθύνσεις για Branches και Jumps (συν.) MIPS stretches the distance of the branch/jump addresses further: MIPS address is actually relative to the next instruction (PC+4) instead of the current instruction (PC) Addressing refers to number words (w) instead of number of bytes (b, where w = b*4) Thus, the branch / jump address can go 4 times further PC-relative addressing becomes: PC = (PC+4) + (address in branch instruction*4) Pseudodirect addressing becomes: PC = 4 MSBs of PC && (address in jump instruction*4) 57

58 Παράδειγμα Remember loop in pg. 74: while (save[i] == k) i++; Loop: sll $t1, $s3, 2 # $t1 = 4*I add $t1, $t1, $s6 # $t1 = address of save[i] lw $t0, 0($t1) # $t0 = save[i] bne $t0, $s5, Exit # go to Exit if save[i] k addi $s3, $s3, 1 # i++ j Loop # loop again Exit: # out of the loop Assembled instructions and their addresses

59 Παράδειγμα (συν.) PC-relative addressing for bne $t0, $s5, Exit PC = (PC+4 ) + (branch address*4) PC = ( ) + (2*4) = (address of Exit) Pseudodirect addressing for j Loop PC = (4 MSBs of PC) + (jump address*4) PC = (0000) 2 && (20000*4) 10 = (address of Loop) Assembled instructions and their addresses

60 Εναλλακτικός τρόπος για μακρινή διακλάδωση Let $s0 = $s1. Replace the instruction below by one or more instructions so as to offer greater branching distance beq $s0, $s1, L1 60

61 Εναλλακτικός τρόπος για μακρινή διακλάδωση Let $s0 = $s1. Replace the instruction below by one or more instructions so as to offer greater branching distance beq $s0, $s1, L1 Solution: bne j L2: $s0, $s1, L2 L1 Can anyone explain? 61

62 Συνοπτικά: MIPS operands Name Example Comments $s0-$s7, $t0-$t9, $zero, Fast locations for data. In MIPS, data must be in registers to perform 32 registers $a0-$a3, $v0-$v1, $gp, arithmetic. MIPS register $zero always equals 0. Register $at is $fp, $sp, $ra, $at reserved for the assembler to handle large constants. Memory[0], Accessed only by data transfer instructions. MIPS uses byte addresses, so 2 30 memory Memory[4],..., sequential words differ by 4. Memory holds data structures, such as arrays, words Memory[ ] and spilled registers, such as those saved on procedure calls. MIPS assembly language Category Instruction Example Meaning Comments add add $s1, $s2, $s3 $s1 = $s2 + $s3 Three operands; data in registers Arithmetic subtract sub $s1, $s2, $s3 $s1 = $s2 - $s3 Three operands; data in registers add immediate addi $s1, $s2, 100 $s1 = $s Used to add constants load word lw $s1, 100($s2) $s1 = Memory[$s ] Word from memory to register store word sw $s1, 100($s2) Memory[$s ] = $s1 Word from register to memory Data transfer load byte lb $s1, 100($s2) $s1 = Memory[$s ] Byte from memory to register store byte sb $s1, 100($s2) Memory[$s ] = $s1 Byte from register to memory load upper immediate lui $s1, 100 $s1 = 100 * 2 16 Loads constant in upper 16 bits branch on equal beq $s1, $s2, 25 if ($s1 == $s2) go to PC branch on not equal bne $s1, $s2, 25 if ($s1!= $s2) go to Conditional PC branch set on less than slt $s1, $s2, $s3 if ($s2 < $s3) $s1 = 1; else $s1 = 0 Equal test; PC-relative branch Not equal test; PC-relative Compare less than; for beq, bne set less than immediate slti $s1, $s2, 100 if ( $s2 < 100) $s1 = 1; else $s1 = 0 Compare less than constant jump j 2500 go to Jump to target address Uncondi- jump register jr $ra go to $ra For switch, procedure return tional jump jump and link jal 2500 $ra = PC + 4; go to For procedure call 62

63 Τρόποι Καθορισμού Διεύθυνσης (Συνοπτικά): 1. Immediate addressing op rs rt Immediate 2. Register addressing op rs rt rd... funct Registers Register 3. Base addressing op rs rt Address Memory Register + Byte Halfword Word 4. PC-relative addressing op rs rt Address Memory PC + Word 5. Pseudodirect addressing op Address Memory PC Word 63

64 Μετάφραση και Εκτέλεση Προγράμματος (x.c x.c) (Unix files Dos files) Μεταγλωττιστής (x.s x.asm) (x.o x.obj) Συμβολομεταφραστής (x.a,x.so x.lib, x.dll) Συνδετικός Συντάκτης (a.out x.exe) Φορτωτής 64

65 Μεταγλωττιστής (Compiler) Transforms high-level language to assembly code A very complex program (usually a topic of study in a senior-level course, considered as one of the most difficult courses!) 65

66 Συμβολομεταφραστής (Assembler) Interface between the software and hardware of a computer Can use pseudoinstructions, recall: move add with $zero blt slt, bne mult sll MIPS assemblers use hexadecimal numbers 66

67 Συμβολομεταφραστής (συν.) Object file contains (Unix): 1. Header: specifies size/position of other parts 2. Text segment: contains machine code 3. Static data segment: program static data 4. Relocation information: identifies instruction/data words depending on absolute addresses 5. Symbol table: matches names of labels with word addresses in memory 6. Debugging information: description of how modules were compiled in order to be able to associate machine language with C commands. Used for program debugging. 67

68 Συνδετικός Συντάκτης (Linker or Link Editor) Combines independently assembled machine language programs to give the final executable code Allows usage of predefined/pre-assembled libraries Resolves all undefined labels Uses reallocation info and symbol table parts of object file Determines absolute memory location for each module (see more in textbook example, pp ) 68

69 Φορτωτής (Loader) Places executable program (machine code with absolute addressing) in main memory Must find address space large enough to fit program Copies data from disk to memory Copies program parameters onto the stack Initializes machine registers and sets the stack pointer Jumps to starting routine 69

70 Στατικές και Δυναμικές Βιβλιοθήκες (Static vs. Dynamic Libraries) Static Libraries are linked and loaded before the program is run Faster execution New versions of libraries must be re-linked, re-loaded Requires more storage (entire library is loaded) Dynamic Library routines are NOT linked or loaded UNTIL program IS run Slower execution New versions are supported transparently Reduced program storage Lazy procedure linkage: link a routine only after it is called so that unused routines are not linked/loaded 70

71 Άλλες Αρχιτεκτονικές (ISAs) Design alternative: provide more powerful operations goal is to reduce number of instructions executed to perform the desired task danger is a slower cycle time and/or a higher CPI (CPI=Clock cycles Per Instruction) The path toward operation complexity is thus fraught with peril. To avoid these problems, designers have moved toward simpler instructions We will look (briefly) at Intel IA-32 71

72 Intel IA : The Intel 8086 is announced (16 bit architecture), extension off 8080 (8-bit architecture. Not general-purpose register architecture. 1980: The 8087 floating point co-processor is added (add 60 fp instructions) 1982: The increases address space to 24 bits, +instructions 1985: The extends to 32 bits, new addressing modes general purpose register machine : The 80486, Pentium, Pentium Pro add a few instructions (mostly designed for higher performance) 1997: 57 new MMX (Multi Media extension) instructions are added, Pentium II 1999: The Pentium III added another 70 instructions (SSE=Streaming SIMD), added 8 separate registers of 128-bits 2001: Another 144 instructions (SSE2), Pentium : AMD extends the architecture to increase address space to 64 bits, widens all registers to 64 bits and other changes (AMD64) 2004: Intel capitulates and embraces AMD64 (calls it EM64T) and adds more media extensions This history illustrates the impact of the golden handcuffs of compatibility (keep extending architecture for software s sake) adding new features as someone might add clothing to a packed bag an architecture that is difficult to explain and impossible to love 72

73 IA-32 - Συνοπτικά Complexity: Instructions vary from 1 to 17 bytes long one operand must act as both a source and destination one operand can come from memory complex addressing modes e.g., base or scaled index with 8 or 32 bit displacement Saving grace: the most frequently used instructions are not too difficult to build compilers avoid the portions of the architecture that are slow what the 80x86 lacks in style is made up in quantity, making it beautiful from the right perspective 73

74 IA-32: Καταχωρητές και Τρόπος Καθορισμού Διεύθυνσης Δεδομένων Registers in the 32-bit subset that originated with Name 31 0 Use EAX ECX GPR 0 GPR 1 EDX GPR 2 EBX ESP EBP ESI EDI GPR 3 GPR 4 GPR 5 GPR 6 GPR 7 CS SS DS ES FS GS Code segment pointer Stack segment pointer (top of stack) Data segment pointer 0 Data segment pointer 1 Data segment pointer 2 Data segment pointer 3 EIP EFLAGS Instruction pointer (PC) Condition codes 74

75 IA-32 Περιορισμοί Καταχωρητών Registers are not really general purpose note the restrictions below 75

76 IA-32 Τυπικές Εντολές Four major types of integer instructions: Data movement including move, push, pop Arithmetic and logical (destination register or memory) Control flow (use of condition codes / flags ) String instructions, including string move and string compare 76

77 IA-32 Διατάξεις Εντολών Typical formats: (notice the different lengths) a. JE EIP + displacement JE Condition Displacement b. CALL 8 32 CALL Offset c. MOV EBX, [EDI + 45] MOV d w r/m Postbyte Displacement d. PUSH ESI 5 3 PUSH Reg e. ADD EAX, # ADD Reg w Immediate f. TEST EDX, # TEST w Postbyte Immediate 77

78 Βασικά συμπεράσματα 2 ου Κεφαλαίου Instruction complexity is only one variable lower instruction count vs. higher CPI / lower clock rate Design Principles: simplicity favors regularity smaller is faster good design demands compromise make the common case fast Instruction set architecture a very important abstraction indeed! 78

79 Άλλα σημαντικά θέματα Compiler Optimization Arrays vs. Pointers in High-level languages and their impact in Assembly Larger/Complete high-level language to machine code examples All of these topics will be covered in more detail during the Laboratory. 79