First International Computer,Inc Protable Computer Group HW Department

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1 irst International omputer,inc Protable omputer roup W epartment oard name : Mother oard chematic. chematic Page escription : Project : LMR. PI & IRQ & M escription : Version : 0. Initial ate : March, 00. lock iagram :. Nat name escription :. oard tack up escription :. chematic modify Item and istory :. power on & off & equence :. Layout uideline :. switch setting Manager ign by: rawing by : RRY_UN Total confirm by: _TO LN ircuit check by: udio ircuit check by: irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

2 . chematic Page escription : LM chematic Ver : 0... chematic Page escription. lock iagram. NNOTTION. chematic Modify. Timing iagram. R Layout uideline. anias eleron(/). anias eleron(/) 0. POWR (PU OR). Thermal / VR_PWR / RT. lock enerator. lock uffer. VN00 (/). VN00 (/). VN00 (/). VN00 (/). R O-IMM. R O-IMM0 0. VT LV Transmitter. L onnector. RT onnector. VT (/)..P. Out/ PI / udio NN. VT (/). R PWR. VT (/)..V/,./.VM/. Power ood & an ontroller. VM / VM. PI. VP/.VM. PI ardu ontroller 0. V / V / PMU/V. RU POWR W./NN. POW-ON ontroller 0. MINI PI. IN / attery NN. VT0L PY. harge ircuit / IN. U NN. Inverter ontroller. -T / -ROM NN. udio board. P-T NN. Update list. LP PMU0. LP K MX. INT K / P onnector. M onnector. IP witch & L 0. irm Ware ub / LI witch. Reset ircuit. OVP / RW. L udio odec. MT0 udio mplifier. PI & IRQ & M escription : IL PIINT IRQ IRQ IRQ IRQ IP IP UMTR RQ RQ0 / NT0 RQ / NT RQ / NT RQ / NT RQ / NT Mini PI(Wireless LN) ardus MiniPI/N MiniPI/ardus MiniPI IP MiniPI ardus Mini PI(Wireless LN) IRQ hannel IRQ0 IRQ IRQ IRQ IRQ IRQ IRQ IRQ IRQ IRQ IRQ0 IRQ IRQ IRQ IRQ IRQ esciption ystem timer Keyboard (asacde) LN / MOM erial Port UIO / V / U LOPPY IK LPT RT PI (isable by default) IR (MOM/LN) ardbus P/ mouse PU ROM M hannel M0 evice IR M P M LOPPY IK M UIO M (ascade) M Unused M Unused M Unused (disable by default) (MOM / LN) irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

3 . lock iagram : LK I0 P IN P V/V P0 RT L Thermal ensor P P PMUV/V P0 V/V P R 0.VM P VP/.VM P attery charger T ON MT RJ- P VM/VM P.V/M P Over Voltage Protect P P attery elect P P attery Voltage sense P P LN Phy VT0L U, VT LV Tx U.0 udio XT board Mini PI I- P P0 P P0 MII U U0, P PMI TP 0 (P) it PI U TI0R (common TI0) P P Intel eleron-m Processor VI VN00 ost us P~P VT P~P P, ub Interface LP U K/ TRL LP MX INT K/ P PMI LOT0 Mem us I U -T P-T P P P ROM P -Link P P P PU OR P0 PU VP P R 00/ INTR L ROM ( /W ub) M N NN P RT P RT P P,P P0 ' O L P M NN P LP PMU0 P udio MP PON Mic IN LK uffer R Pull up LI/IP W MIN W NN P udio XT board L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- P P,P P0, P irst International omputer, Inc. LMR < VI VN00 + VTR> ize ocument Number Rev <> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

4 . Nat name escription :.oard tack up escription Voltage Rails IN PMUV PMUV V V V V VM VM Vcore_PU Primary system power supply.0v always on power rail by LT or IN.V always on power rail by LT or IN.0V always on power rail by ON or PU0.V always on power rail by ON or PU0.V power rail.0v power rail.v switched power rail.0v switched power rail ore Voltage for PU P Layers Layer Layer Layer Layer Layer Layer omponent ide, Microstrip signal Layer Power Plane tripline Layer(TL,LOK,R) tripline Layer(nalog,LV,other) round Plane older ide,microstrip signal Layer VP.VM R_0.VM.VM.V.V.V.0V for TL+ Termination Voltage.V for PU PLL Voltage 0.V R Termination Voltage.V switched power rail.v power rail.v always on power rail.v power rail for R Part Naming onventions N L Q R RP U Y = = = = = = = = = = apacitor onnector iode use Inductor Transistor Resistor Resistor Pack rbitrary Logic evice rystal and Osc Net Name uffix 0 = ctive Low signal ignal onditioning = _Q_ = _L_ = amped (by a resistor) Isolated (by a Q-switch) iltered (by an inductor or bead) irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

5 .chematic modify Item and istory : irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

6 . power on & off & equence : Power On equencing Timing iagram VI VR_ON Tsft_star_vcc Vboot Vid Vcc-core Tboot Tboot-vid-tr PU_UP Tcpu_up Vccp Vccp_UP Tvccp_up Vccgmch MPWR Tgmch_pwrgd LK_NL# IMVP_PWR Tcpu_pwrgd TTRY ONLY POWR ON TIMIN POWW0 PMUV/PMUV UPN N RUM TIMIN POWW0 ON V MINW0_I To I PMUV/PMUV ON V PM_RMRT0 PM_LP_0 To I_M rom I_M PM_RTRT0 PM_LP_0/0/0 PU0 UTT_0 VM,V PM_PWROK To I rom I rom I_0 rom I_0 PM_LP_0/0 PU0 UTT_0 V VM PM_PWROK Y_PWROK VRON_VP rom I_M rom I_0 rom I_0.V N R_PWR Y_PWROK VP,.VM VRON_VP VP/.VM VOR_ON VOR_ON VR_ON VR_ON VOR_PU VOR_PU K0_PWR0 To clock generator To OM and I K0_PWR0 PM_VT To clock enerator ToI and OM PM_VT PU_PWR PI_RT0 TL+_PURT0 rom I to PU To OM/other PI device PU_PWROO PI_RT0 TL+_PURT0 rom I to PU To OM/other PI device rom OM to PU rom OM to PU irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

7 . Layout uideline : Montara-M R Layout uidelines Note that all length matching formulas are based on M die-pad to O-IMM pin total length roup locks ata ontrol ommand P R ignal roups eedback ignal Name K[:0] K#[:0] Q[:0] Q[:0] M[:0] K[:0] #[:0] M[:,:0] [:0] R# # W# M[,,,] M[,,,] RVNOUT# RVNIN# lock ignals Topologies and Routing uidelines M Pin P Package Length Range L Min:0." Max:.0" Length Matching ormulas ignal roup Minimum Length Maximum Length ontrol to lock ommand to lock P to lock trobe to lock lock -.0" lock -.0" lock -.0" lock -.0" lock + 0." lock +.0" lock + 0." lock + 0." ata to trobe trobe - mils trobe + mils O-IMM P mil trace, mil pair space lock length tolerenve within the pair : +/- 0 mil lock to lock Length Matching : +/- mils Minimum Pair to Pair pacing : 0 mils Minimum pacing to other ignals : 0 mils LOK LKPU[..0] LKN[..0] LKITP[..0] MLK_I MLK_M PLK_TI PLKI PLK PLK PLKU0 PLKOP PLKW PLKIO PLKLN MLK_IO MLK_I MLK_ MLK_I MLK_ LNT " ~ "."~.0" TR / P NOT.ifferentials pairs with the same length / 0 mils (within 0 mil) ( mil space.pu & N trace between + & - ) mismatch within 0 mil." ~.0 " / 0 mils MX :."."~.0"." ~." / 0 mils / 0 mils / 0 mils * MLK_I & PLK_M PLK_TI Length mismatch within 00 mils.making PI length with minimum various.max skew = ns ata ignals Topologies and Routing uidelines M Pin P Package Length Range L L L L O-IMM0 P O-IMM P ohm % Minimun pacing to Trace Width Ratio, Q/M : to Q : to Minimum pacing to other ignals : 0 mils Trace Length L : Min 0.", Max." L Max 0." L Min 0.", Max.0" L : Max.0 " Length Matching : Q to K/K# Q OIMM0 P+L+L Q, OIMM P+L+L+L Min : lock -.0", Max : lock + 0." Q/M to Q : +/- mils Q/M to Q Mapping ignal Q[..0] Q[..] Q[..] Q[..] Q[..] Q[..0] Q[..] Q[..] Q[..] Mask M[0] M[] M[] M[] M[] M[] M[] M[] M[] Relative To Q[0] Q[] Q[] Q[] Q[] Q[] Q[] Q[] Q[] Mismatching +/- mil +/- mil +/- mil +/- mil +/- mil +/- mil +/- mil +/- mil +/- mil ontrol ignals Topologies and Routing uidelines M Pin P Package Length Range L O-IMM0, P ommand ignals Topologies and Routing uidelines M Pin P Package Length Range L L L 0 ohm % L L O-IMM P ohm % ohm % Trace spacing to trace width ratio : to Minimum pacing to other ignals : 0 mils Trace Length L : Min 0.", Max." L : Max.0" Length Matching : TRL(P+L) to K/K# Min : lock -.0", Max : lock + 0." Trace spacing to trace width ratio : to Minimum pacing to other ignals : 0 mils Trace Length L : Min 0.", Max.0" L Max.0" L : Max.0" L+L : Max.0" L : Max.0" Length Matching : M to K/K# M OIMM0 P+L+L M, OIMM P+L+L Min : lock -.0", Max : lock +.0" P ignals Topologies and Routing uidelines M Pin P Package Length Range L O-IMM0, P L ohm % Trace spacing to trace width ratio : to Minimum pacing to other ignals : 0 mils Trace Length L : Min 0.", Max." L : Max.0" Length Matching : P(P+L) to K/K# Min : lock -.0", Max : lock + 0." irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- O-IMM0 P LMR < VI VN00 + VTR> ize ocument Number Rev <> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

8 TL+_0[..] TL+_0[..0],,,0, VP TL+_0[..] TL+_0[..0] #, NR#, PRI#, R0#, Y#, R#, PWR#, RY#, IT#, ITM#, LOK#, U- R[..0]#, TRY#, RT#. Transmission Line Type Total Trace Length Normal Impedance pacing (mils) TL+_0 P _0M0 R 0Ω % /W MT00 LR TL+_0 # U TL+_00 _INN0 R 0Ω % /W MT00 LR trip-line(int. Layer).0 ~. inch +/-0% & (Int. Layer) TL+_0 V # 0# TL+_0 _INTR R 0Ω % /W MT00 LR Micro-strip(xt. Layer) & 0(xt. Layer) TL+_0 R # # TL+_0 _NMI R 0Ω % /W MT00 LR TL+_0 # # V TL+_0 _MI0 R 0Ω % /W MT00 LR TL+_0 W # # TL+_0 _TPLK0 R 0Ω % /W MT00 LR TL+_0 # # T TL+_0 _PULP0 R 0Ω % /W MT00 LR ource ynchronous T : TL+_00 W # # TL+_0 PU_PLP0 R 0Ω % /W MT00 LR TL+_0 Y 0# # 0 TL+_0 _INIT0 R 0Ω % /W MT00 LR T#[..0], INV#[..0], TN#[..0], TP#[..0] TL+_0 # # Y 0 TL+_0 TL+_0 U # # TL+_0 Transmission Line Type Total Trace Length Normal Impedance pacing (mils) TL+_0 # # TL+_00 PM00 R 0Ω % /W MT00 LR TL+_0 Y # 0# TL+_0 PM0 R 0Ω % /W MT00 LR trip-line.0 ~. inch +/-0% & TL+_0 # # TL+_0 PM0 R 0Ω % /W MT00 LR # # TL+_0 PM0 R 0Ω % /W MT00 LR # TL+_0 # ignals Name ignals Matching trobes associated trobe Matching TL+_0 TL+_T00 U T0# # with the group TL+_RQ00 R ITP_RT0 R 0Ω % /W MT00 LR TL+_INV00 T#[..0], INV0# +/- 00 mils TP0#,TN0# +/- mils TL+_RQ0 RQ0# INV0# P TL+_TN00 TL+_RQ0 T RQ# TN0# RR0 R Ω % /W MT00 LR TL+_TP00 T#[..], INV# +/- 00 mils TP#,TN# +/- mils TL+_RQ0 RQ# TP0# P PU_T_TRIP0 R Ω % /W MT00 LR TL+_RQ0 T RQ# TL+_PURT0 R Ω % /W MT00 LR RQ# T#[..], INV# +/- 00 mils TP#,TN# +/- mils TL+_0 TL+_RQ0[..0] # TL+_0 TL+_R00 R 0Ω % /W MT00 LR T#[..], INV# +/- 00 mils TP#,TN# +/- mils TL+_0 # L TL+_0 TL+_0 # # M TL+_0 TL+_0 # # TL+_00 TL+_00 # 0# TL+_0 TL+_0 0# # TL+_0 ource ynchronous R : TL+_0 # # J TL+_0 losed to PU ddress#[..], RQ#[..0], T#[..0] TL+_0 # # M TL+_0 TL+_0 # # J TL+_0 _NMI 0 0P V 0% MT00 XR(NU) Transmission Line Type Total Trace Length Normal Impedance pacing (mils) TL+_0 # # L TL+_0 TL+_0 # # N TL+_0 TL+_PURT0 0P V 0% MT00 XR(NU) trip-line.0 ~. inch +/-0% & TL+_0 # # M TL+_0 TL+_0 # # TL+_0 _MI0 0P V 0% MT00 XR(NU) TL+_0 # # N TL+_00 ignals Name ignals Matching trobes associated trobe Matching TL+_00 # 0# K TL+_0 _0M0 0P V 0% MT00 XR(NU) TL+_0 0# # with the group # J _INN0 0P V 0% MT00 XR(NU) INV# TL+_INV0 #[..], RQ#[..0] +/- 00 mils T0# +/- mils K TL+_TN0 TN# L _INTR 0P V 0% MT00 XR(NU) TL+_T0 T# TP# TL+_TP0 #[.. +/- 00 mils T# +/- mils Y TL+_0 # Topology : IRR#, RR#, TRMTRIP# TL+_0 TL+_0 N # # T TL+_0 VP L L L R Rtt Transmission Line L # U TL+_0 TL+_NR0 NR# # PU Receiver V TL+_0 # 0." - " 0" -.0" 0" -.0" +/-% +/-% Micro-strip R TL+_0 L Rtt # TL+_0 TL+_R00 N R R0# # L R L 0." - " 0" -.0" 0" -.0" +/-% +/-% trip-line R TL+_0 _TPLK0 0P V 0% MT00 XR(NU) # TL+_00 0# L U TL+_0 _PULP0 0P V 0% MT00 XR(NU) TL+_R0 R# # V TL+_0 TL+_RY0 RY# # Topology : PROOT#.V TL+_0 PU_PLP0 TL+_Y0 M U 0P V 0% MT00 XR(NU) Y# # V TL+_0 # Rs : 0 +/-% Y TL+_0 _INIT0 0P V 0% MT00 XR(NU) # K TL+_0 TL+_IT0 R :.K +/-% K IT# # Y TL+_0 TL+_ITM0 ITM# # VP R PU R : 0 +/-% R PU_IRR0_O T,,,0, VP TL+_INV0 Rtt R L.Ω % /W MT00 LR INV# W IRR# TN# TL+_TN0 R0. Modify L L L L Rtt Transmission Line W,0 _INIT0 INIT# TP# TL+_TP0 L L L 0." - " 0" -.0" 0" -.0" 0." - " +/-% Micro-strip TL+_LOK0 J LOK# Rs TL+_0 # 0." - " 0" -.0" 0" -.0" 0." - " +/-% trip-line TL+_0 # TL+_00 TL+_R0[..0] TL+_R00 0# 0 TL+_0 TL+_R0 R0# # K TL+_0 TL+_R0 L R# # TL+_0 R# # Topology : PWROO TL+_0 # M TL+_0 0,,,,,,,0,,,,,,,,,0,,,,0,,,,,, VM TL+_TRY0 TRY# # VP L L Rtt Transmission Line TL+_0 # PU TL+_0 # 0." - " 0" -.0" 0 +/-% Micro-strip 0 TL+_0,,,0, VP # Rtt TL+_0 # L L 0." - " 0" -.0" 0 +/-% trip-line TL+_00 0# TL+_0 TL+_PURT0 RT# # TL+_0 R # TL+_0 R R # Topology : PLP# 0KΩ % /W MT00 LR,,,0, VP 0 0KΩ % /W MT00 LR INV# TL+_INV0 L L Transmission Line 0Ω % /0W MT00 LR TN# TL+_TN0 PU N PU_PWROO PWROO TP# TL+_TP0 0." - " 0." -." Micro-strip L L 0." - " 0." -." trip-line _0M0 RR0 RR0_ RR0 0M# PM00 Q RR# PM0# _INN0 PM0 TRN NPN MMT MT OT- IRIL INN# PM# PM0 PM# PM0 PM# Topology : LINT, LINT0, 0M#, INN#, LP#, MI#, TPLK# _INTR _NMI LINT0 LINT L Transmission Line _MI0 ITP_RT0 PU _TPLK0 MI# R# TPLK# 0." - " Micro-strip _PULP0 PU_PLP0 J TL+_PRI0 PRI# TLR0 VP,,,0, TLR TL+_PWR0 PWR# TLR R0 TLR KΩ % /W MT00 LR 0.u V 0% 00 XR(NU) TRM Topology : INIT# driven I.V TRM TRM TRM Rs : 0 +/-% PU_T_TRIP0 TRMTRIP# RV0,,,0, VP W R :.K +/-% R Ω % /W MT00 LR PROOT# RV RV PM_PI0 0 R RV PU R : 0 +/-% R0 K % /W 00(NU) PU_LK R L LK0 RV PU_LK0 LK RV L L + L L L Transmission Line Place within " IMVP POWR TTU INITOR L L 0." - " 0" -.0" 0." -.0" Micro-strip Place " within PU ITP_LK0 ITP_LK Rs R K % /W 00(NU) 0." - " 0" -.0" 0." -.0" trip-line TT R K % /W 00(NU) R 0Ω % /W MT00 LR TK TT,,,0, VP R. % /W 00(NU) TI R.Ω % /0W MT00 LR TO TM P R0.Ω % /W MT00 LR TRT# OMP0 Topology : PU RT# P R0.Ω % /0W MT00 LR R. % /W 00(NU) OMP 0 R0.Ω % /W MT00 LR L R. % /W 00(NU) 0 PRY# OMP R0.Ω % /0W MT00 LR PRQ# OMP PU L L + L L Rs Rtt M Less VP.0" -.0".0" max 0." max. +/-%. +/-% than R0 KT PU PZ0--0 MT PIN OXONN 0." Rtt "anias Only" L L R K % /W 00(NU),,,0, VP ITP R Rs irst International omputer, Inc. K % /W 00(NU) L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- R.Ω % /0W MT00 LR 0Ω % /W MT00 LR LP# PLP# ddress roup0 ddress roup ontrol ignal Legacy PU Thermal ost LK ITP00 Port ata roup0 ata roup ata roup ata roup >0mil anias processor 0 anias processor or later TLR = / VP Max Length : 0." TT K No tuff TT K No tuff R0 KΩ % /W MT00 LR R0. Modify ystem us ommon lock ignal Layout uide : L 0." - " trip-line LMR < VI VN00 + VTR> ize ocument Number Rev <PU /> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

9 0,, VOR_PU,,,0, VP U- R V0 V00 R V V0 0 R 月 V0 VP0 V V0 T V VP V V0 T V VP V V0 0 T V VP + 0 V V0 T V VP V V0 T V VP V V0 U V VP 0 V V0 U V VP V V0 U V VP V0 V0 U V VP V V V V0 VP0 K V V V V VP L V V V V VP V V L V 0 V VP M V V V V VP V V M W V VP N V V W V VP N V V W V VP V V P 0 W V VP P V0 V0 W V VP V V J R Y J V0 VP0 R V V Y K V VP T V V Y V VP V V U T Y V V VP U V V V VP V V V W V V V W V P V V V VQ0 V V Y W 0 Y V VQ V0 V0 V V V V0 V V V V V V V V 0 V V V V V V 月 V V V V V V V V0.VM,, V V 月 V V N 0 V0 V0 V V V V 0 V0 V V V V 0 V V V 0 V V V 0 V V V V V 0 V V V Place each V V V V V V pair(0.ux, V V0 V0 V 0ux) per pin. V V V0 V V 0 V V V V V V V V V V V V 0 V V V V V V V V V V V0 V0 V VI0 VR_VI0 0 V V VR_VI 0 V0 VI V V VR_VI 0 V VI V V V VI VR_VI 0 V V VR_VI 0 月 V VI V V V VI VR_VI 0 V V V V V 0 V V V V V V J V J V0 V0 V R0 V V J V0 Vsense. % /W 00(NU) J V V V J V V 0 V V K KT PU PZ0--0 MT PIN OXONN K V V V V K "anias Only" K V V K V V 0 V V L L V0 V0 V V L L V V M V V V V M M V V V V M M V V N V V V V N N V0 V0 V V N N V P V V P 月 P V R0 V Vsense P. % /W 00(NU) R V R V V T0u.V ±0% MT R=mΩ T0VMRT00 KMT LR T0u.V ±0% MT R=mΩ T0VMRT00 KMT LR T0u.V ±0% MT R=mΩ T0VMRT00 KMT LR T0u.V ±0% MT R=mΩ T0VMRT00 KMT LR.u 0V ±0% MT00 XR 0XRKT TK LR.u 0V ±0% MT00 XR 0XRKT TK LR.u 0V ±0% MT00 XR 0XRKT TK LR.u 0V ±0% MT00 XR 0XRKT TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR 0 0u.V 0% MT00 XR 0XR0J0K TK LR.u 0V ±0% MT00 XR 0XRKT TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR 0.u 0V ±0% MT00 XR 0XRKT TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR.u 0V ±0% MT00 XR 0XRKT TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR.u 0V ±0% MT00 XR 0XRKT TK LR 0 0u.V 0% MT00 XR 0XR0J0K TK LR.u 0V ±0% MT00 XR 0XRKT TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR.u 0V ±0% MT00 XR 0XRKT TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR.u 0V ±0% MT00 XR 0XRKT TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR 0 0u.V 0% MT00 XR 0XR0J0K TK LR.u 0V ±0% MT00 XR 0XRKT TK LR.u 0V ±0% MT00 XR 0XRKT TK LR.u 0V ±0% MT00 XR 0XRKT TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR 0u.V 0% MT00 XR 0XR0J0K TK LR 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.0u V 0% MT00 XR LR 0u 0V ±% MT00 X LMK0K TIYO 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.0u V 0% MT00 XR LR 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0u 0V ±% MT00 X LMK0K TIYO 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.0u V 0% MT00 XR LR 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0u 0V ±% MT00 X LMK0K TIYO 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.0u V 0% MT00 XR LR 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0u 0V ±% MT00 X LMK0K TIYO 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 00u V ±0% mω =.mm MT V 0V0M00 K (K-P) LR U- 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR u V ±0% M00 XR LR 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR 0 0.u V ±0% M00 XR LR 月 放原 的位置 KT PU PZ0--0 MT PIN OXONN "anias Only" One round One Via irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <PU /> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

10 , VR_POK,,,0,,, R IN 0Ω % /0W MT00 LR VOR_PU VOR_ R0. Modify 月 0 日,,,,,,,0,,,,,,,,,0,,,,0,,,,,, R0 V R00 LR VOR_, 0Ω % /0W MT00 LR VOR_ VOR_ LK_N R KΩ % /0W MT00 LR VRON_VP VRPLP 0.U 0V 0% MT00 XR(NU) PM_PI0 VR_VI0 VR_VI VR_VI VR_VI VR_VI VR_VI VM 00KΩ % /0W MT00 LR R 月 月 0 R R.KΩ % /0W MT00 LR R 月 0 月 0,,,,0,,,,,,,,,,.KΩ % /0W MT00 LR R0 R0 R0 R0 R00 R R R R R 00p 0V 0% MT00 XR LR R 0Ω % /0W MT00 LR 00KΩ % /W MT00 LR VOR_.KΩ % /W MT00 LR R 0.0u V 0% MT00 XR LR 0u V ±0% MT0 XR XR0KT TK Lead-ree PWR 0 % /W 00 PWR 0 % /W 00 PWR 0 % /W 00 PWR 0 % /W 00 PWR 0 % /W 00 PWR 0 % /W 00 PWR 0 % /W 00 PWR 0 % /W 00 PWR 0 % /W 00.KΩ % /W MT00 LR 0 0u V ±0% MT0 XR XR0KT TK Lead-ree VOR_ 月 0 日 R 0u V ±0% MT0 XR XR0KT TK Lead-ree VM 0 0 0u V ±0% MT0 XR XR0KT TK Lead-ree 月 0 R VOR_ 0Ω % /0W MT00 LR VOR_ 0.u V 0% MT00 XR LR 0Ω % /0W MT00 LR 0 u 0V 0% MT00 XR 0XR0K TK LR U V OUT V T N N RN N# VI0 VI VI VI VI VI POO + OMP VT IN P U OOT VP L VP N N N N N N VN RV TV OT 0 OT V LNR-I ILV-T TOP PIN INTRIL LR 0 VOR_ 0.0u 0V 0% MT00 XR LR u V 0% 0 XR 月 0 日 R IO TKY -0 0V NMKO P N 0 % /W 00(NU) VOR_ 月 R.KΩ 0.% /0W MT00 LR 0 u 0V ±0% M00 XR TIYO LR 0p 0V ±0% MT00 XR 00K00T WLIN Lead-ree 0.U 0V 0% MT00 XR Lead-ree 月 改 月 0 日 月 0 日 Q TR M-T-N IRR0ZPb 0V TO-(-Pak) PIN IR LR >0mil 月 0 日 >0mil 0.U 0V 0% MT00 XR Lead-ree 月 0 R 0Ω % /0W MT00 LR R 0.u V ±0% MT00 XR JM PNONI LR KΩ % /0W MT00 LR 00p 0V 0% 00 XR R 00KΩ % /0W MT00 LR VOR_ R0 KΩ % /W MT00 LR >0mil 月 0 日 Q 月 0 M-T-N IRR0ZPb 0V TO-(-PK) PIN IR LR Q M-T-N IRR0ZPb 0V TO-(-PK) PIN IR LR P N oost Voltage.V eeper leep Voltage 0.V IO TKY M0-L 0V O-(M) PIN O LR 月 0 L 月 0 日 0 VOR_PU or anias eleren PU 0.u±0% MT.*.*.mm MPL-R LT 000p 0V 0% 00 XR(NU) MI / modify 00 P N 000p 0V 0% 00 XR 月 OP etting.iocset=.v/(.k+.k+k)=0u.isen=0u/(/)/0.=.u.isen*rsence=iocp*rds_on (Lowside) Iocp=(Isen*Rsence)/Rds_on (Lowside) VOR_PU,, IO MMZ-.V 0m 00mW O- IO Lead-ree TRN M-T-N N00_NL 0V m OT- PIN IRIL LR Q TRN M-T-N N00_NL 0V m OT- PIN IRIL LR R 0KΩ % /0W MT00 LR Q R0 0Ω % /0W MT00 LR VOR_ON R lose R VI VI VOR_ PWR 0 % /W 00 月 0 IMVP IV Load line slope : -mv/ Vdroop : *mv/=mv Idroop : mv/.0k=.u.u/0./0. =.u Rds(on) *Io = Isen * Rsen (m/)*=.u*rsen R =.K irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <Vcore> 0. ate: riday, July 0, 00 heet 0 of P created with pdfactory trial version

11 TRML NOR Q0 VM TRN T-P V0P V 0. OT- IRIL R0 KΩ % /W MT00 LR 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree Q N_ON TRN NPN TU(UMT) 0V 00m ROM R KΩ % /W MT00 LR V VM VM IO TKY 0V 0.OT-.*.mm NMKO from OVP & ON_OTOWN R, OT_OWN0 / / 0mil 0 0.u V 0-0% 00 YV(NU) 0Ω % /W MT00 LR / L 0mil 0mil ULK LK,,,,,,,,,0, V R UTT_0,,,,,,,,,0 KΩ % /W MT00 LR R R 0K % /W 00(NU) 0K % /W 00(NU) 0K % /W 00(NU) R W 0 % /W 00, MLK_PMU R W 0 % /W 00, MT_PMU 0 p 0V 0% MT00 NPO Lead-ree(NU) p 0V 0% MT00 NPO Lead-ree(NU) R L0 0.u V 0-0% MT00 YV LR U LNR-I U OP-L PIN MT LR N Test V V 00MZ 0Ω % 00 M--00-0T KIN OR 0 TRM_T TRM# L LRT# XP XP R 0KΩ % /W MT00 LR XP R 0KΩ % /W MT00 LR TR 0MIL L 00MZ 00Ω % MT00 0K-0T0 ULL WILL 000p 0V 0% MT00 XR 000K00T WLIN Lead-ree u 0V 0% MT00 XR 0XR0K TK LR R PP 00p 0V 0% MT00 XR LR 00Ω % /0W MT00 LR 0.u V 0-0% MT00 YV LR V TRM Trace=0mil and together TRM /0 modify T request P N 00MZ 00Ω % MT00 0K-0T0 ULL WILL L N ON NTRY MT PIN P= ar away the RT,clock generator,memory bus,pi bus..s close PU as possible. 0 mil 0 mil ULK_ U R Ω % /W MT00 LR n ULK Place this TR closed to V hip. L-I NZPX -0 PIN IRIL LR R 0 % /W 00(NU) R RT ischarge ircuit,,0,,, PMUV 0Ω % /0W MT00 Lead-ree RT_V,,,,,0 PMUV VIN.u 0V +0-0%M00 YV TIYO LR U I -TU LO.V MT(NU) VOUT.u 0V +0-0%M00 YV TIYO LR 0.u V 0-0% 00 YV TTRY V R RT NN IO TKY 0V 0.0 OT-.0*.mm NMKO 0mil 0mil N R + 00Ω % /W MT00 LR - V0. 0mil 0mil 0.u V 0-0% 00 YV 0u 0V ±0% MT00 XR VXTVXR0K0T VX LR,,,,,,,,, V V 0,,,,0,,,,,,,,,, VM VM,,,,,0,,,,,0,,,, V V irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <Thermal / RT> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

12 OT lock LK lock LK lock lock Latout uideline LOK PU_LK[..0] M_LK[..0] ITP_LK[..0] LK_I LK_M LK_P LK_IPI LK_IOPI LK_WPI LNT " ~ "." ~.0 " MX :."." ~.0 " TR / P / 0 mils ( mil space between & 0) / 0 mils / 0 mils VM,0,,,,, NOT.VM,,, I_MT,,, I_MLK. ifferentials pairs with the same length (within 0 mil).pu & N trace mismatch within 0 mil Length mismatch within 00 mils Length same as LK lock Length mismatch within 00mils L 00MZ 00Ω % 00 M T KIN OR VM_LK 0u 0V +0-0% 0 YV >0mil 0 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0p 0V % MT00(NU) 0p 0V % MT00(NU) LK_N lock Package Length anais Processor Package Length mils Montara-M M Package Length mils PU ocket quivalent Length mils 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 0.0u XR LRV 0% MT00 XR LR 0.0u V 0% MT00 XR LR VM_LK 0 0.0u V 0% MT00 XR LR u 0V 0% MT00 XR 0XR0K TK LR L 00MZ 00Ω % 00 M T KIN OR 0p 0V ±0.p MT00 NPO LR 0p 0V % 00 NPO(NU) N_U_ N_U_ 0 0.KΩ % /W MT00 LR R 0 R % /W 00 I LOK I0L-T OP PIN I Lead-ree Y XTL.0MZ P X000 R 0 0p 0V ±0.p MT00 NPO LR U VPI VPI V V VV VPU VR V. T LK RTT VTT_PWR/P IR Mhz_0 Mhz_ X X R0/ R/0 MZ/ _MZ/L_ V_0 V_ V_ PI_0/ PI_/ PI_ MO/PILK0 PILK PILK PILK PILK PILK PILK PULKT0 PULK0 PULKT PULK PULKT_ITP/PI_TOP PULK_ITP/PU_TOP Under 00mil lock Layout :. lose to lock generator. Trace as short as possible and use mil. Place crystal within 00 mils of LK enerator 0 0 L_M N_U_ LK_MO PITP0 PUTP0 / MI change R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R0 Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R Ω % /0W MT00 LR R0 Ω % /0W MT00 LR R Ω % /0W MT00 LR PITP0 PUTP0 Under 00mil L_M Under 00mil Under 00mil / add R 0KΩ % /W MT00 LR(NU) R. % /W 00 R. % /W 00 R. % /W 00 R. % /W 00 LKM_ LKM_UI LKM_ LKM_ LKM_ LKM_N LKM_ LKM_P LKM_ LKM_IO LKM_ LKM_PI LKM_K LKM_W 0 LKM_ LKM_MINI 0 PU_LK PU_LK0 LKN LKN0 hielding mil space 0 mil space LK+ mil space mil space LK- mil space 0 mil space hielding mil space ( mil width for differential signals and shiekding) LKM_ p 0V ±0.p - TO + MT00 NPO LR LKM_UI p 0V ±0.p - TO + MT00 NPO LR PI lock LK lock LK_MINIPI LK_PI."~.0" LK_PMU0PI LK_PI LK_IO LK_I.0"~.0" LK_TV LK_I." ~." LK_M / 0 mils / 0 mils / 0 mils.making PI length with minimum various. Length Require LK-.". Length mismatch +/-.0". Length mismatch +/- 00 mils 0 PU P PI R M.M.M.M M.M.M.M M.M.M.M M.M.M.M M.M.M.M / Mount / LKM_ LKM_ LKM_ LKM_P LKM_N LKM_ LKM_IO LKM_ LKM_ LKM_PI 0 p 0V ±0.p - TO + MT00 NPO LR p 0V % MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR LKM_K p 0V ±0.p - TO + MT00 NPO LR LKM_W p 0V ±0.p - TO + MT00 NPO LR LKM_ p 0V ±0.p - TO + MT00 NPO LR hielding IPLKI, IPLKO hielding 0 mil space 0 mil space mil space mil space mil space VM_LK LKM_MINI PU_LK PU_LK0 LKN 0 p 0V ±0.p - TO + MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR p 0V ±0.p - TO + MT00 NPO LR LKN0 p 0V ±0.p - TO + MT00 NPO LR IPLKO,0,,,,,,0,,,,,,,,,0,,,,0,,,,,, R0.KΩ % /W MT00 LR R0 0KΩ % /W MT00 LR / MI change U0 LKIN MR ON# V V R0 R LKOUT VM L 00Mz 00Ω 00 0K-0T0 0mil R R.KΩ % /W MT00 LR.KΩ % /W MT00 LR 0.u V ±0% M00 XR LR 0.u V ±0% M00 XR LR MI requst / / add LK_MO R 0KΩ % /W MT00 LR(NU) 0 R R R R R0 R R R R R0 R VM 0KΩ % /0W MT00 LR 0K % /W 00(NU) 0K % /W 00(NU) 0K % /W 00(NU) 0K % /W 00(NU) 0K % /W 00(NU) 0KΩ % /0W MT00 LR 0KΩ % /0W MT00 LR 0KΩ % /0W MT00 LR 0KΩ % /0W MT00 LR 0KΩ % /0W MT00 LR I P00-0 O PIN PULOR,0,,,,,,0,,,,,,,,,0,,,,0,,,,,, VM 0.u V 0-0% MT00 YV LR VM R Ω % /W MT00 LR IPLKI IPLKI IPLKO p 0V +/-0.P 00 (NU) p 0V +/-0.P 00 (NU) irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <lock-en> 0. riday, July 0, 00 ate: heet of P created with pdfactory trial version

13 0 INPUT _OUT _IN RLK0 歐姆 0 歐姆 L: " WLKOU L:." 歐姆 0P L:L+L-L+." 0P L=LM+LM L: " VI VN00 IMM IMM,0,,,,,.VM.VM_LK R LOK UR RLK0# RLK U RLK# RLK RLK# _open 0 V./. V./. V./. V V RT0 R0 RT R RT R RT0 R0 RT R RT R R0 R R R R R Ω % /W MT00 LR Ω % /W MT00 LR Ω % /W MT00 LR Ω % /W MT00 LR Ω % /W MT00 LR Ω % /W MT00 LR M_LK_R0 M_LK_R00 M_LK_R M_LK_R0 M_LK_R M_LK_R0 0 歐姆 RLK RLK# RLK RLK# RLK RLK# _open R lock uffer L: ",,, I_MT,,, I_MLK LKO+ LKO- 0p 0V ±0.p 00 NPO(NU) 0p 0V ±0.p 00 NPO(NU) 0p 0V ±0.p 00 NPO(NU) 0p 0V ±0.p 00 NPO(NU) T LK U_INT U_IN R 0Ω % /0W MT00 LR RT R RT R RT R OUT_T OUT_ RT R I LOK-UR IPL-T OP PIN I LR 0 R R Ω % /W MT00 LR Ω % /W MT00 LR / MI /0 modify T request R Ω % /W MT00 LR p 0V % MT00 NPO LR LKI 0 0p 0V ±0.p MT00 NPO LR 0 0p 0V ±0.p MT00 NPO LR 0 0p 0V ±0.p MT00 NPO LR 0 0p 0V ±0.p MT00 NPO LR 0 0p 0V ±0.p MT00 NPO LR 0 0p 0V ±0.p MT00 NPO LR 0p 0V ±0.p MT00 NPO LR 0p 0V ±0.p MT00 NPO LR / MI M_LK_R M_LK_R0,,.VM L.VM_LK 0K-0T0 ULL WILL >0 mil 0.u V 0-0% MT00 YV LR 0.0u 0V +0-0% MT00 YV LR + T0u 0V ±0% MT R=.0Ω T0M00T KMT LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <clock buffer> 0. riday, July 0, 00 ate: heet of 0 P created with pdfactory trial version

14 0,,,0, VP TL+_0[..] TL+_RQ0[..0] TL+_0[..0] L L L L L M N P R T U TL+_0 Y TL+_0 V TL+_0 TL+_0 Y TL+_0 Y TL+_0 TL+_0 TL+_00 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 T TL+_0 R TL+_0 N TL+_00 N TL+_0 P TL+_0 P TL+_0 R TL+_0 N TL+_0 T TL+_0 P TL+_0 R TL+_0 N TL+_0 N TL+_00 R TL+_0 T VN00_NU U VN00_NT T TL+_T00 W T W TL+_T0 R T N TL+_0 M TL+_NR0 M TL+_PRI0 T TL+_R00 K TL+_Y0 M TL+_R0 U TL+_RY0 M TL+_IT0 L TL+_ITM0 U TL+_LOK0 L TL+_TRY0 M TL+_RQ00 TL+_RQ0[..0] W TL+_RQ0 V TL+_RQ0 V TL+_RQ0 W TL+_RQ0 V TL+_R00 TL+_R0[..0] L TL+_R0 M TL+_R0 K T0P T0N & P T P0 NR PRI RQ0 Y R RY IT ITM LOK TRY RQ0 RQ RQ RQ RQ R0 R R VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT OT PU INTR K K J K J J J J TL+_00 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_00 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_00 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_00 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_00 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_00 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_0 TL+_00 TL+_0 TL+_0 TL+_0,,,0, VP Place these parts near N. 月 0 as close as possible. 0u 0V ±0% MT00 XR T=.mm 0XR0KT TK LR 0u 0V ±0% MT00 XR T=.mm 0XR0KT TK LR 0u 0V ±0% MT00 XR T=.mm 0XR0KT TK LR 0u 0V ±0% MT00 XR T=.mm 0XR0KT TK LR 0u 0V ±0% MT00 XR T=.mm 0XR0KT TK LR 0u 0V ±0% MT00 XR T=.mm 0XR0KT TK LR 0u 0V ±0% MT00 XR T=.mm 0XR0KT TK LR 0 u 0V 0% MT00 XR 0XR0K TK LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR TL+_INV00 TL+_INV0 TL+_INV0 TL+_INV0 I0 I I I TP0 TN0 TP TN TL+_TP00 TL+_TN00 TL+_TP0 TL+_TN0 TL+_PURT0 PURT LKN LKN0 Y W LK+ LK- TP TN TL+_TP0 TL+_TN0 TLVR_N TLVR_N R V VR0 VR VR0 VR VR VR TP TN TL+_TP0 TL+_TN0 make sure?? L TLVR R0.Ω % /0W MT00 LR ROMP OMPVR 0MPVR VK K PWR K TL+_PWR0,,,0, VP,,,0, VP U I N VN00 PIN VI TLVR_N R. % /W 00 R 00Ω % /0W MT00 LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR TLVR_N R. % /W 00 R 00Ω % /0W MT00 LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR V V_LK V_LK > 0 mil 0.u V 0-0% MT00 YV LRL LMP0 VM,0,,,,,,0,,,,,,,,,0,,,,0,,,,,, V V_LK u 0V 0% MT00 XR 0XR0K TK LR 000p V +0-0% MT00 YV LR L LMP0,,,0, VP OMPVR R 00Ω % /0W MT00 LR R. % /W u V 0% MT00 XR LR Place these parts near N. as close as possible. nd place each capacitor per pin. irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <VN00 host> 0. riday, July 0, 00 ate: heet of 0 P created with pdfactory trial version

15 0.V_IMM,,,, R_.V, M_[..0] M_K0_R0 M_K_R0 M_K_R0 M_K_R0 M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ J J J J J J J J0 0 J J J0 J J 0 J J J J J J J M00 M0 M0 M0 M0 M0 M0 M0 M0 M0 M0 M M M M M M M M M M0 M M M M M M M M M M0 M M M M M M M M M M0 M M M M M M M M M M0 M M M M M M M M M M0 M M M K0 K K K V V/MM V V/MM W V/MM W V/MM W V/MM W V/MM W V/MM W V/MM W V/MM W V/MM W V/MM R RM INTR M00 M0 M0 M0 M0 M0 M0 M0 M0 M0 M0 M M M 0 R W 0 Q0 Q Q Q Q Q Q Q QM0 QM QM QM QM QM QM QM MOMP MMT J J J J 0 J 0 J J J J M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_0 M_ M_R M_ M_W M_Q_P0 M_Q_P M_Q_P M_Q_P M_Q_P M_Q_P M_Q_P M_Q_P M_QM0 M_QM M_QM M_QM M_QM M_QM M_QM M_QM MOMP MMT M_[..0], M_[..0], M_R, M_, M_W, R R R0 R M_Q_P[..0], M_QM[..0],,,.vddm / NU These packs and resistor,please close to IMM 0Ω % /W MT00 LR 0Ω % /W MT00 LR 0Ω % /W MT00 LR 0Ω % /W MT00 LR M_0_R0 M R0 M R0 M R0 MOMP / change to.v MMT R 00Mz 00Ω 00 0K-0T0 R R0 R0 0Ω % /0W MT00 LR.V_IMM 0KΩ % /W MT00 LR R 00Mz 00Ω 00 0K-0T0 >0MIL.V_IMM MMT 0 =>R =>R u 0V 0-0% 0 YV.u 0V +0-0%M00 YV TIYO LR.u 0V +0-0%M00 YV TIYO LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0K % /W 00(NU) MVR_N MMVR MMVR MMVR MMVR OT0 OT OT OT 0 M_OT0 M_OT M_OT M_OT.V_IMM 0 R R 0Ω % /0W MT00 LR 0Ω % /0W MT00 LR 0u 0V ±0% MT00 XR T=.mm 0XR0KT TK LR u 0V 0% MT00 XR 0XR0K TK LR 0.u V 0-0% MT00 YV LR > 0 mil 0 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR MVR_N VMK MK V V_LK MLKI MLKO+ MLKO- V_LK U I N VN00 PIN VI P created with pdfactory trial version 000p 0V 0% MT00 XR LR 000p 0V 0% MT00 XR LR 000p 0V 0% MT00 XR LR R R0 Ω % /0W MT00 LR Ω % /0W MT00 LR p 0V +/-0.P 00 (NU) p 0V +/-0.P 00 (NU) LKI > 0 mil V V_LK LKO- LKO+ 0.u V 0-0% MT00 YV LR LKI = L_R + ". LKO as short as possible. L LMP0 0 u 0V 0% MT00 XR 0XR0K TK LR 000p V +0-0% MT00 YV LR M_R M_ M_W M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_0 VM,0,,,,,,0,,,,,,,,,0,,,,0,,,,,, M_ p 0V % MT00 NPO LR LMR < VI VN00 + VTR> ize ocument Number Rev <VN00 R> p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- riday, July 0, 00 ate: heet of

16 0 Ω % MT00 /W PR LR RP P_L0 N_LP0 P_L N_LP P_L N_LP P_L N_LP Ω % MT00 /W PR LR RP P_L N_LP 0 P_L[..0] P_L N_LP P_L N_LP P_L N_LP Ω % MT00 /W PR LR RP P_L0 N_LP0 P_L N_LP P_L N_LP P_L0 N_LP0 Ω % MT00 /W PR LR N_LP0 P RP N_LP P P_L N_LP VN00_NR R P_L N_LP N_LP R P_L N_LP N_LP R P_L N_LP N_LP N N_LP P N_LP R Ω % MT00 /W PR LR M RP M P_L N_LP N_LP N P_L N_LP N_LP L P_L N_LP N_LP0 L P_L N_LP N_LP N N_LP K N_LP0 R N_LP J Ω % /W MT00 LR n N_LP N_LP R 0 P_ K N_LP R Ω % /0W MT00 LR 0 P_LK_P Ω % MT00 /W PR LR N_LP K RP N_LP P_L N_LP VN00_NJ J P_L N_LP VN00_NK K P_L N_LP VN00_NJ J P_L N_LP VN00_N VN00_NJ J VN00_N VN00_N VN00_N N_LP M VN00_NK K N_LP J VN00_NL L R Ω % /W MT00 LR n 0 P_ L VN00_NM M VN00_NK K R Ω % /W MT00 LR n 0 P_V J VN00_NM M VN00_NP P R VN00_N 0 P_LK_N VN00_N Ω % /0W MT00 LR VN00_N VN00_NM M,0,,.VM R.KΩ % /W MT00 LR VN00_N p 0V % MT00 NPO VN00_N LR R0 0 % /W 00(NU) PX_T0 0 NV 0 NV 0 NKL / MI add VN00_N VN00_N N_LP N N_LP N N_LP VN00_N VN00_N VN00_N VN00_N VN00_N VN00_N VN00_N VN00_N VN00_N /TV /TV0 /TV0 /TV0 /TV0 /TV0 /TV0 /TV 0/TV0 /TVLK /TV0 /TV0 /VP_ /VP_0 /VP_ /VP_ /VP_ 0/VP_ /VP_T 0 /TV0 /VP_ RM/TV IRY/PLLK TRY VL/TVV TOP PR R W/TVLK# RQ/LK NT/T RR I/PIP IL PXT T0/NV T/NV T/NLT T/VP_ T/VP_ T0 T0 T/TV0 T/TVLKIN 0/VP_V /VP_ /VP_0 /VP_ /VP_ /VP_ /VP_LK /VP_LK# / MI / MI change VVL.VM 00Ω±% 00Mz 000m MT00 ML P-N M.LYR LR R VM_X 00Ω±% 00Mz 000m MT00 ML P-N M.LYR LR.VM M N P R T VP VP VP VP VP U0 U V0 VVL VVL VVL R 0.u 0V 0% MT00 XR LR L L L VX VX VX V-LINK INTR RT VU R VM 0 % /W MT00(NU) "PT OR RT (.V I/O) "PLK VP0 VU VU R V00 V0 V0 V0 V0 V0 V0 V0 V UPT+ UPT- NT+ NT- UPM NM VLOMPP VLVR UT TTIN RT PWROK "XIN "INT "R " " "VYN "YN "RT "IPLKO "IPLKI "TV00/VP000 "TV0/VP00 "TV0/VP00 "TV0/VP00 "TV0/VP00 "TV0/VP00 "TV0/VP00 "TV0/VP00 "TV0/VP00 "TV0/VP00 "TV0/VP00 "TV/VP0 "TV/VP0 "TV/VP0 "TVLK/VP0LK "TVLKR "VP0T "TVV/VP0V / R (NU) R Mount.V 0Ω % /0W MT00 LR V U Y Y T T U W W V V W T V R VL_0 VL_ VL_ VL_ VL_ VL_ VL_ VL_ VLR_N ITIN / IPLKO_N PNI0 PNI PNI PNI TV TV TV TV TV TV TV0 TV VN00_N0 VN00_N0 VN00_N VN00_N0 VN00_N VN00_N0 VL_0 VL_UPT VL_UPT0 VL_NT VL_NT0 VL_UPM VL_NM.V VL_[..0] Ω % /0W MT00 LR R IPLKI IPLKO,0,, / change to.v UT0_N PIRT0_N,0 PWROK_N R W 0 % /W 00 R.KΩ % /W MT00 LR 0.Ω % /0W MT00 LR R R LU RN VYN YN Ω % /W MT00 LR n.v_imm PI_INT0,0 V-LINK Vref= 0..VM VI / recommend VT VLK IPLKO IPLKI.KΩ % /0W MT00 LR p 0V +/-0.P 00 (NU) p 0V +/-0.P 00 (NU) R0 R KΩ % /0W MT00 LR 0 0 mil VLR_N > 0 mil 0 LKM_UI VM 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree > 0 mil V_ 0p 0V ±0.p MT00 NPO Lead-ree(NU) V_ > 0 mil V_ V_ > 0 mil V_PLL V_PLL VM_X > 0 mil V_PLL.VM.V 0.u V 0-0% MT00 YV LR L LMP0 0.u V 0-0% MT00 YV LLR 00.u 0V +0-0%M00 YV TIYO LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 000p V +0-0% MT00 YV LR 000p V +0-0% MT00 YV LR 000p V +0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.0u V 0% MT00 XR LR L0 0 LMP0 VM VM VM u 0V 0% MT00 XR 0XR0K TK LR L0 LMP0 VM u 0V 0% MT00 XR 0XR0K TK LR 0.u V 0-0% MT00 YV LLR u V 0% MT00 XR LR.u 0V +0-0%M00 YV TIYO LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR L LMP0 LMP0 u 0V 0% MT00 XR 0XR0K TK LR LMP0.VM N P_VR R LKM_N R 0.Ω % /0W MT00 LR R 0.Ω % /0W MT00 LR PVR PVR LK POMPN POMPP (.V I/O) "PT "PLK raphics controll PLL "V "V 0 PT PLK V_ V_ L_PT 0, L_PLK 0, PNI0 PNI PNI PNI R R R0 R0 0KΩ % /W MT00 LR 0KΩ % /W MT00 LR 0KΩ % /W MT00 LR 0KΩ % /W MT00 LR V_PLL 000p V +0-0% MT00 YV LR u 0V 0% MT00 XR 0XR0K TK LR P_UY0 T PUY POUT PO0 "PLL "VPLL "PLL "VPLL " " V_ V_ R R R R 0KΩ % /W MT00 LR 0K % /W 00(NU) 0K % /W 00(NU) 0KΩ % /W MT00 LR,0,,.VM.VM VI / recommend P.0 Vref=0..VM VN00_N VN00_N V_PLL V_PLL V_PLL V_PLL U TV TV TV TV R R R R.K % /W 00(NU).KΩ % /W MT00 LR.KΩ % /W MT00 LR.K % /W 00(NU),,0,,,,,.VM.VM,0,,,,,,0,,,,,,,,,0,,,,0,,,,,, VM P_VR R.KΩ % /W MT00 Lead-ree R.KΩ % /W MT00 Lead-ree I N VN00 PIN VI PNI0 PNI PNI PNI R R R R K % /W 00(NU) K % /W 00(NU) K % /W 00(NU) K % /W 00(NU) RP TV TV TV0 TV.KΩ % MT00 /W PR LR irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- VM u 0V 0% MT00 XR 0XR0K TK LR LMR < VI VN00 + VTR> ize ocument Number Rev <VN00 vedio> 0. riday, July 0, 00 ate: heet of 0 P created with pdfactory trial version

17 0,0,,.VM,0,,.VM R0. Modify K0 K K K K K K K0 L0 M0 N0 P0 R0 T0 V0 W0 Y0 Y Y Y Y Y0 V V V V V V V V V V V V V V V V V V V V V V 0 L L L L M M M M M M M N N N N N N N P P P P P P P P P P P R R R R R R R T T T 月 0 T 00u 0V -0% mω MT Low R T0V0M00T0 KMT LR u 0V 0-0% 0 YV(NU).u 0V +0-0%M00 YV TIYO LR u 0V 0% MT00 XR 0XR0K TK LR u 0V 0% MT00 XR 0XR0K TK LR 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.u V ±0% MT00 XR 000K0T WLIN Lead-ree 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 0.0u V 0% MT00 XR LR 000p 0V 0% MT00 XR LR 000p 0V 0% MT00 XR LR 000p 0V 0% MT00 XR LR 000p 0V 0% MT00 XR LR T T T T U U U U U U U U U U U V V V V V V V Y Y Y 0 U I N VN00 PIN VI irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <VN00 power> 0. riday, July 0, 00 ate: heet of 0 P created with pdfactory trial version

18 0 N, M_[..0], M_[..0], M_[..0] M R0 M R0 M_LK_R M_LK_R0 M_LK_R M_LK_R0 M_K_R0 M_K_R0,,0,,,,,,,,,0,,,,0,,,,,, VM, M_, M_R R 0KΩ % /W MT00 LR, M_W,,, I_MLK,,, I_MT M_OT M_OT, M_QM[..0], M_Q_P[..0] 0Ω % MT00 /W PR 0.mm LR RP M_Q_N0 M_Q_N M_Q_N M_Q_N[..0] M_Q_N RP M_Q_N M_Q_N M_Q_N M_Q_N 0Ω % MT00 /W PR 0.mm LR,.V_IMM,0,,,,,,0,,,,,,,,,0,,,,0,,,,,, VM 0, R_VR 0.u V 0-0% MT00 YV LR.u 0V ±0% MT00 XR 0XRKT TK LR O IMM M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_0 M_QM0 M_QM M_QM M_QM M_QM M_QM M_QM M_QM M_Q_P0 M_Q_P M_Q_P M_Q_P M_Q_P M_Q_P M_Q_P M_Q_P M_Q_N0 M_Q_N M_Q_N M_Q_N M_Q_N M_Q_N M_Q_N M_Q_N 0 0.u V 0-0% MT00 YV LR.u 0V ±0% MT00 XR 0XRKT TK LR 0 M_0 0 0 Q0 M_ 00 Q M_ Q M_ Q M_ Q M_ Q M_ Q M_ Q M_ Q M_ 0 Q M_0 0 0/P Q0 M_ Q 0 M_ Q M_ Q M_ Q M_ Q M Q M_ 0 Q M_ 0 Q M_ 0 0 Q M_0 0# Q0 M_ 0 # Q M_ K0 Q M_ K0# Q M_ K Q M_ K# Q M_ 0 K0 Q M_ K Q M_ 0 # Q M_ 0 R# Q M_0 W# Q0 M_ 00 0 Q M_ Q M_ L Q M_ Q M_ Q M_ OT0 Q M_ OT Q M_ 0 Q M_ M0 Q M_0 M Q0 M_ M Q M_ 0 M Q M_ M Q 0 M_ 0 M Q M_ M Q M_ M Q M_ Q0 Q M_ Q Q M_ 0 Q Q M_0 Q Q0 M_ Q Q M_ Q Q 0 M_ Q Q M_ Q Q M_ Q0# Q M_ Q# Q M_ Q# Q M_ Q# Q M_ Q# Q 0 M_0 Q# Q0 M_ Q# Q M_ Q# Q M_ Q V V V V V V V V V V V V V V 0 V V V0 V 0 V V V V0 V VP V V 0 N V 0 N V N V N V NTT V V VR V0,,,, R_.V 0 V 0 0 V V 0 V V V V V V V V V V V V0 V V V V V V V0 V V V 0 V V 0 V V V V 0 V V V V0 RV TYP V V KT OXONN MT R O-IMM =. T 0-MN- Lead-free & Ro, R R R R M_[..0],, M_0 M_ M_K_R0 M_K_R0 M_[..0], M_W, M_R, M_ M_OT M_OT M R0 M R0 0Ω % /W MT00 LR 0Ω % /W MT00 LR 0Ω % /W MT00 LR 0Ω % /W MT00 LR.u 0V ±0% MT00 XR 0XRKT TK LR 0mil.u 0V ±0% MT00 XR 0XRKT TK LR.u 0V ±0% MT00 XR 0XRKT TK LR Place these.u caps near o-imm Place one cap close to every pullup resistors terminated to 0.vddm NOT: 00 mils LL terminal close IMM.V_IMM, / MI Place these 0.u caps near o-imm R_0.VM, 0 0.u V 0-0% MT00 YV LR M_ RP M_ 0.u V 0-0% MT00 YV LR M_ M_ 0.u V 0-0% MT00 YV LR M_ RP Ω % MT00 /W PR 0.mm LR M_ 0.u V 0-0% MT00 YV LR M_ M_ 0.u V 0-0% MT00 YV LR M_ RP Ω % MT00 /W PR 0.mm LR M_ 0.u V 0-0% MT00 YV LR M_ M_ 0.u V 0-0% MT00 YV LR RP Ω % MT00 /W PR 0.mm LR 0.u V 0-0% MT00 YV LR M_0 M_0 0.u V 0-0% MT00 YV LR RP Ω % MT00 /W PR 0.mm LR 0.u V 0-0% MT00 YV LR Ω % MT00 /W PR 0.mm LR 0.u V 0-0% MT00 YV LR RP 0.u V 0-0% MT00 YV LR Ω % MT00 /W PR RN-R0-JN YNT LR RP.u 0V ±0% MT00 XR 0XRKT TK LR.u 0V ±0% MT00 XR 0XRKT TK LR RP0 Ω % MT00 /W PR RN-R0-JN YNT LR 0 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0 Ω % MT00 /W PR RN-R0-JN YNT LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR Place these i-req decoupling caps near M irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <R-dimm-> 0. 0 riday, July 0, 00 ate: heet of P created with pdfactory trial version

19 0 N, M_[..0], M_[..0] M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_, M_[..0] M_ M_0 M_0_R0 M R0 M_LK_R0 M_LK_R00 M_LK_R M_LK_R0 M_K0_R0 M_K_R0, M_, M_R, M_W,,, I_MLK,,, I_MT M_OT0 M_OT, M_QM[..0] M_QM0 M_QM M_QM M_QM M_QM M_QM M_QM M_QM, M_Q_P[..0] M_Q_P0 M_Q_P M_Q_P M_Q_P M_Q_P M_Q_P M_Q_P M_Q_P M_Q_N[..0] M_Q_N0 M_Q_N M_Q_N M_Q_N M_Q_N M_Q_N M_Q_N M_Q_N,.V_IMM,0,,,,,,0,,,,,,,,,0,,,,0,,,,,, VM 0, R_VR 0.u V 0-0% MT00 YV LR.u 0V ±0% MT00 XR 0XRKT TK LR O IMM 0 0.u V 0-0% MT00 YV LR.u 0V ±0% MT00 XR 0XRKT TK LR 0 M_0 0 0 Q0 M_ 00 Q M_ Q M_ Q M_ Q M_ Q M_ Q M_ Q M_ Q M_ 0 Q M_0 0 0/P Q0 M_ Q 0 M_ Q M_ Q M_ Q M_ Q M Q M_ 0 Q M_ 0 Q M_ 0 0 Q M_0 0# Q0 M_ 0 # Q M_ K0 Q M_ K0# Q M_ K Q M_ K# Q M_ 0 K0 Q M_ K Q M_ 0 # Q M_ 0 R# Q M_0 W# Q0 M_ 00 0 Q M_ Q M_ L Q M_ Q M_ Q M_ OT0 Q M_ OT Q M_ 0 Q M_ M0 Q M_0 M Q0 M_ M Q M_ 0 M Q M_ M Q 0 M_ 0 M Q M_ M Q M_ M Q M_ Q0 Q M_ Q Q M_ 0 Q Q M_0 Q Q0 M_ Q Q M_ Q Q 0 M_ Q Q M_ Q Q M_ Q0# Q M_ Q# Q M_ Q# Q M_ Q# Q M_ Q# Q 0 M_0 Q# Q0 M_ Q# Q M_ Q# Q M_ Q V V V V V V V V V V V V V V 0 V V V0 V 0 V V V V0 V VP V V 0 N V 0 N V N V N V NTT V V VR V0,,,, R_.V 0 V 0 0 V V 0 V V V V V V V V V V V V0 V V V V V V V0 V V V 0 V V 0 V V V V 0 V V V V0 RV TYP V V KT OXONN MT R O-IMM =. T 0-NN- Lead-free & Ro M_0_R0 Place these resistors near o-imm R R R R 0Ω % /W MT00 LR 0Ω % /W MT00 LR 0Ω % /W MT00 LR 0Ω % /W MT00 LR M_K0_R0 M_K_R0 M R0 M_OT0 M_OT NOT: 0mil Place these.u caps near o-imm Place one cap close to every pullup resistors terminated to 0.vddm LL terminal close IMM.u 0V ±0% MT00 XR 0XRKT TK LR.u 0V ±0% MT00 XR 0XRKT TK LR 0.u 0V ±0% MT00 XR 0XRKT TK LR.u 0V ±0% MT00 XR 0XRKT TK LR.u 0V ±0% MT00 XR 0XRKT TK LR RP RP.V_IMM, 0.u V 0-0% MT00 YV LR 00 mils 0 / MI 0.u V 0-0% MT00 YV LR Place these 0.u caps near o-imm R_0.VM, Ω % MT00 /W PR RN-R0-JN YNT LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR Ω % MT00 /W PR RN-R0-JN YNT LR RP 0 0.u V 0-0% MT00 YV LR 0 0.u V 0-0% MT00 YV LR Ω % MT00 /W PR RN-R0-JN YNT LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR 0.u V 0-0% MT00 YV LR Place these i-req decoupling caps near M irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <R-dimm-> 0. 0 riday, July 0, 00 ate: heet of P created with pdfactory trial version

20 0 P_L[..0] P_LK_P P_LK_N 0KΩ % /W MT00 LR VR near to chip LVV 0.u V 0-0% MT00 YV LR,,, LV.VM VR V P_L0 P_L P_L P_L P_L P_L P_L P_L P_L P_L P_L0 P_L P_L P_L P_L P_L P_L P_L P_L P_L P_L0 P_L P_L P_L >0MIL VI / recommend,0,,,,,,,,,,,,,,,0,,,,0,,,,,, 0p 0V ±0.p 00 NPO(NU) 0 0p 0V ±0.p 00 NPO(NU) u V 0-0% 00 YV R,,, NV 0 R0 R 0KΩ % /W MT00 LR 0.u V 0-0% MT00 YV LR PWR 0 % /W 00 R0.KΩ % /W MT00 LR 0.u V 0-0% MT00 YV LR,,,.VM.VM,,, P_ P_LK_P P_LK_N P_ P_V 0.u V 0-0% MT00 YV LR PLL LV 0 V LVV VM.VM P_NPV,0,,,,,,,,,,,,,,,0,,,,0,,,,,, 0.u V 0-0% MT00 YV LR R 0.u V 0-0% MT00 YV LR u V 0-0% 00 YV PWR 0 % /W 00 Q M-T-N NN. 0V OT- IRIL VM LKINP LKINM YN VYN 0 0 VR PLL PLL PLL U LV LV LV LV V V V LVV LVV LVV R.KΩ % /0W MT00 LR R I VT LV TQP 00PIN VI LR W 0 % /W 00 月 0 L M0K-0T0 PR RV RV N N N PIO- PIO- PIO- PIO- RV 0 RV IL ILK L/IT TT TT R_ P UL MN LKP LKM LKP LKM P M P M P M P M P M P M P M 0P 0M IV PLLV PLLV V MOL NV P_PR RV RV R R (NU)0 % /W 00 R0 (NU)0 % /W 00 R0 (NU)0 % /W 00 R00 (NU)0 % /W 00 P_L TT LV_TXLK_UP LV_TXLK_UN P M P M P_R_ P_P P_UL P_MN LV_TXOUT_UP LV_TXOUT_UN LV_TXOUT_UP LV_TXOUT_UN LV_TXOUT_U0P LV_TXOUT_U0N V PLLV V P_MOL INVN 0Ω % /W MT00 P_IL LR LV_TXOUT_LP LV_TXOUT_LN LV_TXOUT_LP LV_TXOUT_LN LV_TXOUT_L0P LV_TXOUT_L0N P_PR P_UL P_IL P_MN P_P P_L P_R_ P_MOL P_NPV LV_TXLK_LP LV_TXLK_LN LV_TXLK_LP LV_TXLK_LN LV_TXOUT_LP LV_TXOUT_LN LV_TXOUT_LP LV_TXOUT_LN LV_TXOUT_LP LV_TXOUT_LN PLL.VM_LV VM R 0Ω % /W MT00 LR R 0Ω % /W MT00 LR R 0Ω % /W MT00 LR R 0Ω % /W MT00 LR R R0 R 0Ω % /W MT00 LR R0 T T T T 0Ω % /W MT00 LR T 0 0.u V 0-0% MT00 YV LR T R R R0 R0 R R0 R 00 0.u V 0-0% MT00 YV LR R0.KΩ % /0W MT00 LR.KΩ % /0W MT00 LR.KΩ % /0W MT00 LR.KΩ % /0W MT00 LR.KΩ % /0W MT00 LR.K % /W 00(NU).K % /W 00 (NU).KΩ % /0W MT00 LR.KΩ % /W MT00 LR.K % /W 00 (NU).KΩ % /0W MT00 LR.KΩ % /0W MT00 LR.K % /W 00 (NU).K % /W 00 (NU).K % /W 00 (NU).K % /W 00(NU).K % /W 00 (NU).VM_LV L0 L L L L L.KΩ % /W MT00 LR L R R R R R R R0 R RV RV UPPORT "I" L_PLK, L_PT, 0K-0T0 W 0K-0T0 ULL WILL 0K-0T0 W 0K-0T0 ULL WILL 0K-0T0 ULL WILL 0K-0T0 W 0K-0T0 ULL WILL 0.u V 0-0% MT00 YV LR.VM_LV 0.u V 0-0% MT00 YV LR.VM V LVV PLLV PLL R R0 LV R (NU)0 % /W 00 R0 (NU)0 % /W 00 Place close to VT 0Ω % /W MT00 LR VI / recommend mount 0Ω % /W MT00 LR IL(pin) etting Pull down(r:remove;r:mount) is ardware ontrolled LV Tx Note: If using.w. control,please do some reworkings. ===>Tx ide: R:Remove;R:Mount;R:Remove L(pin0) setting Pull down Pull igh.v(r) ingle-ended LK in (pin) setting Pull down(r0) Pull igh.v *UL(pin) setting Pull down(r) Pull igh.v(r) *VTL:ree choice VT:Please tie to down Powerown ontrol KT VI / recommend VM NV.KΩ % /W MT00 Lead-ree R ifferential LK in Rising edge alling edge ignal hannel UL hannel.vm.kω % /W MT00 Lead-ree Q R KΩ % /W MT00 Lead-ree TRN NPN MMT MT OT- IRIL Pull igh.v(r:mount;r:remove) is oftware ontrolled LV Tx Note: If using.w. control,please do some reworkings. ===>Tx ide: R:Mount;R:Remove;R:Mount R The signals of L,UL and are ontrolled by I. Q TRN M-T-N N00_NL 0V m OT- PIN IRIL LR R,,,,,,.VM P_P 0Ω % /W MT00 Lead-ree(NU).VM,,,.VM.KΩ % /W MT00 LR TRPPIN PULL-UP PULL-OWN,0,,,,,,,,,,,,,,,0,,,,0,,,,,, VM L_MUT NKL R0 NV M-T-N NN. 0V OT- IRIL Q IO TKY U 0V 0.0 OT- PIN NMKO N P,0 LI0 IO TKY -0 O- NMKO R.KΩ % /0W MT00 LR 0.u 0V 0% MT0 XR LR INVN P_PR P_UL P_IL P_MN P_P P_L P_R_ P_MOL Pull high (efault) Two hannel I active (efault) ingle-nd LK (efault) ifferential-nd LK bit Mode (efault) Reserve I Inactive Interrupt active (efault) Interrupt Inactive Normal Mode (efault) ailling dge ingle hannel (efault) Power own Mode Rising dge (efault) bit Mode VM irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <LV > 0. riday, July 0, 00 ate: heet of 0 0 P created with pdfactory trial version

21 0,,,,,,,,,0, / 0 NV V,0,,,,,,,0,,,,,,,,0,,,,0,,,,,, I_MX= PTTRN WIT=MIN. MM(0MIL) Min : 0 MIL or Power Plane VM LV_TXLK_LN LV_TXLK_LP LV_TXOUT_LN LV_TXOUT_LP LV_TXOUT_LN LV_TXOUT_LP LV_TXOUT_L0N LV_TXOUT_L0P U / change mil 月 mil R L-I N0KR 00KΩ -0 % /W PIN MT00 TI LR LR L.u 0V +0-0% 00 YV LR L L0 L R0 KΩ % /0W MT00 LR Q M-T-P O0-0V - TOP PIN O LR Q NPN PTU OT- PILIP LR OK TM0-00-P TK OK TM0-00-P TK OK TM0-00-P TK OK TM0-00-P TK R.KΩ % /0W MT00 LR L_V Min : 0 MIL or Power Plane / MI N L 00MZ 0Ω % 00 M--00-0T KIN OR VM L0 00MZ 00Ω % MT00 0K-0T0 ULL WILL L L L L Min : 0 MIL or Power Plane ON MT WIR.0P 0PIN R/ 0-000L Lead-free & Ro 0p 0V ±0.p MT00 NPO Lead-ree 0p 0V ±0.p MT00 NPO Lead-ree OK TM0-00-P TK OK TM0-00-P TK OK TM0-00-P TK 0u 0V ±0% MT00 XR VXTVXR0K0T VX LR R L_PT,0 0Ω % /0W MT00 Lead-ree R 0Ω % /0W MT00 Lead-ree L_PLK,0 OK TM0-00-P TK LV_TXLK_LN 0 LV_TXLK_LP 0 0.u V 0-0% 00 YV 0.u V 0-0% 00 YV (NU) LV_TXOUT_LN 0 LV_TXOUT_LP 0 LV_TXOUT_LN 0 LV_TXOUT_LP 0 LV_TXOUT_LN 0 LV_TXOUT_LP 0 0.u 0V 0% MT00 XR LR / MI LV Interface ignal LV LNT 0" able MX " TR mils (stripline) mils (microstrip) P TR MUTIN 0 mils +/-0 mils mils (edge (data to clock) to edge) +/-0 mils (with a 0 mils (pair clock pair) to pair) X +/-0 mils 0 mils (to non (clock to clock) LV signal) Impedance 00 ohms +/-% Note reakout region from N should be less than 00 mils,0,,,,,,,0,,,,,,,,0,,,,0,,,,,, VM VM irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <L connecter> 0. riday, July 0, 00 ate: heet of 0 P created with pdfactory trial version

22 0,,,,,,,,, VM L 0K-0T0 W 0.u V 0-0% MT00 YV LR R0. Modify for MI OPTIONL PROTTION IO IO RRY MMTM OT- IO IO RRY MMTM OT- IO IO RRY MMTM OT- IO IO RRY MMTM OT- IO IO RRY MMTM OT- IO IO RRY MMTM OT- IO (0mil) L n ±% MT00 L0T-NJ- ILIIN LR R RN (0mil) L n ±% MT00 L0T-NJ- ILIIN LR LU (0mil) L n ±% MT00 L0T-NJ- ILIIN LR (0mil) QVT R 0Ω % /W MT00 Lead-ree R 0Ω % /W MT00 Lead-ree R 0Ω % /W MT00 Lead-ree (0mil) QVLK R00 0Ω % /W MT00 Lead-ree (0mil) L M0V-0T0 RTV 0,,,,0,,,,,,,,,, VM P N POLY-WIT.V 0. MINIM MINIM0 IO TKY 0P 0V O- O 0.u V 0-0% MT00 YV LR T T0 0u 0V ±0% MT00 XR VXTVXR0K0T VX LR 0mil 0.u V 0-0% MT00 YV LR 0 N /0 modify T request R R R / MI change 0 ON UYIN IP -sub PIN reserved 00R0_X Lead-free & Ro YN (0mil) (0mil) RTV VYN (0mil) (0mil) R 0KΩ % /0W MT00 LR U L-I NLVKR -0 PIN TI LR U L-I NLVKR -0 PIN TI LR Ω % /W MT00 LR 0p 0V ±0.p MT00 NPO LR Ω % /W MT00 LR 0p 0V ±0.p MT00 NPO LR R0. Modify Ω % /W MT00 LR 0p 0V ±0.p MT00 NPO LR RT p 0V % MT00 NPO LR p 0V % MT00 NPO LR p 0V % MT00 NPO LR R 0Ω % /0W MT00 LR /0 MI change p 0V % MT00 NPO LR p 0V % MT00 NPO LR 0p 0V 0% MT00 XR LR 0p 0V 0% MT00 XR LR / change,0,,,,,,,0,,,,,,,,0,,,,0,,,,,, VM R 00KΩ % /W MT00 LR RTV R0.KΩ % /W MT00 Lead-ree VT QVT Q TRN M-T-N N00_NL 0V m OT- PIN IRIL LR R0.KΩ % /W MT00 Lead-ree VLK QVLK Q TRN M-T-N N00_NL 0V m OT- PIN IRIL LR irst International omputer, Inc. L.,NO.00,Yang uang t.,neiu TIPI, TIWN,RO (-)- LMR < VI VN00 + VTR> ize ocument Number Rev <RT connector> 0. riday, July 0, 00 ate: heet of 0 P created with pdfactory trial version