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AVCC R7 K -S R0.K AVCC AVCC D -OC0 -OC0 AVCC 7 UA 6 AVCC 7 UB AVCC R8 R9 70 70 8 -S AVCC U -FAULT -FAULT -S MIC0 OUT OUT MAIN AUX 7 6 VCCUSB VCCUSB AVCC V_AUX USBN USBP USBN USBP L VCCUSB FB BLMP DLWSN900SQ FB BLMP 6 UJ UJACK D -OC -OC 8 AVCC 7 UC 9 0 AVCC 7 UD R0 R6 70 70 -S 8 U6 -FAULT -FAULT -S OUT OUT MAIN AUX 7 6 VCCUSB VCCUSB AVCC V_AUX USBN USBP USBN USBP L VCCUSB FB6 BLMP DLWSN900SQ FB7 BLMP 6 UJ UJACK MIC0 C D RB60L-0 J V_SB AVCC modify 00,0,0 V_AUX J - : For PCI. or later - : For early PCI.0 USBN USBP USBN USBP L VCCUSB FB8 DLWSN900SQ FB9 BLMP BLMP 6 UJ UJACK C CT u VCC_SB L 6.8uH C9.u U9 8 SW P S FB LM6 FREQ BOOT EN VDD R68 7 6 0K R67 00K R66 00 C.u CT u V_SB C0.u AVCC FB FB7 USBN USBP USBN USBP L VCCUSB FB0 DLWSN900SQ FB BLMP BLMP 6 UJ UJACK B C 9p B R69 0K VCCUSB VCCUSB VCCUSB VCCUSB CT CT6 CT7 CT8 00u 00u 00u 00u USBP USBN USBP USBN USBP USBN USBP USBN R R R6 R7 R8 R9 R0 R K K K K K K K K Near the USB connectors A A VIA TECHNOLOGIES, INC. Title USB port& power switch Size Document Number Rev C VT6D 0. Date: Tuesday, August 7, 00 Sheet of

VIA TECHNOLOGIES ASSUMES NO RESPONSIBILITY FOR ANY ERRORS IN DRAWING THESE SCHEMATICS. V AVCC VCC_ THESE SCHEMATICS ARE SUBJECT TO CHANGE AT ANY TIME WITHOUT NOTICE. COPYRIGHT 00 VIA TECHNOLOGIES INCORPORATED. D C B A CLK -REQ AD AD9 AD7 AD -CBE AD AD AD9 AD7 -CBE -IRDY -DEVSEL -INTB -CBE AD AD AD0 AD8 AD7 AD AD AD modify 00,0,0 C9.u 0u CT C.u CT 0u I I U AMS7-ADJ V_IN ADJ G 6 7 8 9 0 6 7 8 9 0 6 7 8 9 0 6 7 8 9 0 6 7 8 9 6 7 8 9 60 6 6 V_OUT PCIB B B B B B B6 B7 B8 B9 B0 B B B B B B6 B7 B8 B9 B0 B B B B B B6 B7 B8 B9 B0 B B B B B B6 B7 B8 B9 B0 B B B B B B6 B7 B8 B9 B B B B B6 B7 B8 B9 B60 B6 B6 PCI U AMS7-V V_IN G V_OUT O O PCIA A A A A A A6 A7 A8 A9 A0 A A A A A A6 A7 A8 A9 A0 A A A A A A6 A7 A8 A9 A0 A A A A A A6 A7 A8 A9 A0 A A A A A A6 A7 A8 A9 A A A A A6 A7 A8 A9 A60 A6 A6 FB VCC_ FB VCC R7 80 6 7 8 9 0 6 7 8 9 0 6 7 8 9 0 6 7 8 9 0 6 7 8 9 6 7 8 9 60 6 6 FB CT 0u CT R7 0u 0.u C0.u C PCIV -INTA -INTC -RST -PME AD0 AD8 AD6 AD IDSEL AD AD0 AD8 AD6 -FRAME -TRDY -STOP PAR AD AD AD AD9 -GNT -CBE0 AD6 AD AD AD0 CT 0u VCC_SB AVCC_ C.u AD AD0 AD9 AD8 AD7 AD6 AD AD AD AD AD AD0 AD9 AD8 AD7 AD6 AD AD AD AD AD AD0 AD9 AD8 AD7 AD6 AD AD AD AD AD AD0 -CBE0 -CBE -CBE -CBE -FRAME IDSEL -IRDY -TRDY -DEVSEL -STOP PAR -REQ -GNT -RST CLK -INTA -INTB -INTC -PME C 6 7 8 6 7 8 6 9 0 7 8 9 0 6 7 8 0p 8 9 0 6 7 09 0 06 07 6 67 9 7 7 6 00 08 9 U AD AD0 AD9 AD8 AD7 AD6 AD AD AD AD AD AD0 AD9 AD8 AD7 AD6 AD AD AD AD AD AD0 AD9 AD8 AD7 AD6 AD AD AD AD AD AD0 -CBE0 -CBE -CBE -CBE -FRAME IDSEL -IRDY -TRDY -DEVSEL -STOP PAR -REQ -GNT PCIRST PCICLK -INTA -INTB -INTC -SMI -PME 9 XIN XOUT 9 VT60/VT60A FB FB 0 8 6 6 0 0 0 8 XTAL M 70 AVCC 8 86 8 8 77 78 7 7 7 68 8 80 76 7 88 87 8 79 7 6 60 97 0 0 0 6 69 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VSUS VCC VCC VCC VCC USBP- USBP+ USBP- USBP+ USBP- USBP+ USBP- USBP+ -USBOC0 -USBOC VCCUSB VCCUSB VCCUSB VCCUSB REXT USB USB USB USB EECS 9 EESK 0 EEDO/TEST0 EEDI 6 NC NC NC NC NC NC ATPGEN 6 TESTMODE 66 TEST 7 TEST 8 TEST 9 TEST 99 -OC0 -OC AVCC -OC0 -OC EECS EESK EEDO R70.7K EEDI R7.7K R7.7K V R7.7K C C C0 C.u.u.u.u R9.K % R0.0K % R76.7K R77.7K R78.7K R.7K R.7K R.7K R.7K R6.7K R6.7K J WAKEUP_EN 98 R.7K AVCC_ VCCPLLA 89 PLLA 90 VCCOSC 96 OSC 9 VCCPLL 9 PLL 9 SUS C 0p USBN USBP USBN USBP USBN USBP USBN USBP C.u V V USBN USBP USBN USBP USBN USBP USBN USBP USB DEVICE WAKE-UP J&J - : ENABLE - : DISABLE AVCC_ PCIV VCC U0 8 VCC 6 NC 7 NC modify 00,0,0 V IS9LC6 C C6 C C C8 C C9 C.0u.u.u.u.u.0u.0u.0u DO DI SK CS Title EEDO EEDI EESK EECS VCC_SB J AVCC V FB C7 C6 C8.u.u.u J AVCC V C.u VCC_ C C7 C6 C.u.0u.u.0u J : - PCI support.v to chip - Regulator support.v VIA TECHNOLOGIES, INC. VT60 PCI to USB.0 Host Controller Size Document Number Rev C 0. VT6D D C B A Date: Tuesday, August 7, 00 Sheet of