LGA H61 + DDR3 SHEET

Transcript

1 VS-00 Pro Rev:. LG H R SHEET TITLE SHEET TITLE OVER SHEET LOK IGRM POWER SEQUENE- POWER SEQUENE- POWER MP- POWER MP- PU LG_R_/ PU LG_PEG/FI/VI_/ PU LG_POWER / PU LG_GN/RSV_/ RIII SO-IMM RIII SO-IMM PH_PI/PIE/ST_/ PH_LP/H/RT_/ PH_RT/SVO/LKO_/ PH_PWR/GN_/ RT/ST/mST HMI_SM LN Intel WGL LN Phy Intel LM H udio_l 0 0 SIO RS port US Port PIex & front panel con. V_ual control LP onnector SPI/FN R Power ISL0 - ISLHRTZ VR ISLHRTZ System Power_VS EJ US.0 TX/STY Power PI-E X onnector GPIO SETTING EVIE PIN NME PIN no. GPI/GPO FUNTION ESRIPTION SIO SIO PH PH PH GP GP0 GPIO GPIO0 GPIO PIN PIN PIN M PIN N PIN P GPI GPI GPI GPI GPI S Verstion trl S Verstion trl OR I OR I OR I PI ROUTING ISEL PREQ# PGNT# INT# EVIE Value Rule R: R_Package_(Precision) ; Package =00, =00, =00, =0, 0=0 L: L_Package_urrent ; Package =00, =00, =00, =0, 0=0, IP.X, IPX : _Package_Material_Voltage ; Package =00, =00, =00, =0, 0=0, IP=IP phi=, IP0=IP phi=0; Material Y=YV, X=XR, N=NPO, OS=OS ON, SP=SP P, POS=POS P, E=E P; Voltage V=.V.. : _Package_(Others) ; Package=SOT... Q: Q_Package_(Others) ; Package=SOT, TO, TO, TO, SO U: U_Package_(Others) ; Package=SSOP0, PQFP, SO... X: X_Package_(Others) QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: N: N function_pin ount_pin Pitch_(Others) ; HEER_X_., TXV_X_, RII_0_ over_sheet rian Lee Size ocument Number Rev ustom VS-00 PRO Wednesday, March, 0 ate: Sheet of.

2 TX PSU VRM- ISLHR VS-00/00 PRO V. LOK IGRM H_ SO_IMM HNNEL_ INTEL LG PU PI-E x PIE0- PIEx SLOT* RIII SO_IMM HNNEL_ H_ MI LN GbE NI PIE P_ LN GbE PHY PI-E Interface PIE igital isplay P_ SM HMI* US.0 ONN * EJ PIE SPI Interface IOS (M) PIEx SLOT* PIE- INTEL H ST ST0 ST ST ONN* mst ONN* mini-pie Socket * PIE US0-, - US ONN * * OX HEER* RG nalog isplay US.0/. US US OM * UIO JK * MI_IN LINE_OUT L H US0 US FRONT PNEL PIN WFER* mini-pie Socket * * Pin Header (ebug ard) F LP SIO (PU) LP URT URT URT LM PIN WFER* ZRS00 GPIO RS PIN HEER* QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: RT: THER- MISTOR RT: THER- MISTOR RT: THER- MISTOR lock iagram rian Lee Size ocument Number Rev ustom. VS-00 PRO Wednesday, March, 0 ate: Sheet of

3 Power Sequence PLTRST# RMPWROK PWOK# SYS_PWROK# V_PU_ORE/V_XG V_PU_VIO PWROK# SLP_# V(.V/V/V) PS_ON# SLP_S# PWRTN PWRTSW- PWROK -RSMRST V_P0_ V_P0_ RTRST# RTV VORE/V_XG POWER OK VIO POWER OK PH ME POWER OK MIN POWER ON POWER UTTOM RESUME RESET OK STNY POWER OK TTERY OK QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: Power Sequence- rian Lee Size ocument Number Rev. VS-00 PRO ate: Wednesday, March, 0 Sheet of

4 Power Sequence Power Supply RTV RTRST V_P0_ V_P_ VS ERP_TRL# V_P0_STY\G V_P_STY\G V_UL -RSMRST 0 PWROK SLP_SUS# -PWRTSW PWRTSW SLP_S# SLP_S# _VTT SLP_LN# PS_ON# 0.V V V TXPWROK V_P_SFR V_P_LNUL SLP_# V_P0_ V_P_ PL0 PS_ON# 0.V V V V_P_STY\G SLP_S# TXPWROK SLP_LN# TXPWROK PMOS V_P0_STY\G SLP_S# TXPWROK V_P0_ME PWROK# V_PU_VIO 0 V_S PWROK# V_PU_VIO_PWRG V_PU_ORE V_XG SYS_PWROK# PWOK# RMPWROK PROPWRG PLTRST# ERP_TRL# V_P0_STY\G PL0 V_P0_ SLP_# V_P0_ME NMOS PMOS V_PU_VIO_PWRG V EN PG EN PG NMOS PMOS ISL V V_PU_VIO_PWRG SYS_PWROK# PMOS V_P_SFR V_UL V ERP_TRL# V_P_STY\G V_P_LNUL MOS HOKE MOS HOKE VP V VR_ON PGOO ISL V_P0_ME V_PU_VIO VS_VI ISL 0 ISL 0 NMOS V MOS HOKE MOS HOKE MOS HOKE MOS HOKE MOS HOKE 0 V_S V_PU_ORE V_XG V_P_ VSW_ V_P0_STY\G VREF_SUS V_P_STY\G V_P0_ VSUS_ RT VS SLP_S# ERP_TRL# SLP_S# RTV V_P0_ SLP_S# SLP_S# SLP_S# ERP_TRL0# ERP_TRL# RTRST V_P_STY\G SLP_S# PH H F VS V SLP_LN# SLP_LN# VT VRT PSIN# -PWRTSW SHN# STY#.V 0 V_ RTRST# S# SLP_S# ISL0 V -RSMRST SLP_S# V_REFV RSMRST# RSMRST# S# V_P_SFR VVRM VPNN PWROK 0 PWROK PWROK PS_ON# PS_ON# V_UL SLP_# SLP_SUS# 0.V SLP_# SLP_SUS# SLP_SUS# V MOS HOKE V_P0_ME PWRTSW TXPWROK _VTT VSW PWRTN# PSOUT# TXPG_IN PWROK# PWROK PLTRST# PWOK# PWOK# V_PU_VIO V_PRO_IO VMI PROPWRG SYS_PWROK# SYS_PWROK RMPWROK PWOK# PWROK RMPWROK PROPWRG PLTRST# V VQ RESET# V_P0_STY\G V_P_SFR VPLL SM_RMPWROK V_PU_VIO UNOREPWRGOO HOOK0 VIO V_S 0 VS V_PU_ORE V_XG V VXG Intel PU (LG) SLP_S# UP VS V S Power Sequence- VOUT US.0 Port rian Lee Size ocument Number Rev VS-00 PRO QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: Wednesday, March, 0 ate: Sheet of.

5 VS (V_P0_) ERP_TRL0 PL0 ERP_TRL F0P PMOS F0P V_P0_STY\G V_P_ ERP_TRL SM F0P._H_IO V_P_STY\G Power Map-.V PL0 V_P_SFR Power Supply 0uH 0m -SLP_S TXPWROK V_P_STY\G SLP_LN# V_P F_R NMOS FS0 PMOS F0P V_P_LNUL E 0 Ohm E 0 Ohm V_P_LN E 0 Ohm V_P_EPW R0 SPI_V V -SLP_S TXPWROK V_P0_ NMOS FS PMOS F0P V_UL V_P0_. ohm -SLP_S -SLP_S HOKE UH ISL0 MOSFET SWITHING MOSFET SWITHING NMOS NTMFSN(H) NTMFSN(L) HOKE UH_ V V_P0_. ohm E 0Ohm _VTT PH_SLP_ -SLP_S PH_MEPWROK ISL MOSFET SWITHING MOSFET SWITHING E 0Ohm NMOS NTMFSN(H) NTMFSN(L) HOKE.UH V_P0_ME V NMOS NT0 V_P0_PH V_P0_PH V_PU_VIO_PWRG MOSFET SWITHING MOSFET SWITHING NMOS NTMFSN(H) NTMFSN(L) HOKE.UH V_PU_VIO VS_VI NMOS NTN V_S V HOKE UH. ohm V_PU. ohm MOSFET SWITHING MOSFET SWITHING NMOS NTMFSN(H) NTMFSN(L) NTMFSN(L) HOKE 0nH H_VISOUT_VR H_VISK_VR VRMPWRG MOSFET SWITHING MOSFET SWITHING NMOS NTMFSN(H) NTMFSN(L) NTMFSN(L) HOKE 0nH V_PU_ORE H_VILERT_N_VR ISL PWM ISL0 MOSFET SWITHING MOSFET SWITHING NMOS NTMFSN(H) NTMFSN(L) NTMFSN(L) HOKE 0nH MOSFET SWITHING MOSFET SWITHING NMOS NTMFSN(H) NTMFSN(L) NTMFSN(L) HOKE 0nH V_XG PWMG ISL0 MOSFET SWITHING MOSFET SWITHING NMOS NTMFSN(H) NTMFSN(L) NTMFSN(L) HOKE 0nH Size ocument Number Rev ustom. VS-00 PRO QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: Power Map- rian Lee Wednesday, March, 0 ate: Sheet of

6 POWER Map- evice Power Name PU V_PU_ORE V_PU_VIO V_XG V_P_SFR V_S H V_P0_ME V_P0_PH.V V_P_STY\G V_REFV_SUS V_REFV V_PU_VIO V_P F_R RTV IMM _VTT SPI.V SIO V_P_STY\G.V V_P0_ US.0 V US.0 V_P0_STY\G V HMI.V PU/SYS FN V LN L.LN LN V_P_LN PI-E ONN V_P_LNUL.V V L V._H_IO.V V QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: Power Map- rian Lee Size ocument Number Rev VS-00 PRO Wednesday, March, 0 ate: Sheet of.

7 M Q[:0] M [:0] M Q[:0] M [:0] M QS0 M QS M QS M QS M QS M QS M QS M QS M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q PU J J S_Q[0] L S_Q[] L S_Q[] J S_Q[] J S_Q[] L S_Q[] L S_Q[] N S_Q[] N S_Q[] R S_Q[] R S_Q[0] N S_Q[] N S_Q[] R S_Q[] R S_Q[] V S_Q[] W S_Q[] V S_Q[] W S_Q[] U S_Q[] U S_Q[0] U S_Q[] Y S_Q[] Y S_Q[] U S_Q[] V S_Q[] U S_Q[] V S_Q[] W S_Q[] W S_Q[] Y S_Q[0] U S_Q[] W S_Q[] U S_Q[] U S_Q[] W S_Q[] Y S_Q[] U S_Q[] U S_Q[] R0 S_Q[] R S_Q[0] N S_Q[] N S_Q[] R S_Q[] R S_Q[] N S_Q[] N0 S_Q[] L0 S_Q[] L S_Q[] J S_Q[] J S_Q[0] L S_Q[] L S_Q[] J S_Q[] J0 S_Q[] G0 S_Q[] G S_Q[] E S_Q[] E S_Q[] G S_Q[] G S_Q[0] E S_Q[] E0 S_Q[] S_Q[] K P S_QS[0] W S_QS[] V S_QS[] V S_QS[] P S_QS[] K S_QS[] F S_QS[] S_QS[] K P S_QS#[0] V S_QS#[] W S_QS#[] V S_QS#[] P S_QS#[] K S_QS#[] F S_QS#[] S_QS#[] SKT_H REV = LLMP_REV =. OF S_M[0] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[0] S_M[] S_M[] S_M[] S_M[] S_M[] S_WE# S_S# S_RS# S_S_0 S_S[] S_S[] S_S#[0] S_S#[] S_S#[] S_S#[] S_KE[0] S_KE[] S_KE[] S_KE[] S_OT[0] S_OT[] S_OT[] S_OT[] S_K[0] S_K#[0] S_K[] S_K#[] S_K[] S_K#[] S_K[] S_K#[] SM_RMRST# S_QS[] S_QS#[] S_E_[0] S_E_[] S_E_[] S_E_[] S_E_[] S_E_[] S_E_[] S_E_[] R_ V M 0 Y M W M W M V M T M T M U M V M T M V M 0 U M T M W M U0 M T0 M W V0 U Y W V0 U V W0 U V T U V V U U0 W Y W U U W Y V W W V V U U W Y U U Y W R_RM_RESET# M WE# M S# M RS# M S0 M S M S M_LK_R_0 M_LK_R#_0 M_LK_R_ M_LK_R#_ R_RM_RESET#, M QS0 M QS M QS M QS M QS M QS M QS M QS M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q PU G G S_Q[0] J S_Q[] J S_Q[] G S_Q[] G S_Q[] J S_Q[] J S_Q[] L S_Q[] M S_Q[] M0 S_Q[] L0 S_Q[0] L S_Q[] M S_Q[] L S_Q[] M S_Q[] P S_Q[] R S_Q[] P0 S_Q[] R0 S_Q[] P S_Q[] R S_Q[0] P S_Q[] R S_Q[] M S_Q[] M S_Q[] R S_Q[] P S_Q[] L S_Q[] L S_Q[] R S_Q[] P S_Q[0] R S_Q[] R S_Q[] L S_Q[] L S_Q[] P S_Q[] P S_Q[] M S_Q[] M S_Q[] P S_Q[] P S_Q[0] P S_Q[] P S_Q[] R S_Q[] R S_Q[] R S_Q[] R S_Q[] M S_Q[] M S_Q[] L S_Q[] L S_Q[0] M S_Q[] L S_Q[] M S_Q[] L S_Q[] H S_Q[] H S_Q[] E S_Q[] E S_Q[] J S_Q[] J S_Q[0] F S_Q[] F S_Q[] S_Q[] H M S_QS[0] R S_QS[] N S_QS[] N S_QS[] P S_QS[] L S_QS[] G S_QS[] S_QS[] H L S_QS#[0] P S_QS#[] N S_QS#[] N S_QS#[] R S_QS#[] M S_QS#[] G S_QS#[] S_QS#] SKT_H REV = LLMP_REV =. OF S_K[0] K M 0 S_M[0] M0 M S_M[] M M S_M[] K M S_M[] P M S_M[] P M S_M[] M M S_M[] L M S_M[] N M S_M[] Y M S_M[] N M 0 S_M[0] U M S_M[] T M S_M[] R M S_M[] Y M S_M[] V M S_M[] R S_WE# K S_S# P S_RS# P S_S[0] M S_S[] W S_S[] N S_S#[0] N S_S#[] L S_S#[] T S_S#[] U S_KE[0] Y S_KE[] W S_KE[] V S_KE[] L S_OT[0] P S_OT[] M S_OT[] K S_OT[] L S_K[0] L S_K#[0] L0 S_K[] K0 S_K#[] L S_K[] M S_K#[] P S_K[] N S_K#[] H S_IMM_QVREF H S_IMM_QVREF N S_QS[] N S_QS#[] L S_E_[0] M S_E_[] P S_E_[] R S_E_[] L S_E_[] M S_E_[] R S_E_[] P S_E_[] R_ M WE# M S# M RS# M S0 M S M S M LK_R_0 M LK_R#_0 M LK_R_ M LK_R#_ UP SOKET_LG _SM_0 UP SOKET_LG _SM_0 QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: PU LG_R_/ rian Lee Size ocument Number Rev ustom. VS-00 PRO Wednesday, March, 0 ate: Sheet of

8 H_VISK_VR H_VISOUT_VR H_VILERT_N_VR H_PROHOT_N PH_THRMTRP# FG Strap For Processor K_PE_00M_MP_P K_PE_00M_MP_N H_VISK_VR H_VISOUT_VR H_VILERT_N_VR R H_PROHOT_N PH_THRMTRP# R K_ H_PWRG H_RMPWRG PLTRST_PU_N H_PM_SYN0 H_PEI R TP FG: : (efault) Normal Operation; Lane# definition matches socket pin map definition 0: Lane Numbers Reversed -> 0, ->....Ω_ VILERT_N TP K_/N PU_FG PU_FG PUE W W LK[0] LK#[0] VISLK VISOUT VILERT# J0 J UNOREPWRGOO F SM_RMPWROK RESET# E H_PEI H_TERR# J E PM_SYN PEI H TERR# G PROHOT# THERMTRIP# H_SKTO# J H_SN_N K SKTO# F_K PU_R_VREF J SM_VREF H J FG[0] J FG[] K FG[] L FG[] N FG[] L FG[] M FG[] J FG[] L FG[] M FG[] N FG[0] N FG[] N FG[] N FG[] N0 FG[] G FG[] G FG[] FG[] T RSV Y RSV H H RSV RSV SKT_H MIS REV = LLMP_REV =. OF UP SOKET_LG _SM_0 VIO_SELET VS_VI_0 VS_SENSE V_SENSE _SENSE VIO_SENSE IO_SENSE XG_SENSE XG_SENSE TO TI TK TMS TRST# PRY# PREQ# R# LK_ITP LK_ITP# PM#[0] PM#[] PM#[] PM#[] PM#[] PM#[] PM#[] PM#[] RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV V_VLITION_SENSE U_VLITION_SENSE VXG_VLITION_SENSE GT_VLITION_SENSE P P T L M L L0 M0 L J K K0 E 0 0 H0 H G G0 G F E0 F0 J L L K N M V W L J K L J K VIO_SEL VIO_SEL 0 VS_VI VS_SENSE V_SENSE _SENSE N_EXP_RX_P0 N_EXP_RX_N0 N_EXP_RX_P N_EXP_RX_N N_EXP_RX_P N_EXP_RX_N N_EXP_RX_P N_EXP_RX_N N_EXP_RX_P N_EXP_RX_N N_EXP_RX_P N_EXP_RX_N N_EXP_RX_P N_EXP_RX_N N_EXP_RX_P N_EXP_RX_N MI_N_RXP0 MI_N_RXN0 MI_N_RXP MI_N_RXN MI_N_RXP MI_N_RXN MI_N_RXP MI_N_RXN PU PEG_RX[0] PEG_RX#[0] PEG_RX[] 0 PEG_RX#[] PEG_RX[] E0 PEG_RX#[] E PEG_RX[] PEG_RX#[] PEG_RX[] PEG_RX#[] PEG_RX[] PEG_RX#[] PEG_RX[] E PEG_RX#[] E PEG_RX[] F PEG_RX#[] F PEG_RX[] G PEG_RX#[] G PEG_RX[] H PEG_RX#[] H PEG_RX[0] J PEG_RX#[0] J PEG_RX[] K PEG_RX#[] K PEG_RX[] L PEG_RX#[] L PEG_RX[] M PEG_RX#[] M PEG_RX[] N PEG_RX#[] N PEG_RX[] PEG_RX#[] W W MI_RX[0] V MI_RX#[0] V MI_RX[] Y MI_RX#[] Y MI_RX[] MI_RX#[] MI_RX_ MI_RX#[] P P PE_RX[0] R PE_RX#[0] R PE_RX[] T PE_RX#[] T PE_RX[] U PE_RX#[] U PE_RX[] PE_RX#[] PEG_IOMPO PEG_ROMPO PEG_IOMPI PIN & TRE WITH MIL,SPE MIL PIN TRE WITH MIL,SPE MIL SKT_H REV = LLMP_REV =. GEN MI PEG OF UP SOKET_LG _SM_0 PEG_TX[0] PEG_TX#[0] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[0] PEG_TX#[0] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] PEG_TX[] PEG_TX#[] MI_TX[0] MI_TX#[0] MI_TX[] MI_TX#[] MI_TX[] MI_TX#[] MI_TX[] MI_TX#[] PE_TX[0] PE_TX#[0] PE_TX[] PE_TX#[] PE_TX[] PE_TX#[] PE_TX[] PE_TX#[] E E G G F F J J E E F F G0 G G G K K J J M M L L N N V V W W Y Y P P T T R R U U N_EXP_TX_P0 N_EXP_TX_N0 N_EXP_TX_P N_EXP_TX_N N_EXP_TX_P N_EXP_TX_N N_EXP_TX_P N_EXP_TX_N N_EXP_TX_P N_EXP_TX_N N_EXP_TX_P N_EXP_TX_N N_EXP_TX_P N_EXP_TX_N N_EXP_TX_P N_EXP_TX_N MI_N_TXP0 MI_N_TXN0 MI_N_TXP MI_N_TXN MI_N_TXP MI_N_TXN MI_N_TXP MI_N_TXN FG: : isable: (efault) No Physical isplay Port attached to embedded isplay Port 0: Enable: n External isplay Port evice is connected to the Embedded isplay Port (isplay Port Present) FG[:]: : (efault) X - evice Functions and isable 0: X, X - evice Function enabled; Function isabled 0: Reserved - (evice function disabled; function Enabled) 00: X, X, X -evice Functions and enabled FG[]: : efault) PEG Train Immeditately following xxreset de assertion 0: PEG wait for IOS for training PU FI_FSYN_0 FI_LSYN_0 E E FI_LSYN_ FI_FSYN_ G FI_INT E E FI_OMPIO FI_IOMPO SKT_H REV = LLMP_REV =. FI_TX[0] FI LINK OF UP SOKET_LG _SM_0 FI_TX[0] FI_TX#[0] FI_TX[] FI_TX#[] FI_TX[] FI_TX#[] FI_TX[] FI_TX#[] FI_TX[] FI_TX#[] FI_TX[] FI_TX#[] FI_TX[] FI_TX#[] FI_TX[] FI_TX#[] E E F F G G FI_TX_P0 FI_TX_N0 FI_TX_P FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_TX_N NVR_LE R V_P_SFR.K_ R0.K_ H_SN_N 0.u X_0 PU LG_PEG/FI/VI_/ QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: rian Lee Size ocument Number Rev ustom. VS-00 PRO Wednesday, March, 0 ate: Sheet of

9 0-0- Remove PU_XP V_PU_ORE SKT_H PUF REV =. LLMP_REV =. V V F V V F V V F V V G V V G V V G V V G V V G V V V V: G V G V V G V V G V V G V V G0 V V G V V G 0 V V G V V H V V H V H V V V H V V H V V H V V H V V H V V H V V H V V H V V H V V H0 0 V V H V V H V V J V V J V V J V V J V V J V V J V V J V V J V V J V V J V V J V V J0 V V K V V K V V K 0 V V K V V K V V K V V K V V K V V K E V V K E V V K0 E V V L E V V L E V V L E V V L E V V L E V V L E V V L E V V L E0 V V L E V V L E V V L E V V L E V V L0 F V V M F V V M F V V M F V V M F V V M F V V M F V V M F V V M F V V M F V V M F0 V V M F V OF V M0 V PU POWER UP SOKET_LG _SM_0 V_PU_ORE V_PU_VIO V_S V_P_SFR M F G J J J J J K K K K K K K K0 0 E E G G J J J J L L L N N N R R R U U U V W H0 H H J0 K0 K L L M0 M M K K SKT_H PUH REV = LLMP_REV =. VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VS VS VS VS VS VS VS VS VS VS VS VPLL VPLL VQ:. VIO:. VS:. VPLL: IO/S/PLL POWER OF VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ J J J J R0 R R R R U U U U V V V V V W Y Y Y J0 0.U X_V UP SOKET_LG _SM_0 0.U X_V 0.U X_V V_PU_ORE V_PU_ORE V_PU_ORE V_XG U X_.V U X_.V U X_.V 0 0 T T T T T T T T0 U U U U U U U U0 W W W W W W Y Y Y Y Y Y U X_.V U X_.V U X_.V SKT_H PUG REV = LLMP_REV =. VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG: GFX POWER OF UP SOKET_LG _SM_0 U X_.V 0 U X_.V U X_.V 0 U X_.V U X_.V U X_.V 0 0.0UF_V U X_.V U X_.V U X_.V V_PU_VIO V_PU_VIO V_PU_VIO 0.0UF_V U X_.V U X_.V U X_.V U X_.V U X_.V 0.0UF_V U X_.V U X_.V U X_.V Please Put on the buttom side 000P_X_0V 0 0.0UF_V 0.U X_V 000P_X_0V 0 0.U X_V 000P_X_0V V_XG V_XG U X_.V U X_.V U X_.V 0 U X_.V U X_.V 0 U X_.V U X_.V U X_.V U X_.V U X_.V U X_.V U X_.V U X_.V U X_.V U X_.V 0 U X_.V U X_V U X_.V U X_.V PU LG_POWER / U X_.V 0.U X_V U X_.V U X_.V U X_.V 000P_X_0V U X_.V000P_X_0V QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: rian Lee for EMI Suggestion. Size ocument Number Rev ustom. VS-00 PRO Wednesday, March, 0 ate: Sheet of

10 PUI SKT_H REV = LLMP_REV =. 0 E E E F F F F F0 F F F G H H H H H H H H0 H H J J J J J J J J K K0 K _K0 K K K K K K K K K K K K K0 K K K K K L L L L L L L0 L L M M M M M M M M V _NTF _NTF OF UP SOKET_LG _SM_0 M M M0 M M M M M M0 M N0 N N N N N N N N0 N N N N N N N N N N N P P P P P P P P0 P P P P0 P R R R R R R R0 R R T T0 T T T T T T T T T T T T0 T T T T T T T T T T T0 T T T T T U U U U U U U V0 PUK V REV = G V LLMP_REV =. H V H V H V H0 V H V H W0 H W H W H W H W H W H Y H Y H Y J Y J Y J0 Y J Y J 0 J J K K K K K K K0 K K K K K 0 K K K K L0 L L0 L L L 0 L M M M M0 M M M M M E M E M E M E0 M E M E N E P E P E P E P E P0 F P F0 P F R F R F R F R F0 R F T F T F T F U F V F V F V F V F V G V G V G V G0 V G V0 G V G W G Y G Y Y _NTF _NTF 0 OF UP SOKET_LG _SM_0 G J J0 J V W P P P R R R R0 U0 W PUJ RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV NTF NTF NTF NTF NTF SKT_H REV = LLMP_REV =. SPRES 0 OF UP SOKET_LG _SM_0 RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV T P0 N0 U0 Y0 F E J J N PU LG_GN/RSV_/ QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: rian Lee Size ocument Number Rev ustom. VS-00 PRO ate: Wednesday, March, 0 Sheet 0 of

11 M S0 M S M S M_S#_0 M_S#_ M_LK_R_0 M_LK_R#_0 M_LK_R_ M_LK_R#_ M_KE_0 M_KE_ M S# M RS# M WE# IMM address:00,, SMLK_MIN,, SMT_MIN M_OT_0 M_OT_ M QS0 M QS M QS M QS M QS M QS M QS M QS M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# M 0 M M M M M M M M M M 0 M M M M M M S0 M S M S M S# M RS# M WE# M_OT_0 M_OT_ M QS0 M QS M QS M QS M QS M QS M QS M QS M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# IMM 0 0/P /# 0 S0# S# K0 K0# K K# KE0 KE S# RS# WE# S0 S SL S OT0 OT M0 M M M M M M M QS0 QS QS QS QS QS QS QS QS#0 QS# QS# QS# QS# QS# QS# QS# Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q 0 M Q0 M Q 0 M Q M Q M Q M Q M Q M Q M Q M Q M Q0 0 M Q M Q M Q M Q M Q 0 M Q 0 M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q 0 M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q 0 M Q0 M Q M Q M Q.V, R_RM_RESET# 0.u X_0 R_RM_RESET# VREF_Q_R VREF R IMM V V V V V 0 0 V V V V V0 V V V V V 0 V V V 0 VSP N N NTEST 0 EVENT# RESET# VREF_Q VREF_ VTT 0 VTT G 0 G G G N N N N 0PIN,0,P=0.MM _VTT R K % R K % R0 K % R0 K % M Q[:0] M [:0] VREF R.U Y_.V VREF_Q_R.U Y_.V R R u X_0 0.u M_VREF_MH VREF_Q_R M_VREF_MH, 0PIN,0,P=0.MM _VTT 0u X_0V 0.u X_0 000P_X_0V 000P_X_0V u X_.V u X_.V u X_.V 0 u X_.V 0.u X_0 0.u X_0 0 0.u X_0 0.u X_0 0.u X_0 0.u X_ for EMI Suggestion. QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: RIII SO-IMM (H=.mm) rian Lee Size ocument Number Rev. VS-00 PRO ate: Wednesday, March, 0 Sheet of

12 M S0 M S M S M S#_0 M S#_ M LK_R_0 M LK_R#_0 M LK_R_ M LK_R#_ M KE_0 M KE_ M S# M RS# M WE# IMM address:0,, SMLK_MIN,, SMT_MIN M OT_0 M OT_ M QS0 M QS M QS M QS M QS M QS M QS M QS M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# M 0 M M M M M M M M M M 0 M M M M M M S0 M S M S M S# M RS# M WE#.V M OT_0 M OT_ M QS0 M QS M QS M QS M QS M QS M QS M QS M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# IMM 0 0/P /# 0 S0# S# K0 K0# K K# KE0 KE S# RS# WE# S0 S SL S OT0 OT M0 M M M M M M M QS0 QS QS QS QS QS QS QS QS#0 QS# QS# QS# QS# QS# QS# QS# Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q.V, R_RM_RESET# 0.u X_0 R_RM_RESET# VREF_Q_R VREF R IMM V V V V V 0 V V V 00 V 0 V0 0 V V V V V 0 V V V VSP N N NTEST 0 0 EVENT# RESET# VREF_Q VREF_ 0 0 VTT VTT 0 G G N N 0PIN,0,P=0.MM G G N N _VTT M Q[:0] M [:0] 0PIN,0,P=0.MM _VTT 0 0u X_0V 0.u X_0 000P_X_0V 000P_X_0V u X_.V u X_.V u X_.V u X_.V 0.u X_0 0.u X_0 0.u X_0 0.u X_0 0.u X_0 0.u X_ for EMI Suggestion. QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: RIII SO-IMM rian Lee Size ocument Number Rev.0 VS-00 ate: Wednesday, March, 0 Sheet of

13 PH PT_R PH PT_R.V.K_/N PLK_P_F -PIRST WEK INTERNL PULL UP ON GNT# PH Q P/N: RS 0 R0 PH_MEPWROK R 0.0KΩ PULL HIGH --- ISLE GPIO 00 -EVSEL PLK_P_F -PIRST -IRY -SERR -STOP -PLOK -TRY -PERR -FRME -GNT -REQ0 -REQ -REQ -REQ -PIRQ -PIRQ -PIRQ -PIRQ -PIRQE -PIRQF -PIRQG -PIRQH PH_MEPWROK TP PH_GP_PU PH_GP_PU PH_GP_PU PH_GP_PU PH_GP_PU PH_GP_PU PH_GP0_PU PH_GP_PU PH_FG_JUMPER PH_GP_PU PH_GP_PU PH_GP_PU H H V F V R M V U E G T K V K0 J M P N V T R 0 F0 F N T M0 N T R R U M N P E F W Y0 PR REV.0 EVSEL# LKIN_PILOOPK PIRST# IRY# PME# SERR# STOP# PLOK# TRY# PERR# FRME# GNT0# GNT#_GPIO GNT#_GPIO GNT#_GPIO REQ0# REQ#_GPIO0 REQ#_GPIO REQ#_GPIO PIRQ# PIRQ# PIRQ# PIRQ# PIRQE#_GPIO PIRQF#_GPIO PIRQG#_GPIO PIRQH#_GPIO PI OF 0 H_FG_SM_PIN PH REV.0 L_LK L_T L_RST# PWROK PWM0 PWM PWM PWM SST GPIO FN LINK TH0_GPIO TH_GPIO TH_GPIO TH_GPIO TH_GPIO TH_GPIO TH_GPIO0 TH_GPIO PT_R ST ST SLOK_GPIO SLO_GPIO STOUT0_GPIO STOUT_GPIO N _E0# _E# _E# _E# ST0RXN ST0RXP ST0TXN ST0TXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP LKIN_ST_N LKIN_ST_P STLE# STIOMPI STIOMPO ST0GP_GPIO STGP_GPIO STGP_GPIO STGP_GPIO STGP_GPIO STGP_GPIO F F T T G N J U R J R J0 M F N E E G T L L M F F V K N P G P E E G G L0 L L L N N N M N N0 T0 T T T V0 V F G F J J Y G U ST0RXN ST0RXP ST0TXN ST0TXP H ST Ports & are isable. PH_LK_ST# PH_LK_ST -STLE PH_ST_RIS R. % V_P0_PH ST0GP R 0.0KΩ STGP R 0.0KΩ.V LN L LN Phy LM US.0 EJ MI_N_TXN0 MI_N_TXP0 MI_N_RXN0 MI_N_RXP0 MI_N_TXN MI_N_TXP MI_N_RXN MI_N_RXP MI_N_TXN MI_N_TXP MI_N_RXN MI_N_RXP MI_N_TXN MI_N_TXP MI_N_RXN MI_N_RXP R. % PH_MI_OMP V_P0_PH 00M_MI_PH_N 00M_MI_PH_P PIE_IN PIE_IP PIE_ON PIE_ON 0.u X_0V PIE_OP PIE_OP 0.u X_0V 0 PIE_IN 0 PIE_IP 0 PIE_ON PIE_ON 0 0.u X_0V 0 PIE_OP PIE_OP 0.u X_0V PIE_IN PIE_IP PIE_ON 0 0.u X_0V PIE_OP 0 0.u X_0V PIE_IN PIE_IP PIE_ON 0 0.u X_0V PIE_OP 0 0.u X_0V PIE_IN PIE_IP PIE_ON 0 0.u X_0V PIE_OP 0 0.u X_0V PIE_IN PIE_IP PIE_ON 0 0.u X_0V PIE_OP 0 0.u X_0V H PIe Ports & are isable. J H P R H J E F M P E P R J0 L0 F F P0 R0 H J E P M F E N M J L J H F F H0 J0 REV.0 MI0RXN USP0N MI0RXP USP0P MI0TXN USPN MI0TXP USPP MIRXN USPN MIRXP USPP MITXN USPN MITXP USPP MIRXN USPN MIRXP USPP MITXN USPN MITXP USPP MIRXN USPN MIRXP USPP MITXN USPN MITXP USPP MI_IROMP USPN MI_ZOMP USPP USPN LKIN_MI_N USPP LKIN_MI_P USP0N USP0P PERN USPN PERP USPP PETN USPP PETP USPN PERN USPP PERP USPN PETN PETP O0#_GPIO PERN O#_GPIO0 PERP O#_GPIO PETN O#_GPIO PETP O#_GPIO PERN O#_GPIO PERP O#_GPIO0 PETN O#_GPIO PETP PERN USRIS# PERP USRIS PETN PETP LKIN_OT_N PERN LKIN_OT_P PERP PETN MIRIS PETP PERN PERP PETN PETP PERN PERP PETN PETP OF 0 H_FG_SM_PIN MI PI-E US F M M T U R T N M0 K J F N R R T K J J K F K J M G K P J T M P M F -USP0 USP0 -USP USP -USP USP -USP USP -USP USP -USP USP US Ports & are isable. -USP USP -USP USP -USP0 USP0 H US Ports, &, are isable. PH_US_O0 PH_US_O0 PH_US_O PH_US_O PH_US_O PH_US_O PH_US_O PH_US_O PH_US_O PH_US_O PH_US_RIS R.0ohm LK_M_REF_N LK_M_REF_P RIS_PY R 0 %.V R R R0 R R 0.0KΩ 0.0KΩ 0.0KΩ 0.0KΩ 0.0KΩ PH_GP_PU PH_GP_PU PH_GP_PU PH_GP_PU PH_GP_PU HOST STOMPI STROMPO TP STRIS 0GTE INIT_V# RIN# SERIRQ THRMTRIP# PEI PMSYNH E E E0 N G V E H F PH_ST_OMP R. % V_P0_PH RIS_ST R 0 % 0GTE INIT_V KRST_N SERIRQ PH_THRMTRP# PH_PEI H_PM_SYN0.V R00 R.V R R oard I PH_GP_PU IT 0 PH_GP0_PU IT H_FG_SM_PIN OF 0.V R0 0.0KΩ PH_GP_PU IT I PH_GP_PU PH_GP_PU TP TP oard I PH_GP_PU PH_GP0_PU PH_GP_PU Version Hi Low Hi Low Hi Low Sample Low Low Hi Low Low Hi Hi Hi Hi Hi Low Low Hi Low Hi Low Hi Low QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: PH_PI/PIE/ST_/ rian Lee Size ocument Number Rev VS-00 Wednesday, March, 0 ate: Sheet of.0

14 V_P_STY\G V_P_ R 0.0KΩ R R 0.0KΩ 0.0KΩ GPIO_PU GPIO_RF_OFF# TX_ET.V 0 L0 K, L0 L J, L L J0, L L G0, L -LRQ0 K -LRQ0 -LFRME G, -LFRME Z_ITLK R.0Ω H_ITLK U Z_RST# R0.0Ω H_RST# F Z_SIN K Z_SIN J Z_SOUT R0.0Ω H_SOUT T Z_SYN R.0Ω H_SYN P SPI_MOSI U SPI_MOSI SPI_MISO SPI_MISO T -SPI_S0 -SPI_S0 T SPI_LK R.0Ω SPI_LK_R R -SPI_S -SPI_S R RT_X R RT_X N -RTRST T -SRTRST N RTV R.0MΩ PH_INTRUER_N M PWRG_V J PWRG_V -RSMRST K -RSMRST INTVRMEN N PH_PWROK T PH_PWROK SWOVREN R SM_LINK_LERT# N SM_LINK_LERT# SMLK_RESUME T SMT_RESUME R SML_LERT#0 U 0 SML_LK0 SML_LK0 T SML_T0 M0 0 SML_T0 LN_ISLE# R LN_ISLE# SML_LK J SML_T K PH REV.0 MUSY#_GPIO0 LRQ#_GPIO LKRUN#_GPIO FWH0_L0 H_OK_EN#_GPIO FWH_L STP_PI#_GPIO FWH_L GPIO FWH_L LRQ0# GPIO FWH_LFRME# LN_PHY_PWR_TRL_GPIO H_OK_RST#_GPIO H_LK GPIO H_RST# GPIO_MEM_LE H_SIN0 GPIO H_SIN SLP_LN#_GPIO H_SIN PIELKRQ#_GPIO0 H_SIN PIELKRQ#_GPIO H_SO PIELKRQ#_GPIO H_SYN PIELKRQ#_GPIO GPIO SPI_MOSI SYS_PWROK SPI_MISO RI# SPI_S0# PLTRST# SPI_LK WKE# SPI_S# SLP_# SLP_S# SLP_S# SLP_S#_GPIO SUS_STT#_GPIO SUSLK_GPIO TLOW#_GPIO SUSK# RTX SUSWRN#-SUS_PWR_N_K-GPIO0 RTX RMPWROK RTRST# SRTRST# INTRUER# GPIO PWROK RSMRST# GPIO INTVRMEN SLP_SUS# PWROK PWRTN# SWVRMEN SYS_RESET# SPKR SMLERT#_GPIO SMLK SMT SML0LERT#_GPIO0 PROPWRG SML0LK SML0T SMLLERT#_PHHOT#_GPIO SMLLK_GPIO SMLT_GPIO TP JTG_TK JTG_TI JTG_TO OF 0 JTG_TMS H_FG_SM_PIN PM_GPIO(SW) JTG(SUS) WPRESENE# PRESENE# TP SOP_EN_GP L TP PH_PU_GP J TX_ET P IG_EN_N K0 LN_ISLE# LN_ISLE# 0 -LPPME -LPPME M _WTT_TRL_ P GPIO_MT_LE J TP V_MINI_PIE_EN H SLP_LN_N V PH_GP0_PU SLP_LN_N L PH_GP V PH_GP P PH_GP T GP_SV_ETET J VRMPWRG J VRMPWRG, -RI K PH_PLT_RST# PIE_WKE# PIE_WKE#,,, PH_SLP_ M -SLP_S PH_SLP_,0 -SLP_S,,,, N -SLP_S -SLP_S, H0 -SLP_S N TP LPP_N TP SUSLK V TP _WTT_TRL_ P U SUS_PWR_K SUS_WRN G SUS_WRN H_RMPWRG H_RMPWRG R.K % J GPIO_RF_OFF# GPIO_RF_OFF# G GPIO_PU SLP_SUS T SLP_SUS PWRTSW E FP_RST# E FP_RST#, SPKR SPKR H_PWRG H_PWRG PH_TRST# PH_TK PH_TI F PH_TO 0 PH_TMS R R R R R V_P_STY\G R R R R0 R R R0 R0 R R R R0 R R0 R R00 R R R 0.0KΩ 0.0KΩ 0.0KΩ 0.0KΩ.0KΩ 0.0KΩ.0KΩ 0.0KΩ.KΩ.KΩ 0.0KΩ 0.0KΩ 0.0KΩ 0.0KΩ 0.0KΩ 0.0KΩ 0.0KΩ 0.0KΩ PH_PU_GP PH_GP0_PU FP_RST# SMLK_MIN SMT_MIN H_SOUT -LPPME _WTT_TRL_ PH_GP PH_GP PH_GP -RI PIE_WKE# _WTT_TRL_ SMLK_RESUME SMT_RESUME SML_LERT#0 SML_LK0 SML_T0 SML_LK SML_T SM_LINK_LERT# PH_TRST# RTV R0 0K_ -SRTRST 0 U X_.V RTV R V_P_ R R VTTR0 K_ T_SOT T TTERY HOLER,PIN,0 0K_ 0K_ 0K_ 0 U X_.V NVR_LE SWOVREN INTVRMEN -RTRST 0 U X_.V PT_R PHE REV.0 M R RESERVE_ RESERVE_ Y F_TVS RESERVE_ M0 RESERVE_ RESERVE_ M RESERVE_ RESERVE_ U RESERVE_ RESERVE_ J RESERVE_ RESERVE_ RESERVE_ RESERVE_0 RESERVE_ RESERVE_ RESERVE_ RESERVE_0 RESERVE_ RESERVE_ RESERVE_ RESERVE_ RESERVE_ RESERVE_ RESERVE_ RESERVE_ RESERVE_ RESERVE_ RESERVE_ RESERVE_ NVRM OF 0 H_FG_SM_PIN 0 Y0 U R U0 U U H0 K L J F H E K0 K G Y L R0 RT_X 0 P N_0V R0 0.0MΩ X.KHZ RT_X 0 P N_0V QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: T R0 PH_LP/H/RT_/ rian Lee V,m,LI-LON Size ocument Number Rev ustom VS-00 Wednesday, March, 0 ate: Sheet of.0

15 PHH PT_R PHF PT_R PLK_SIO TPMPLK PLK_P_F SIOM V_P0_PH R _ T SIO R _ N TPM T T R0 _ T PI Feedack T W R _ SIO MHz R 0.Ω_±% L K_M_PH N R FOR I MOE 0K_ PH_XTL J PH_XTL J LKOUT_PI0 LKOUT_PI LKOUT_PI LKOUT_PI LKOUT_PI LKOUTFLEX0_GPIO LKOUTFLEX_GPIO LKOUTFLEX_GPIO LKOUTFLEX_GPIO XLK_ROMP REFLKIN XTL_OUT XTL_IN REV.0 LKIN_GN_N LKIN_GN_P LKIN_GN0_N LKIN_GN0_P LKOUT_ITPXP_N LKOUT_ITPXP_P LKOUT_PIEN LKOUT_PIEP LKOUT_MI_N LKOUT_MI_P LKOUT_P_N LKOUT_P_P LKOUT_PIE0N LKOUT_PIE0P LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PEG N LKOUT_PEG P LKOUT_PEG N LKOUT_PEG P R P W V R N E F P R N M E W Y Y F G G G E E LK_00M_PHY_PH_IN_N LK_00M_PHY_PH_IN_P LK_SI_PH_IN_N LK_SI_PH_IN_P K_PE_00M_MP_N K_PE_00M_MP_P LK_PIE_LN# LK_PIE_LN LK_PIE_LN# LK_PIE_LN LK_PIE_# LK_PIE_ LK_PIE_# LK_PIE_ LK_PIE_# LK_PIE_ LK_PIE_EJ# LK_PIE_EJ LK_EXP_SLOT- LK_EXP_SLOT P_HP_Q T P_HP_Q N P_HP_Q M R R P_UX_P U P_UX_N U P_UX_P N K_PE_00M_MP_N P_UX_P P_UX_N R K_PE_00M_MP_P P_UX_N R R M M LK_PIE_LN# H LK_PIE_LN K L LK_PIE_LN# 0 M LK_PIE_LN 0 N_TMS T L N_TMS T N_TMS T# J LK_PIE_# FOR PIE* SLOT N_TMS T# N_TMS T G LK_PIE_ N_TMS T N_TMS T# G N_TMS T# N_TMS T0 F LK_PIE_# FOR Mini-PIE SOKET N_TMS T0 N_TMS T0# F LK_PIE_ N_TMS T0# N_TMS LK E N_TMS LK N_TMS LK# E LK_PIE_# FOR PIE* SLOT N_TMS LK# N_TMS T0 LK_PIE_ N_TMS T0 N_TMS T0# N_TMS T0# N_TMS T LK_PIE_EJ# N_TMS T N_TMS T# LK_PIE_EJ N_TMS T# N_TMS T N_TMS T N_TMS T# N_TMS T# N_TMS LK E N_TMS LK N_TMS LK# N_TMS LK# LK_EXP_SLOT- LK_EXP_SLOT Port to external isplasyport U T W U P_HP P_HP P_HP P_UXP P_UXN P_UXP P_UXN P_UXP P_UXN P_0P P_0N P_P P_N P_P P_N P_P P_N P_0P P_0N P_P P_N P_P P_N P_P P_N P_0P P_0N P_P P_N P_P P_N P_P P_N SVO_INTP SVO_INTN SVO_STLLP SVO_STLLN REV.0 RT_HSYN RT_VSYN RT_RE RT_GREEN RT_LUE RT_IRTN RT T RT LK _IREF TP TP TP TP P_TRLLK P_TRLT P_TRLLK P_TRLT R HSYN R R VSYN R N N M M W W T VG_REFSET Y Y L P_TRL_LK L P_TRL_T L P_TRL_LK UF_HSYN UF_VSYN RT_RE RT_GREEN RT_LUE RT T RT LK P_TRL_LK P_TRL_T P_TRL_LK P_TRL_T I Port etect Port detected SVO_TRL_ T 0 Port not detected SVO_TRL_LK SVO_TRL_T I Port etect Port detected P_TRL_T 0 Port not detected Pull-up enables P/HMI on Port No-onnect disables Port P_TRL_LK P_TRL_T I Port etect Port detected P_TRL_T 0 Port not detected Pull-up enables ep/p/hmi on Port No onnect disables I Port P_TRL_LK P_TRL_T R R R R U U SVO_TVLKINP SVO_TVLKINN SVO_TRLLK SVO_TRLT L L SVO_TRL_LK SVO_TRL_T H_FG_SM_PIN OF 0 PH_XTL R M_ PH_XTL P N_0V X MHz P N_0V PHG PT_R REV.0 Unused in I and T Mode H_FG_SM_PIN OF 0 0/0/, ->P N_0 N_0 N_0 N_0 PLK_P_F P_HP_Q US_RX_N US_RX_P US_TX_N US_TX_P US_RX_N US_RX_P US_TX_N US_TX_P H J E J L F E J L L J TP TP TP TP TP TP TP0 TP TP TP TP TP TP TP TP TP FILINK FI_RXN0 FI_RXP0 FI_RXN FI_RXP FI_RXN FI_RXP FI_RXN FI_RXP FI_RXN FI_RXP FI_RXN FI_RXP FI_RXN FI_RXP FI_RXN FI_RXP FI_FSYN0 FI_LSYN0 FI_FSYN FI_LSYN FI_INT F F H J J H M P E H FI_TX_N0 FI_TX_P0 FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_TX_N FI_TX_P FI_FSYN0 FI_LSYN0 FI_FSYN FI_LSYN FI_INT R 0.0KΩ LK_SI_PH_IN_N R 0.0KΩ LK_SI_PH_IN_P R 0.0KΩ LK_00M_PHY_PH_IN_N R 0.0KΩ LK_00M_PHY_PH_IN_P R.0Kohm_/-% VG_REFSET R _ RT_RE R _ RT_GREEN R _ RT_LUE R0 00K_ V Rev:.0 OF 0 H_FG_SM_PIN = SVO/RT = FI = LKOUT G P_HP_Q S N_TMS HP R 00K_ P_UX_P Q R SS_SOT 00K_.V R 00K_ P_UX_N V G P_HP_Q S N_TMS HP Q R SS_SOT 00K_ QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: PH_RT/SVO/LKO_/ rian Lee Size ocument Number Rev ustom.0 VS-00 Wednesday, March, 0 ate: Sheet of

16 PH ORE:. SW:. 0m for EMI Suggestion. Selection of I/O voltage for the High efinition udio dd V._H_IO power. These pins can be as no connect V_REFV_SUS V_REFV V_REFV_SUS V_REFV VSUSH VST_PLL_PH VMI_PLL_PH VUS_PLL_PH _PLL _PLL V_P F_R V_P0_PH_SR V_P F_R VUS_PLL_PH VMI_PLL_PH VST_PLL_PH _PLL _PLL V_P0_PH_SR VSUSH.V V_P0_PH V_P0_PH V_P0_ME V_PU_VIO V_PU_VIO V_P0_PH V_P0_PH V_P0_PH V.V V_P_STY\G V_P0_STY\G V_P_ V_P_STY\G.V V_P0_PH V_P_SFR RTV.V V_P0_PH V_P0_PH V_P0_PH V_P0_PH V_P0_ME V_P0_ME V_P0_PH V_P_SFR V V._H_IO VSUSH V_P_LN Size ocument Number Rev ate: Sheet of VS-00.0 PH_PWR/GN_/ QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: ustom Wednesday, March, 0 rian Lee Size ocument Number Rev ate: Sheet of VS-00.0 PH_PWR/GN_/ QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: ustom Wednesday, March, 0 rian Lee Size ocument Number Rev ate: Sheet of VS-00.0 PH_PWR/GN_/ QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: ustom Wednesday, March, 0 rian Lee u Y_.V 0 u Y_.V R 0_ u Y_.V Q T_SOT 0 0.u X_0 0 0.u X_0 0 0.u X_0 0.u X_0 0.u X_0 0 0.u X_0 TP TP0 0.u X_0 Q T_SOT 0.u X_0 0 0.u X_0 0.u X_0 0.u X_0 0.u X_0 0.u X_0 u Y_.V 0.u X_0 000P_X_0V 0.u X_0 L0 0uH 0m TP L0 0uH 0m 0.u X_0 u Y_.V 0.u X_0 L 0uH 0m 0u X_0V 0.u X_0 L 0uH 0m TP 0.u X_0 000P_X_0V u Y_.V 0.u X_0 0.u X_0 0.u X_0 0.u X_0 0.u X_0 u Y_._N 0.u X_0 0.u X_0 0.u X_0 TP PT_R REV.0 OF 0 PHI H_FG_SM_PIN VMI_ E VSW_ G VSW_ J VIO_ V VIO_ Y0 VIO_ Y VIO_ Y VIO_ F0 VMI_ VIO_ L0 VIO_ N0 VIO_0 N VPLLMI VLK L VFIPLL VPLLEXP VIO_ VPLLST U VIO_ G VIO_ G0 VIO_0 G VIO_ Y VIO_ VIO_ VIO_ Y VIO_ Y0 VIO_0 Y VIO_ V VIO_ V VIO_ V VIO_ V VIO_ F0 VIO_ Y VIO_ J VIO_ Y VIO_ V VIO_ Y VIO_ Y VIO_ V VIO_ V VSS_ E0 VSS_ 0 VIO_ E0 VLKMI J0 VIFFLKN_ G VIFFLKN_ E VIFFLKN_ E VSW_ U VSW_ V VSW_ U VSW_ U VSW_ U0 VSW_ R VSW_0 R VSW_ R0 VSW_ R VSW_ R VSW_ R VSW_ N VSW_ N VSW_ N VSW_ N VSW_ L VSW_0 L VSW_ J VSW_ J VSW_ G VSW_ G VORE_ VORE_ VORE_ VORE_ 0 VORE_ VORE_ E VORE_ E VORE_ E0 VORE_ E VORE_0 E VORE_ E VORE_ G VORE_ G VORE_ J VORE_ J VORE_ J VORE_ L VORE_ L VORE_ N VORE_0 N VORE_ R VORE_ R TP 0u X_0V 0.u X_0 F F_0 00M 0 u Y_.V 0.u X_0 0 u X_.V R 0_ 000P_X_0V PHL H_FG_SM_PIN TP L TP E TP TP Y TP Y TP0 Y TP P TP M _ P _ R _ P _ R TP L TP L _ L _ L _ U TP E TP E _ U TP _ U _ U _ U _ U _ V0 _ V _ V _ W _ W TP0 M _ Y L_KLTTL G L_KLTEN G L_V_EN G _ Y _ Y _ Y _ Y _ Y _0 Y _ L _ L _ L _ L _ L _ M0 _ M _ M _ M _0 M _0 T _ T _ U _ U _ U _ U0 _ U _ U _0 U _0 W _ Y _ Y _ Y0 _NTF NTF NTF NTF_ M _NTF_ M _NTF_ P _NTF_ P _NTF_ T _NTF_ U _NTF_0 U _NTF_ U _NTF_ U _NTF NTF_ F _ Y E _ R U TS_ TS_ TS_ F TS_ PHK H_FG_SM_PIN VREF F VVRM_ J VVRM_ R V U0 V 0 V0 V U VREF_SUS T VVRM_ R VSUSH V VVRM_ R VSPI N V L V N V V V 0 V V F VPNN_0 T VPNN_0 T VSUS T VSUS V0 VSUS V VSUS Y VSUS Y VSUS J VSUS K VSUS M VSUS T0 VSUS 0 U VSUS U VSW_ V0 V_PRO_IO V_PRO_IO_NTF PSUS_ PSUS_ VRT U PRT R PRT_NTF T PSUS_ T PSUSYP V PSST VPLL VPLL V T 0u X_0V u Y_.V 0 0.u X_0 TP 000P_X_0V u Y_.V 0 u Y_.V 0.u X_ P_X_0V PT_R REV.0 0 OF 0 PHJ H_FG_SM_PIN _0 K _ K _ K _ J _ J _ J _ J _ J _ J _ H _0 H _ H _ H _ H _ H0 _ H _ G _ Y _ Y _0 W _0 V _0 V _0 V _0 V _0 V _0 V _ F _ F0 _ F _0 F _0 F _0 F0 _0 F _0 F _0 F _0 F _0 F _0 F _0 F _00 F _ F0 _ E _ E _ E _ E _ E 0 _ U _ U _ U _0 U _ U _ R _ R _ P _ P _ P _ N _ N _ N _0 M _ M _ M _ M0 _ M _ M _ M _ M _ M _ M _0 M _ M0 _ K _ K _ K _ K0 _ J _ J _ H _ H _0 G _ G _ G _ G _ G _ G _ G _ F _ F _ F _0 F _ F _ F _ F _ F0 _ F _0 0 R _ R _ R _ R _ R _ R _ R _ R _ R _0 N _ N _ M _ M _ M _ M _ M _ M _ M _ M _0 0 V _0 U _0 U _00 U _ U _ T _ T _ T _ T _ T _ T _ T _ R _0 R _ R _ R0 _ N _ N _ N _ N _ N _ N _ N0 _0 N0 _ N _ N _ N _ N _ N _ M _ M _ M _ L _0 L _ L _ L _ L0 _ L _ L _ L0 _ L _ L _ K _0 K _ J0 _ J _ H _ H _0 G _ G _ G0 _ F _0 E _ E _ E _ E _ E _ E _ E 0 _0 _ _ J _ G _ G0 _ G _ G _ G _ G _ G0 _ G _ G _ F _ E _ E 0 _ 0u X_0V TP 0 000P_X_0V 0.u X_0 0.u X_0 0.u X_0 0u X_0V

17 00 Remove no use VG circuit items V RT_RE L R UF_HSYN UF_HSYN V_HSYN RT Port RT_GREEN % % N_0V N_0V UF_VSYN UF_VSYN V V_VSYN RT T.V R G V_HSYN V_VSYN R.K_ RT T VG 0 HEER x,0pin,0,p:.mm RT T RT LK.V RT_LUE N_0V RT LK R.K_ RT LK QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: RT/ST/mST rian Lee Size ocument Number Rev.0 VS-00 ate: Wednesday, March, 0 Sheet of

18 0-0-0 hange HMI to P SMEI SM: FKN-H HF TI SNPRGZR: FKN RS K % N_TMS HP P_TRL_T P_TRL_LK SM_G HMI_PIN TMS T0 TMS T# 0.u X_0V TMS T0# TMS T 0.u X_0V N_TMS T0# N_TMS T N_TMS T0 N_TMS LK N_TMS LK#.V N_TMS HP P_TRL_T P_TRL_LK R 0.u X_0V SM_G0 SM_G 0.u X_0V 0.u X_0V 0.u X_0V TMS LK TMS LK# 0 U SM HMI_PIN GN VV G_0 G_ GN0 NLOG(REXT) HP_SOURE S_SOURE SL_SOURE G_ VV0 GN HMI_PIN0 0 GN EQ_ EQ_0 VV _EN GN HP_SINK 0 S_SINK SL_SINK GN VV OE# 0 TMS T# TMS T 0 0.u X_0V 0.u X_0V 0.u X_0V 0.u X_0 N_TMS T# N_TMS T# N_TMS T HMI_T HMI_T HMI_PIN HMI EN HMI_HP HMI_S HMI_SL.V V 0.U X_0V HMI Port HMI_PWR F FUSE._V HMI_PWR PF_X_0V.0UF_X_V UF_.V R - R --- EMI HMI SOLUTION SUGGESTION R.K_ HMI_T_L HMI_T#_L HMI_T_L HMI_T#_L HMI_T0_L HMI_T0#_L HMI_LK_L HMI_LK#_L HMI_E HMI_SL HMI_S HMI_HP IN_ IN_- VV IN_ IN_- GN IN_ IN_- VV IN_ IN_- GN OUT_ OUT_- VV OUT_ OUT_- GN OUT_ OUT_- VV OUT_ OUT_- GN GN HMI_N G SHELL G SHELL SHIEL - SHIEL SHIEL 0 0- K K SHIEL K- E REMOTE N LK T GN V HP ET G SHELL G SHELL 0-Header,PIN,0,0.MM Short P R Short P R0 0_ R 0_ Place on the ottom Side PIN 0 -Internal Pull Low.(SM) HMI_PIN HMI_PIN HMI_LK# HMI_LK L HMI_LK#_L HMI_LK_L GLEM0H-00QT R 0.0ohm HMI_LK# HMI_LK HMI_T HMI_T# HMI_T0# HMI_T0 L HMI_T0#_L R HMI_T0_L 0.0ohm HMI_T0# HMI_T GLEM0H-00QT HMI_T0 HMI_T# HMI_T# L HMI_T#_L R 0.0ohm HMI_T GLEM0H-00QT HMI_T_L HMI_T# L HMI_T#_L R 0.0ohm HMI_T GLEM0H-00QT HMI_T_L.V L F 00M HMI_PIN 0.u X_0.V.V.V L F 00M HMI_PIN 0u X_0V 0.u X_0 SM_G SM_G SM_G0 L0 F 00M HMI_PIN FG= u X_0 L F 00M 0 0u X_0V HMI_PIN 0.u X_0 SM:00->Internal efault Value. G_ G_ G_0 Swing Pre-amp Pin0 Pin Pin Slew rate mV 0d 0d L F 00M HMI_PIN0 0 0.u X_ mV 0d -d 0 0 0mV 0d -d 0 0mV 0d -d 0 0 0mV 0d 0d L F 00M 0 0u X_0V HMI_PIN 0 0.u X_0 0 00mV d 0d 0 00mV d 0d 0mV 0d 0d QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: HMI_SM rian Lee Size ocument Number Rev VS-00 Wednesday, March, 0 ate: Sheet of.0

19 V.LN _VLN T / LINK LE SPEE LE Status escription Status escription 0.U X_0V 0.U X_0V 0.U X_0V 0.U X_0V 0 0U X_0V 0U X_0V 0.U X_0V 0.U X_0V 0.U X_0V 0.U X_0V 0U X_0V U X_0V Modify V.0 OFF YELLOW No Link Link OFF GREEN 0 Mbps connection 00 Mbps connection LINKING ata activity ORNGE Gbps connection _0VLN V.LN 0.U X_0V 0.U X_0V 0.U X_0V 0.U X_0V 0.U X_0V 0.U X_0V 0.U X_0V 0U X_0V 0 0U X_0V 0U X_0V 0 0U X_0V 0U X_0V V.LN LN_US_ R 0_ R 0_ R 0_ R 0_ PIE_OP PIE_ON 0.U Y_V PIE_IP 0 0.U Y_V PIE_IN LK_PIE_LN LK_PIE_LN LK_PIE_LN# LK_PIE_LN#,,, PIE_WKE# PLT_RST#,0,,,, PLT_RST# LN_ISLE# LN_ISLE# V.LN R K % V.LN R SM_LINK_LERT#,, SMT_RESUME,, SMLK_RESUME 0K_ PIE_OP PIE_ON PIE_IP_ PIE_IN_ LN_ISLE# L_TESTEN_ L_TK_ L_TMS_ 0 0 U PE_RP PE_RN PE_TP PE_TN PELKP PELKN PE_WKE PE_RST EV_OFF TEST_EN UX_PWR/JTG_TK NVMT/JTG_TMS JTG_TI SM_LRT SM_T SM_LK intel L VP VP VP# VP# VP# VP# VP# VP# VP0 VP0# VP0# VP0# VP0# VP0# VP0# VP VP VP/VP 0 0 _VLN _VLN/0. _0VLN _0VLN/0. V.LN.V_UL/0.00 _VLN F F0 00M TRP0 TRN0 TRP TRN TRP TRN TRP TRN 0.U Y_V 0 M M- M0 M0- M M- M M- L_00- L_000- L_LINK_T- Short P T GN YELLOW LEFT-P LEFT-N RIGHT-P RIGHT-N GREEN FG FG FG FG FG 0 FG FG FG RJ US* W/LE W/TRNSFORMER,PIN,0, F LN_IO_GN Short P Short P R LN_IO_GN R.K % TESTP TESTN RSET LE0 LE LE L_LINK_T- 0 L_000- L_00- L_LINK_T- V.LN X MHz 0 P N_0V L_NVM_SO_ L_NVM_SK_ L_NVM_SI_ L_NVM_S#_ 0 P N_0V R. % LN_PIN LN_PIN N_TX0_ N_TX_ NVM_SO NVM_SK NVM_SI NVM_S XTL XTL N_SI_LK_IN N_SI_TX_EN N_SI_TX0 N_SI_TX N_SI_RS_V N_SI_RX0 N_SI_RX WGL MI_PLUS[0] MI_MINUS[0] MI_PLUS[] MI_MINUS[] MI_PLUS[] MI_MINUS[] 0 MI_PLUS[] MI_MINUS[] TRL0 TRL IS_REG0 GN TRP0 TRN0 TRP TRN TRP TRN TRP TRN L_TL0_ L_TL_ L_IS_TRL_ R.K % L_TL_ E 0.U X_0V/N PT Q F F0 0U X_0V 0.U X_0V _VLN 0U X_0V 0.U X_0V 0U X_0V 0U X_0V LN_PIN LN_PIN R R K % K % V=0K ohm,l=k ohm V.LN R K %/N L_NVM_S#_ L_NVM_SO_ R U S# SO WP# GN K % V HOL# SK SI T0N_SO R K % L_NVM_SK_ L_NVM_SI_ V.LN 未未 FW: FKN HF 已已已 FW: FKN (00 update) 0.U X_0V N_TX_ R K % L N_TX0_ R0 K % L V.LN R K % L_TMS_ R K %/N L_TESTEN_ R K % Internal _0V internal _0V disabled V.LN 0 internal _0V enabled R K %/N L_IS_TRL_ R K N_0V L_00- L_000- N_0V IM-00 : hange to L el : R, R0, R, R, R, R, R, R, R, R dd :. R, R, R0. R, R hange: U RS => RS efault: WOL Enable F F0 V.LN V_P_LN FOR FUTURE USE V_P_LN will auto switch QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: LN Intel WGL rian Lee Size ocument Number Rev ustom VS-00 Wednesday, March, 0 ate: Sheet of.0

20 V_P_LN,,,,, PLT_RST# LK_PIE_LN LK_PIE_LN# PIE_IP PIE_IN PIE_OP PIE_ON SML_LK0 SML_T0 V_P_LN LN_ISLE# X L_XTL L_XTL MHz 00 P N_0V P N_0V R0 0K_ LKREQ_N LK_PIE_LN LK_PIE_LN# V_P_LN SML_LK0 SML_T0 TP TP LN_ISLE# R 0K_ R0 0K_ L_XTL L_XTL _TESTEN R K RIS 0.U X_0VPIE_IP_ 0.U X_0VPIE_IN_ R0 0K_ 0 0 R.Kohm_/-% U0 LK_REQ_N PE_RST_N PE_LKP PE_LKN PETp PETn PERp PERn SM_LK SM_T LN_ISLE_N LE0 LE LE JTG_TI JTG_TO JTG_TMS JTG_TK XTL_OUT XTL_IN TEST_EN RIS JTG LE PIE SMUS MI MI_PLUS0 MI_MINUS0 MI_PLUS MI_MINUS MI_PLUS MI_MINUS MI_PLUS MI_MINUS RSV_N RSV_VP_ RSV_VP_ VP_IN VP_OUT VP_ VP_ VP_ VP0_ VP0_ VP0_ VP0_ VP0_ VP0_0 VP0_ VP0_ VP0_ TRL_P0 0 0 _EP TRP0 TRN0 TRP TRN TRP TRN TRP TRN LNVP L_LN_TRL0 _0VLN V_P_LN R0 K % 0 U X_.V 0.U Y_V 0.U Y_V L.UH_. R0 K % _0VLN 0 U X_.V Status OFF YELLOW LINKING _0VLN T / LINK LE escription No Link Link ata activity TRP0 TRN0 TRP TRN TRP TRN TRP TRN F0 F0 00M 0 V_P_LN Status OFF GREEN ORNGE 0.U Y_V 000P X_0V 000P X_0V 000P X_0V LN_US_ M M- M0 M0- M M- M M- L_LINK_T- L_LINK_T- T GN SPEE LE escription 0 Mbps connection 00 Mbps connection Gbps connection YELLOW LEFT-P LEFT-N RIGHT-P RIGHT-N GREEN FG FG FG FG FG 0 FG FG FG F V_P_LN R 0_ Short P Short P R 0_ R0 0_ R 0_ L_LINK_T- L_000- L_00- L_00- L_000-0.U Y_V RJ US* W/LE W/TRNSFORMER,PIN,0, LN_IO_GN R 0_ R Short P _0VLN V_P_LN U X_.V 000P X_0V 0.U Y_V 0U X_0V 0.U Y_V 0.U Y_V 0 0.U Y_V 0 0.U Y_V 0.U Y_V 0 0.U Y_V 0.U Y_V LN_IO_GN LN_IO_GN _0VLN 000P X_0V 000P X_0V 000P X_0V 000P X_0V QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: LN Phy Intel LM rian Lee Size ocument Number Rev.0 VS-00 ate: Wednesday, March, 0 Sheet 0 of

21 OUTR ROUTR R _ F LOUT_R 0U_TN_SM_.V OUTL ROUTL R _ F_0 00M F LOUT_L 0U_TN_SM_.V Line Out R K_ U_GN R K_ F_0 00M 00.0PF_N_0V 00.0PF_N_0V U_GN U_GN F Short P J 0-udio Jack,PIN,0,P=.MM PJK_GN LOUT_L LOUT_R MI_VREFO_R MI_VREFO_L R.K_ R.K_ MI_L MI_R G G G G N MIR MIL.0UF_X_.V.0UF_X_.V R _ R _ F F_0 00M F0 MI_R MI_L PJK_GN R K_ R K_ F_0 00M 00.0PF_N_0V 00.0PF_N_0V MI In U_GN U_GN U_GN OUTL OUTR U_GN MI_VREFO_R MI_VREFO_L 0.0UF_X_0V U_GN V_UIO V_UIO 0.0UF_X_0V 0.UF_Y_V U_GN U_GN U_GN R 0.0KΩ 0 N V SURR-OUT-L JREF FRONT-OUT-R FRONT-OUT-L Sense N MI-VREFO-R LINE-VREFO MI-VREFO 0 N MI-VREFO-L VREF V U LINE-R LINE-L MI-R MI-L 0.UF_Y_V 0.0UF_X_0V U_GN MIR MIL V_UIO: V L Z=0 OHM_ V_UIO 0.UF_Y_V 0.UF_Y_V 0.0UF_X_0V U_GN SURR-OUT-R EN L-GR -R 0 -GN -L U_GN U_GN nalog igital.v V_UIO F 0Ω. V_UIO 0 0.0UF_X_.V 0.UF_Y_V 0.UF_Y_V LFE N N EP SPIFO V GPIO0 GPIO ST-OUT IT-LK ST-IN V SYN RESET# PEEP 0 MI-R MI-L LINE-R LINE-L Sense _EEP SENSE_ R R.0UF_X_.V 00.0PF_N_0V.K 0.0KΩ nalog igital R.0KΩ R.K_ U_GN Z_PEEP V_P_ U X_.V Power Supply for High efiniton udio I Q IN OUT OUT J/GN MS_SOT O O 0.UF_Y_V VOUT=.*(R/R) R R R V._H_IO/ % R.ohm V._H_IO U X_.V PRESENE# Z_SOUT 0// OM changed Z_ITLK F Z_SIN R.0Ω Short P Z_SYN F N_0V Short P U_GN V._H_IO V._H_IO 0 0.0UF_X_0V 0.UF_Y_V heck H POWER for HMI Function H udio_l QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: rian Lee Size ocument Number Rev VS-00 PRO Wednesday, March, 0 ate: Sheet of.

22 Intel PEI (Platform Environment ontrol Interface) H_PEI H_PEI R 00K_ RTV TXPWROK R.K_ V V_P_STY\G P N_0V/N F T00U0_OHM_00M TMPIN TMPIN TMPIN SIOVREF VIN VIN VIN VIN Near SIO pin 000P X_0V/N -SEOPEN PU_THEM- NWS TXPWROK V_P_ SIO_PIRST SIO_PIRST SIO_PIRST TXPWROK,.K_ SIO_PWROK -IO_PSON -SLP_S PWRTSW -PWRTSW -LPPME -SLP_S KLK KT MLK MT I_VS SIO_OVT# R LE_V -RSMRST -IO_PSON -SLP_S,,,, PWRTSW -PWRTSW -LPPME -SLP_S, -RSMRST internal stby.v from VS US_LE# LE_V 0 0.UF_Y_V V_P_ R K_ GP LE_V: PWR_LE for, bay model 0: LE off : LE on -IO_PSON KLK KT MLK MT LE_V R RN R V_P0_.K_ V.K_PR0.V.K_.V VIN VIN SIO_SLT SIO_PE STS_GRN# STS_GRN# STS_RE# H power enable: High STS_RE# active default: low GP_HPWREN GP_HPWREN GP_HPWREN GPO_HER0 US_SMI GPO_HER GPO_HER GPO_HER GPO_HER GPO_HER GPO_HER 00 URT & GPO_HER URT exchange to satisfiy SW setting # RI# TS# TR# RTS# RTS# SR# SOUT SOUT SIN SIN # RI# Y_V RN.K_PR0 R.K_ # RI# TS# SR# 0.0UF_X_0V SIN 0 0.0UF_X_0V U VIN(VLT) VIN(VORE) VS SLT/GPIO0 PE/GPIO USY/GPIO K#/GPIO SLIN# INIT#/GPIO ERR#/GPIO F#/GPIO ST#/GPIO P0/GPIO0 P/GPIO P/GPIO P/GPIO P/GPIO P/GPIO P/GPIO P/GPIO GN # RI# TS# TR#/FN0_00 RTS#/STRP_PROTET SR# SOUT/STRPE_E SIN #/SEGG/GPIO0 RI#/SEGF/GPIO TS#/SEG/GPIO F_0 IO TP VIN(V) VIN(VIMM) VIN VIN VREF (PU) 0 GN(-) OPEN# VT RSMRST# PWOK PS_ON#/GPIO S# PSOUT#/GPIO 0 PSIN#/GPIO PME# TXPG_IN/GPIO S# PIRST# PIRST# PIRST# GN MLK MT KLK 0 KT I_VSV OVT# PU_PWG/GPIO GPIO/LE_V RTS# SR# SOUT SIN IN0 IN IN IN OUT0 OUT OUT OUT RT# TRK0# INEX# WPT# SKHG# F GPIO/TR#/SEG GPIO/RTS#/SEG GPIO/SR#/L# V GPIO/SOUT/SEG/STRP_PORT GPIO/SIN/SEGE GPIO0/ENSEL# GPIO/MO# GPIO/RV# GPIO/WT# GPIO/IR# GPIO/STEP# GPIO/HSEL# GPIO/WGTE# GPIO0/RT# GPIO/TRK0# GPIO/INEX# GPIO/WPT# GPIO/SKHG# GN FNIN FNTL FNIN FNTL GPIO0/FNIN GPIO/FNTL GPIO/IRTX GPIO/IRRX LRESET# LRQ# SERIRQ LFRM# GPIO/LE_VS/LERT# WTRST#/GPIO S0P_Gate#/GPIO/EEP GPIO/RSTON# GPIO/PI_RST#/S 0 GPIO0/PI_RST#/SL PEI/S IR_LE#/SL S_Gate#/GPIO0/WTRST# SP_Gate#/SLOTO#/GPIO0 SUS_WRN#/TIMING_ SUS_K#/TIMING_ STRP_TIMING IRRX#/GPIO0 0 IRTX/GPIO0 IRW#/GPIO0 GN SLP_SUS#/TIMING_ PWROK/TIMING_ VS ERP_TRL# ERP_TRL0# EVENT_IN0# G0 0 KRST# LKIN PILK V L L L L0 -LFRME SERIRQ -LRQ0 PLT_RST# GPIO GPIO FNOUT FNIO FNOUT FNIO FNOUT FNIO -LFRME, SERIRQ SIO_LERT# WTRST# S0P_GTE# SIO_S SIO_SL H_PEI S_GTE# SP_GTE# SUS_WRN#_SIO SIO_SUS_PWR_K STRP_TIMING IRRX SLP_SUS PH_PWROK ERP_TRL ERP_TRL0 SIO_WKE_EVENT# R 0K_ 0GTE 0GTE KRST_N SIOM KRST_N SIOM PLK_SIO L L L L0 -LRQ0 PLT_RST#,,0,,, GPIO GPIO FNOUT FNIO FNOUT FNIO FNOUT FNIO R R R TP SY_LE LE-Orange(00) TP 0_/N 0_/N 0_/N L, L, L, L0, FP_RST#, IRRX SLP_SUS 0.U Y_V SMT_MIN,, SMLK_MIN,, R 0_ V_P0_.V 0.U Y_V US_TN# V_P0_.V R.KΩ US_TN# 0.UF_Y_V V_P0_ R 0K_ ERP_TRL0 ERP_TRL0, R 0K_ ERP_TRL ERP_TRL SW & G' ONTROL INTRUSION ETET -SEOPEN R M_ 000P X_0V RTV H/W Monitor V_PU_ORE R R.V R V_P0_STY\G R V R VIN V R0 0K % R.0K % PU_THEM- 0 0.U Y_V/N S0P_GTE# R.K_ SIO_OVT# R.K_ SIO_LERT# R.K_.V SIO_PIRST RN.K_PR0 SIO_PIRST SIO_PIRST SIO_SLT 0K % VIN PU_THEM- 0.U Y_V/N 0K % VIN PU_THEM- 0.U Y_V/N 0K % VIN R0.K % PU_THEM- 0.U Y_V/N 0K % VIN R.K % PU_THEM- 0.U Y_V/N 0K % VIN R.K % PU_THEM- 0.U Y_V/N.V SIO_PE R R.K_ SW TMPIN 0.U Y_V T R0 0K % SIOVREF RT RT0K % THERM SENSOR 0.UF_Y_V 00.0Ω TS-0V_IP PU_THEM- placed near POWER solution System temperature sensing load default button TMPIN R 0K % SIOVREF 0 0.U Y_V T RT RT0K % SOUT SIN R 00.0Ω R00 R 00.0Ω R00 SOUT_L SIN_L 00 URT & URT exchange to satisfiy SW setting PU_THEM- placed near TX con. System temperature sensing V F 0Ω_ OM PORT for LM LMV 0.0UF_X_V SIN_L SOUT_L LM_N PIN,0,P:.0MM TMPIN 0.U Y_V T R 0K % SIOVREF RT RT0K % placed near SIO System temperature sensing PU_THEM- SIO Size ocument Number Rev VS-00 PRO QNP SYSTEMS, IN F, No., Sec., Xintai th Rd, Xizhi ity, Taipei ountry,, Taiwan TEL: FX:---0 Ryan Hsieh Wednesday, March, 0 ate: Sheet of.

23 OM RS ONN 00 URT & URT exchange to satisfiy SW setting TX# TX QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: RS port rian Lee Size ocument Number Rev. VS-00 PRO ate: Wednesday, March, 0 Sheet of

24 -USP0 USP0 -USP USP -USP USP -USP USP L TMW00M0 L TMW00M0 L TMW00M0 L TMW00M0 P0- P0 P- P P- P P- P V V OPPER OPPER L V_US0 Z=0 OHM_ L V_US0 Z=0 OHM_ FUSEV0 F R0 FUSE._V FUSEV0 F R FUSE._V US FUSEV: 0K US FUSEV: 0K 以以以以以以以以以以以以 0 mi l FUSEV0, US_GN, R K_ R K_ PH_US_O0 000pF X_0V PH_US_O 000pF X_0V FUSEV0 FUSEV0 US 0U_TN_SM_.V 0U_TN_SM_.V 0.u Y_ 0.u Y_ 0p N_0 0p N_0 U0 P0 0 P0 P0- In Out P0- In Out P Gnd Gnd P P- In Out P- In Out Rlamp0PTT P P- P P- U 0 In Out In Out Gnd Gnd In Out In Out Rlamp0PTT P P- P P- V -USP USP -USP USP US PIN HEER *,PIN,0,P:.mm US OM ONN. FUSEV0 LN_US_ -USP0 USP0 V L F FUSE._V USV0L P0- P0 0.0UF FP_US 0.u Y_ P0- P0 U U U U V V - - FG FG U U U U P- P RJ US* W/LE W/TRNSFORMER,PIN,0, 0P N_0V 0.U Y_V 0U_TN_SM_.V TMW00M0 PIN,0,P:.0MM FUSEV0 US port for front panel P- P U U U U LN_US_ V V - - FG FG U U U U P- P RJ US* W/LE W/TRNSFORMER,PIN,0, 0P N_0V 0.U Y_V 0U_TN_SM_.V QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan TEL: US Port rian Lee Size ocument Number Rev. VS-00 PRO ate: Wednesday, March, 0 Sheet of

25 .V GPIO R 0K_ V.V N V 0 PIEX_ H_LINK_T.V 0.UF_Y_V 0.UF_Y_V 0.UF_Y_V V0 PRSNT# V0 V0 RSV0 V0 E 0 GN GN0 H_LINK_T0.0UF_V 0U Y_0V,, SMLK_RESUME SMLK JTG H_LINK_T 0.UF_Y_V,, SMT_RESUME SMT JTG H_LINK_T GN.V JTG H_LINK_T.V H_LINK_T _V0 JTG 0 JTG _V0 0.V _VUX,,, PIE_WKE# _V0 WKE# PWRG PLT_RST#,,0,,, N N N 0.UF_Y_V GPIO H_ERR0 H_ERR H_ERR H_ERR H_ERR H_ERR H_ERR H_ERR R RN.K_PR0 RN.K_PR0 0K_.V H_LINK_T PIE_OP PIE_OP PIE_ON PIE_ON H_LINK_T 00 redefine VS-00 PRO PIE port_ connection from P PIEX slot to mini-pie socket PIE_OP PIE_ON GP_HPWREN GP_HPWREN 0 0 RSV0 GN HSOP0 HSON0 GN PRSNT#0 GN HSOP HSON GN GN HSOP HSON GN GN HSOP HSON GN0 RSV0 PRSNT#0 GN PIE_X_ GN0 REFLK REFLK- GN0 HSIP0 HSIN0 GN0 RSV0 GN0 HSIP HSIN GN0 GN0 HSIP HSIN GN0 GN0 HSIP HSIN GN0 RSV0 0 0 LK_PIE_ LK_PIE_# PIE_IP PIE_IN V. version: PIE Port, Port swap PIE_IP PIE_IN LK_PIE_ LK_PIE_# GP_HPWREN H H JP LTH FOR MINI PI-E.0H ONN,,0, H H H_ERR0 H_ERR H_ERR H_ERR H_ERR H_ERR H_ERR H_ERR H_T H_T0 H_T H_T H_T H_T H_T H_T RN 00.0Ω RN 00.0Ω RN 00.0Ω RN 00.0Ω H_LINK_T H_LINK_T0 H_LINK_T H_LINK_T H_LINK_T H_LINK_T H_LINK_T H_LINK_T Mini-PIE V. Specification.V V.VUX/ peak:., normal:..v/ peak: 0., normal: 0. GPO_HER0 GPO_HER GPO_HER GPO_HER GPO_HER GPO_HER GPO_HER GPO_HER 0 FRONT PNEL STS_GRN# STS_RE# WLN_R_# WLN_R_# R 0.0KΩ.V -PWRTSW * pin OX Header PN: FKN RS * pin OX Header PN: FKN RS WLT_SOT R 0.0KΩ 0 WLT_SOT LN_T#_LE WLN_R#_LE GPIO GPIO.V V_P_ R.0Ω H_ERR0 H_ERR H_ERR H_ERR H_ERR H_ERR H_ERR H_ERR R 00.0Ω R 00.0Ω R 00.0Ω R0 00.0Ω R R.KΩ 0 0.UF_Y_V LE_V US_TN# FP_N PIN,0,P=.0mm FP_N R 0_ R 00.0Ω USTJ PWRTJ H_T0 H_T H_T H_T H_T H_T H_T H_T R 00.0Ω IR_IN R IR_V 00 redefine VS-00 PRO PIE port_ connection from P PIEX slot to mini-pie socket PIN,0,P:.0MM R0 0.UF_Y_V L.0ohm GPIO IRRX V_P_ V. version: PIE Port, Port swap US_LE# IRRX GPIO FOR MINI PI-E.0H ONN,,0, PIE_WKE# V._MINI PIE_OP PIE_ON PIE_IP PIE_IN PLT_RST# For Mini PIE V.(efault).V PIE_OP PIE_ON PIE_IP PIE_IN LK_PIE_ LK_PIE_# 0.UF_Y_V U X_.V V._MINI 0.UF_Y_V Full size 0.UF_Y_V 0.UF_Y_V I Q IN V._MINI N UIM_PWR UIM_VPP GN REFLK UIM_RESET UIM_LK REFLK- 0 UIM_T GN LKREQ# RESERVE_.V_ RESERVE_ GN0 WKE#.V_ RESERVE_0.V_ 0 RESERVE_ GN.V_ RESERVE_ RESERVE_ LE_WPN# LE_WLN# RESERVE_ RESERVE_ LE_WWN# 0 RESERVE_ GN0 US_ RESERVE_ GN US_- PETP0 GN PETN0 SM_T GN SM_LK 0.V_ GN PERP0 GN.VUX PERN0 GN PERST# W_ISLE# 0 UIM_ UIM_ GN L_LINK_T- L_LINK_T- L_LINK_T- L_LINK_T- OUT OUT J/GN MS_SOT PIN,0,P=0.MM O O VOUT=.*(R/R) SIM GN SIM_V SIM_RST SIM_LK SIM_GN SIM_VPP SIM_IO F F0 SIM_V R R V._MINI R0 % V.S V_P_LNUL R0.ohm WLN_R_# X_0V 0.u X_0 V._MINI PLT_RST# R W_ISLE# SIM_RST SIM_LK SIM_IO SIM_V V.S U X_.V 00K_ V.S near pin 0.UF_Y_V SIM_V SIM_RST SIM_LK X_.V V._MINI T_NL 0.UF_Y_V USP -USP SMT_RESUME N_0V 0.UF_Y_V GPIO_RF_OFF# QNP SYSTEMS, IN F, NO., hung-shing Rd., Xizhi ist., New Taipei ity,, Taiwan N_0V 0 0.UF_Y_V PIex & front panel con. rian Lee Size ocument Number Rev VS-00 PRO Wednesday, March, 0 ate: Sheet of.