SERVICE MANUAL. ic-f3 ic-f3s. ic-f4 ic-f4s VHF FM TRANSCEIVERS UHF FM TRANSCEIVERS

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1 SERVICE MANUAL VHF FM TRANSCEIVERS ic-f ic-fs UHF FM TRANSCEIVERS ic-f ic-fs

2 INTRODUCTION This service manual describe the latest information for the IC-F/IC-FS and IC-F/IC-FS at the time of publication. DANGER NEVER connect the transceiver to an AC outlet or to a DC power supply that uses more than V. Such a connection could cause a fire hazard and/or electric shock. DO NOT expose the transceiver to rain, snow or any liquids. DO NOT reverse the polarities of the power supply when connecting the transceiver. DO NOT apply an RF signal of more than 0 dbm (00 mw) to the antenna connector. This could damage the transceiver s front end. ORDERING PARTS Be sure to include the following four points when ordering replacement parts:. 0-digit order numbers. Component part number and name. Equipment model name and unit name. Quantity required <SAMPLE ORDER> 0000 S.IC TAF IC-FS MAIN UNIT piece 0000 Screw B0 NI-ZU IC-F MAIN PCB pieces Addresses are provided on the inside back cover for your convenience. IC-F IC-FS REPAIR NOTES. Make sure a problem is internal before disassembling the transceiver.. DO NOT open the transceiver until the transceiver is disconnected from its power source.. DO NOT force any of the variable components. Turn them slowly and smoothly.. DO NOT short any circuits or electronic parts. An insulated tuning tool MUST be used for all adjustments.. DO NOT keep power ON for a long time when the transceiver is defective.. DO NOT transmit power into a signal generator or a sweep generator.. ALWAYS connect a 0 db or 0 db attenuator between the transceiver and a deviation meter or spectrum analyser when using such test equipment.. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver.

3 TABLE OF CONTENTS SECTION SPECIFICATIONS SECTION INSIDE VIEWS - IC-F/S IC-F/S...- SECTION DISASSEMBLY AND OPTION INSTRUCTIONS - DISASSEMBLY INSTRUCTION OPTIONAL UNIT INSTALLATIONS...- SECTION CIRCUIT - RECEIVER CIRCUITS TRANSMITTER CIRCUITS PLL CIRCUIT POWER SUPPLY CIRCUITS CPU PORT ALLOCATIONS...- SECTION ADJUSTMENT PROCEDURES - PREPARATION PLL ADJUSTMENT for IC-F/S TRIMMER ADJUSTMENT for IC-F/S TRANSMITTER ADJUSTMENT for IC-F/S RECEIVER ADJUSTMENT for IC-F/S PLL ADJUSTMENT for IC-F/S TRIMMER ADJUSTMENT for IC-F/S TRANSMITTER ADJUSTMENT for IC-F/S RECEIVER ADJUSTMENT for IC-F/S...-0 SECTION PARTS LIST - IC-F/S IC-F/S...- SECTION MECHANICAL PARTS AND DISASSEMBLY SECTION SEMI-CONDUCTOR INFORMATION SECTION BOARD LAYOUTS - IC-F/S MAIN UNIT VR BOARD IC-F/S MAIN UNIT...- SECTION 0 BLOCK DIAGRAM 0 - IC-F/S IC-F/S...0- SECTION VOLTAGE DIAGRAM - IC-F/S IC-F/S...-

4 SECTION SPECIFICATIONS RECEIVER TRANSMITTER GENERAL Frequency coverage Type of emission Number of channels Power supply requirement TX at High Current drain at Low (approx.) rated audio RX stand-by Frequency stability Usable temperature range Dimensions (proj. not included) Weight (BP-) Output power Modulation system Max. freqequency deviation Spurious emissions Adjacent channel power Transmitter audio distortion Limitting charact of modulator Ext. microphone connector Receive system Intermediate frequencies Sensitivity (typical) Squelch sencitivity (at threshold) Adjcent chnnel selectivity Spurious response Intermoduration rejection ratio Audio output power (at. V DC) External SP connector IC-F/FS IC-F/FS MHz (L-band) MHz (L-band) MHz (ML-band) MHz (MH-band) MHz (H-band) MHz (H-band) MHz (H-band) K0FE (W-type), K0FE (M-type: F/S only), K0FE (N-type) ch ( channels banks: -BANK version), ch ( channel version). V DC (negative ground; supplied battery pack). A. A 00 ma 00 ma 0 ma 0 ma 0 ma (typ.) 0 ma (typ.) ±0.000% (EIA), ±000 Hz (ETS/CEPT; W, M-types), ±. khz (ETS/CEPT; N-type) F to 0 F (EIA) 0 C to C (ETS/CEPT) F to 0 F (EIA) 0 C to 0 C (ETS/CEPT) (W) 0(H) (D) mm; (W) (H) (D) inch High W Low W 0 g;. oz Variable reactance frequency modulation High W Low W ±.0 khz (W-type), ±.0 khz (M-type), ±. khz (N-type) st:.0 MHz nd: 0 khz 0 db typical (EIA) 0. µw (ETS/CEPT) 0 db typical (W, M-types) 0 db (N-type) Less than % at khz, 0 % deviation 0 00 % of max.deviation -conductor.(d) mm ( 0")/ kω Double-conversion superheterodyne system st:.0 MHz nd: 0 khz 0. µv at db SINAD 0. µv at db SINAD 0. µv (emf) at 0 db SINAD 0. µv (emf) at 0 db SINAD 0. µv 0. µv 0 db (W, M-types) 0 db (N-type) 0 db db 00 mw typical at 0% distortion with a Ω load -conductor. (d) mm ( ")/ Ω All stated specifications are subject to change without notice or obligation. -

5 SECTION INSIDE VIEWS - IC-F/S MAIN UNIT F/S TOP VIEW BOTTOM VIEW Low-pass filter circuit APC control circuit Microphone amplifier circuit Antenna switching circuit (D: MA) FM IF IC (IC: TAFN) Mute switch (IC: BU0BCFV) PLL IC (IC: µpd0gs) Expander IC (IC0: MGP) Current detector circuit RF amplifier (Q: SK) T/R switching circuit (D: MA) st mixer circuit (Q: SK-) Crystal filter (FI) PLL reference oscillator (X: CR-,. MHz) VCO circuit CPU (IC) T/R switching circuit (D: MA) Power amplifier (Q: SK) EEPROM (IC) -

6 - IC-F/S MAIN UNIT F/S TOP VIEW BOTTOM VIEW Low-pass filter circuit APC control circuit Microphone amplifier circuit Antenna switching circuit (D: MA) FM IF IC (IC: TAFN) st mixer circuit (Q: SK R) Expander IC (IC0: MGP) PLL IC (IC: µpd0gs) Mute switch (IC: BU0BCFV) T/R switching circuit (D: MA) Power amplifier (Q: SK) Current detector circuit RF amplifier (Q: SK) T/R switching circuit (D: MA) Crystal filter (FI) PLL reference oscillator (X:. MHz) VCO circuit CPU (IC) EEPROM (IC) -

7 SECTION DISASSEMBLY INSTRUCTIONS - DISASSEMBLY INSTRUCTION Removing the chassis panel q Unscrew nut A, and remove knob B. w Unscrew screws, C. e Take off the chassis in the direction of the arrow. r Unplug J to separate front panel and chassis. Chassis C (nickel, mm) B Knob J (Speaker connector) A Nut Front panel Removing the MAIN unit q Remove the sealing rubber. w Unsolder points D and unscrew nut E. e Unscrew screws, F, and screws G (silver, mm), to separate the chassis and MAIN unit. r Take off the MAIN unit in the direction of the arrow. G (silver, mm) Shield cover (IC-F/FS only) F (black, mm) G G Sealing rubber D G G G Guide holes E Nut Chassis MAIN unit -

8 - OPTIONAL UNIT INSTALLATIONS Remove the option cover. Remove the bottom protective paper of sponge. Connect either a UT-0, UT- or UT-0 optional unit to J. Attached the sponge to the specified position at the unit as following illustration. UT-0 UT- Replace the option cover to the chassis-hole. Option cover Option unit SPONGE Parts name : sponge Order No. : 00 J -

9 SECTION CIRCUIT - RECEIVER CIRCUITS -- ANTENNA SWITCHING CIRCUIT Received signals are passed through the low-pass filter (L L, C C for IC-F/S, L L, C, C, C for IC-F/S). The filtered signals are applied to the λ type antenna switching circuit (D for IC-F/S D0, D for IC-F/S). The antenna switching circuit functions as a low-pass filter while receiving. However, its impedance becomes very high while D (IC-F/S)/D0 and D (IC-F/S) is/are turned ON. Thus transmit signals are blocked from entering the receiver circuits. The antenna switching circuit employs a λ type diode switching system. The passed signals are then applied to the RF amplifier circuit. -- RF CIRCUIT The RF circuit amplifies signals within the range of frequency coverage and filters out-of-band signals. The signals from the antenna switching circuit are amplified at the RF amplifier (Q) after passing through the tuneable bandpass filter (D, D0, C for IC-F/S, D0, L, C for IC-F/S). The amplified signals are applied to the st mixer circuit (Q) after out-of-band signals are suppressed at the tuneable bandpass filter (D, D, D, D, C for IC-F/S, D, D, D0, C for IC-F/S). Varactor diodes are employed at the bandpass filters that track the filters and are controlled by the CPU (IC) via the expander IC (IC0) using T T signals. These diodes tune the centre frequency of an RF passband for wide bandwidth receiving and good image response rejection. The signals from the RF circuit are mixed at the st mixer (Q) with a st LO signal coming from the VCO circuit to produce a.0 MHz (IC-F/S) or. MHz (IC-F/S) st IF signal. The st IF signal is applied to a pair of crystal filters (FI) to suppress out-of-band signals. The filtered st IF signal is applied to the IF amplifier (Q for IC-F/S, Q00 for IC- F/S), then applied to the nd mixer circuit (IC, pin ). -- ND IF AND DEMODULATOR CIRCUITS The nd mixer circuit converts the st IF signal to a nd IF signal. A double conversion superheterodyne system (which converts receive signals twice) improves the image rejection ratio and obtains stable receiver gain. The st IF signal from the IF amplifier is applied to the nd mixer section of the FM IF IC (IC, pin ), and is mixed with the nd LO signal to be converted to a 0 khz nd IF signal. The FM IF IC contains the nd mixer, limiter amplifier, quadrature detector and active filter circuits. A nd LO signal (0. MHz for IC-F/S,. MHz for IC-F/S) is produced at the PLL circuit by dividing it s reference frequency. The nd IF signal from the nd mixer (IC, pin ) passes through a ceramic filter (FI) to remove unwanted heterodyned frequencies. It is then amplified at the limiter amplifier (IC, pin ) and applied to the quadrature detector (IC, pins 0, ) to demodulate the nd IF signal into AF signals. -- ST MIXER AND ST IF CIRCUITS The st mixer circuit converts the received signal to a fixed frequency of the st IF signal with a PLL output frequency. By changing the PLL frequency, only the desired frequency will be passed through a crystal filter at the next stage of the st mixer. -- AF CIRCUIT AF signals from the FM IF IC (IC pin ) are applied to the mute switch (IC, pin ) via the AF filter circuit (ICb, pins, ). The output signals from pin are applied to the AF power amplifier (IC, pin ) after being passed through the [VOL] control (VR board, R). nd IF AND DEMODULATOR CIRCUITS Squelch level adjustment pot R AF signal "DET" Active filter FM detector 0 Limiter amp. nd IF filter 0 khz X Noise detector FI Noise comp. RSSI Mixer PLL IC IC or X. MHz IC TAF st IF from the IF amp. "NOIS" signal to the CPU pin "SD" signal to the CPU pin -

10 The applied AF signals are amplified at the AF power amplifier circuit (IC, pin ) to obtain the specified audio level. The amplified AF signals, output from pin 0, are applied to the internal speaker (SP) via the [SP] jack when no plug is connected to the jack. -- SQUELCH CIRCUIT A squelch circuit cuts out AF signals when no RF signals are received. By detecting noise components in the AF signals, the squelch switches the AF mute switch. A portion of the AF signals from the FM IF IC (IC, pin ) are applied to the active filter section (IC, pin ) where noise components are amplified and detected with an internal noise detector. The squelch level adjustment pot (R) is connected in parallel to the active filter input (pin ) to control the input noise level. The active filter section amplifies noise components. The filtered signals are rectified at the noise detector section and converted into NOIS (pulse type) signals at the noise comparator section. The NOIS signal is applied to the CPU (IC, pin ). The CPU detects the receiving signal strength from the number of the pulses, and outputs an RM signal from pin. This signal controls the mute switch (IC) to cut the AF signal line. - TRANSMITTER CIRCUITS -- MICROPHONE AMPLIFIER CIRCUIT The microphone amplifier circuit amplifies audio signals with db/octave pre-emphasis characteristics from the microphone to a level needed for the modulation circuit. The AF signals from the microphone are applied to the microphone amplifier circuit (ICc, pin 0). The amplified AF signals are passed through the low-pass filter circuit (ICd, pins, ) via the mute switch (IC, pins ). The filtered AF signals are applied to the modulator circuit after being passed through the mute switch (IC, pins 0) and the deviation adjustment pot (R; IC-F/S only). -- MODULATION CIRCUIT The modulation circuit modulates the VCO oscillating signal (RF signal) using the microphone audio signal. The audio signals change the reactance of a diode (D for IC-F/S, D0 for IC-F/S) to modulate an oscillated signal at the VCO circuit (Q, Q). The oscillated signal is amplified at the buffer-amplifiers (Q, Q), then applied to the T/R switching circuit (D, D). -- DRIVE/POWER AMPLIFIER CIRCUITS The signal from the VCO circuit passes through the T/R switching circuit (D) and is amplified at the buffer(s) (Q for IC-F/S, Q, Q0 for IC-F/S), drive (Q) and power amplifier (Q) to obtain W (IC-F/S)/ W (IC-F/S) of RF power (at. V DC). The amplified signal passes through the antenna switching circuit (D), and low-pass filter and is then applied to the antenna connector. The bias current of the drive (Q) and the power amplifier (Q) is controlled by the APC circuit. -- CURRENT DETECTOR CIRCUIT The current detector circuit (Q, Q) detects the total driving current of the drive and the power amplifiers, using the current sensor (R). The differential amplifier (Q) detects the voltage difference of the current sensor input and output voltages, then outputs control voltage to the APC circuit (IC- F/S only) and the CPU (IC, pin ). -- POWER DETECTOR CIRCUIT (IC-F/S ONLY) The power detector circuit (D) detects the transmit power output level and converts it to DC voltage. The detected signal is applied to the APC circuit. -- APC CIRCUIT The APC circuit (ICa, Q) protects the drive and the power amplifiers from excessive current drive, and selects HIGH or LOW output power. APC circuit T Current sensor circuit R Q Q TXC T IC-F/S only Q RF signal from PLL "ISENS" signal to the CPU ICa Q Driver amp. Q Power amp. to antenna Power detector circuit (D; IC-F/S only) APC control circuit -

11 The signal output from the current sensor circuit (Q, Q; IC-F/S) or the power detector circuit (D; IC-F/S) is applied to the differential amplifier (ICa, pin ), and the T signal from the expander (IC0, pin ), controlled by the CPU (IC), is applied to the other input for reference. When the driving current is increased, input voltage of the differential amplifier (pin ) will be increased. In such cases, the differential amplifier output voltage (pin ) is decreased to reduce the driving current. - PLL CIRCUIT A PLL circuit provides stable oscillation of the transmit frequency and receive st LO frequency. The PLL output compares the phase of the divided VCO frequency to the reference frequency. The PLL output frequency is controlled by the divided ratio (N-data) of a programmable divider. The PLL circuit contains the VCO circuit (Q, Q). The oscillated signal is amplified at the buffer-amplifiers (Q, Q) and then applied to the PLL IC (IC, pin ). The PLL IC contains a prescaler, programmable counter, programmable divider, phase detector and charge pump, etc. The entered signal is divided at the prescaler and programmable counter section by the N-data ratio from the CPU. The divided signal is detected on phase at the phase detector using the reference frequency. - POWER SUPPLY CIRCUITS VOLTAGE LINE Line HV CPU V T OPT Description The voltage from the attached battery pack. The same voltage as the HV line (battery voltage) which is controlled by the power switch ([VOL] control). Common V converted from the line by the reference regulator circuit (IC). The output voltage is applied to the CPU (IC) and the V regulator circuit. Common V converted from the line by the V regulator circuit (Q, Q) using the reference regulator (IC). V for transmitter circuits regulated by the T regulator circuit (Q). V for receiver circuits regulated by the regulator circuit (Q). Common V converted from the V line by the regulator circuit (Q0). The same voltage as the V line for the optional HM-A or HS- through a resistor (R). If the oscillated signal drifts, its phase changes from that of the reference frequency, causing a lock voltage change to compensate for the drift in the oscillated frequency. A portion of the VCO signal is amplified at the buffer-amplifier (Q) and is then applied to the receive st mixer or transmit buffer-amplifier circuit via the T/R switching diode (D, D). PLL circuit for IC-F/S VCO circuit Q, Q Buffer Q Buffer Q D D to transmitter circuit to st mixer circuit Loop filter Buffer Q 0. MHz signal to the FM IF IC Phase Programmable Prescaler detector counter Programmable divider Shift register PLST SCK X. MHz -

12 - CPU PORT ALLOCATIONS -- CPU (IC) CPU (IC) continued Pin number (IC-F/S) 0, (IC-F/S) Port name CTCIN CSIFT SCK SI UNLK PLST NOIS CONT KS0 K KS, K Description Input port for CTCSS/DTCS signals for decoding. Outputs reference oscillator for the CPU control signal. Outputs clock signal to the PLL IC (IC), EEPROM (IC) and expander IC (IC0), etc. Input port for the data signals from EEPROM (IC), etc. Outputs data signals to the PLL IC (IC), EEPROM (IC) and expander IC (IC0), etc. Input port for PLL unlock signal from the PLL IC (IC). High level signal is applied during unlock. Outputs strobe signals to the PLL IC (IC). Input port for noise signals (pulse type) from the FM IF IC (IC). Outputs LCD contrast control signal. High: When normal level is selected Output ports for key matrix. Pin number 0 Port name MTONE DTMF Description Output port for: Beep audio while receiving. /-tone signals while transmitting. Output port for DTMF signals while transmitting. -- OUTPUT EXPANDER IC (IC0) Pin number Port name DST SCK T T T Description Input port for strobe signals. Input port for clock signal. Input port for data signal. Output tuneable bandpass filter control voltage. Outputs tuneable bandpass filter control signal while receiving. Outputs RF output power control signals while transmitting. MM Outputs mic. mute control signal. Low: When DTMF or /-tone signal is selected 0 0 RM KR0 K C C TXC TC LIGHT AFON DST CTDA0 CTDA DUSE Outputs RX mute control signal. Low: When muted Input ports for key matrix. Outputs regulator control signal. Low: While receiving Outputs regulator control signal. Low: While power is ON Outputs T regulator control signal. Low: While transmitting Outputs T regulator control signal. Low: While transmitting Outputs LCD backlight control signal. High: Lights ON Outputs the regulator circuit for the AF amplifier control signal. High: While AF amp. is activated. Outputs strobe signals to the expander IC (IC0). Outputs CTCSS and DTCS encode signals (-bit, D/A type). Outputs filter switch control signal for the CTCSS and DTCS (Q). High: DTCS is activated. -

13 SECTION ADJUSTMENT PROCEDURES - PREPARATION REQUIRED TEST EQUIPMENT EQUIPMENT DC power supply GRADE AND RANGE Output voltage :. V DC Current capacity : A or more EQUIPMENT Audio generator Frequency range Output level GRADE AND RANGE : Hz : 00 mv F/S RF power meter (terminated type) Frequency counter Measuring range : 0 W Frequency range : 0 00 MHz Impedance : 0 Ω SWR : Less than. : Frequency range : 00 MHz Frequency accuracy : ± ppm or better Sensitivity : 00 mv or better Attenuator Standard signal generator (SSG) DC voltmeter Power attenuation Capacity Frequency range Output level Input impedance : 0 or 0 db : 0 W or more : 0 00 MHz : µv mv ( to dbm) : 0 kω/v DC or better F/S FM deviation meter Frequency range Measuring range : DC 00 MHz : 0 to ± khz Oscilloscope Frequency range Measuring range : DC 0 MHz : 0 V Digital multimeter Input impedance : 0 MΩ/V DC or better AC millivoltmeter Measuring range : 0 mv 0 V TRIMMER ADJUSTMENT When you adjust the contents on page - or -, TRIMMER ADJUSTMENT, the optional CS-F FIELD PROGRAMMING FTWARE (Rev..0 or later) and OPC- CLONING CABLE are required. STARTING TRIMMER ADJUSTMENT Turn ON power to the transceiver, connect a computer to the [SP] jack using the optional OPC- CLONING CABLE, then start up the ADJUST program in CS-F. STARTING THE PROGRAM q Boot up DOS. w Insert the CS-F backup disk into drive A. e Type the following to start up the program: ADJ>ADJUST [Enter] The adjustment screen appears after reading set data from the transceiver. r After the adjustment screen appears, set or modify the data as desired. A:\>CD ADJ A:\>ADJ>ADJUST ***** Trimmer Control Software for IC F Series ***** A/D (VIN) : ABh 0.V D/A () 0 : h.v A/D (REMOTE) : FFh.000V D/A (MODE) : h.v A/D (SD) : h.0v D/A (T) : C0h.V A/D (ISENS) : Bh.V D/A (T) : Ch.V A/D (TEMPS) : BAh 0.'C D/A (T) 0 : CCh.000V A/D (LVIN) 0 : Ch.V D/A (T/PWR) : h.v RX:.00000MHz TX:.00000MHz PWR : High Base Freq :.00000MHz Memory CH : Power(Lo) : Power(Hi) : MOD : 0 BPF : BPF : BPF : BPF : [TAB] : Display Parameters [F] at BPF : Sweep [F] at BPF : Sweep T ~ T [Enter] at TXF : Set Mode / : Cursor Up/Down / : / ESC : Quit Boot up DOS, and change the directory. Start up command. Program starts up, then the adjustment screen appears after reading set data from the transceiver. NOTE: When the EEPROM (IC) is replaced or the transceiver displays an error message and beeps, the following operation is necessary before starting the ADJUSTMENT.. Download the programmed frequency data using the CS-F FIELD PROGRAMMING FTWARE (Rev..0 or later) from an exact same version of the transceiver, then save it. (See the instructions for detailed operation.). Return to DOS.. Copy the saved frequency data into the "ADJ" directory as follows: A>COPY [file name].icf A:\ADJ [ENT]. Connect the transceiver in which the EEPROM has been replaced, using the OPC- CLONING CABLE.. Change the directory to "ADJ", and type as follows: A>CD ADJ [ENT] A>ADJ>EEPROM [file name].icf * [ENT] When cloning is successful, the transceiver displays "CL GOOD". *RS-C port number. You have to type A>EEPROM [file name].icf when the port number is set to. This setting can be confirmed in the SETUP window while CS-F is running. -

14 SCREEN DISPLAY EXAMPLE F/S F/S Connected battery voltage Internal temperature PLL lock voltage Operating channel RF output power FM deviation* Receive sensitivity Reference frequency ***** Trimmer Control Software for IC F Series ***** A/D (VIN) : ABh 0.V A/D (REMOTE) : FFh.000V A/D (SD) : h.0v A/D (ISENS) : Bh.V A/D (TEMPS) : BAh 0.'C A/D (LVIN) 0 : Ch.00V Memory CH : Power(Lo) : Power(Hi) : MOD : 0 BPF : BPF : BPF : BPF : TXF SET : D/A () 0 : h.v D/A (MODE) : h.v D/A (T) : C0h.V D/A (T) : Ch.V D/A (T) 0 : CCh.000V D/A (T/PWR) : h.v RX:.00000MHz TX:.00000MHz PWR : High Base Freq :.00000MHz [TAB] : Display Parameters [F] at BPF : Sweep [F] at BPF : Sweep T~T [Enter] at TXF : Set Mode / : Cursor Up/Down / : / ESC : Quit NOTE: The above values for settings are examples only. Each transceiver has its own specific values for each setting. *DO NOT change the value when adjusting the IC-F/S. A value of 0 is necessary for the IC-F/S. CONNECTIONS to an RS-C port Personal computer OPC- Audio generator DB female plug (incl. level converter circuit) to [MIC] to the antenna connector AC millivoltmeter Attenuator 0 db or 0 db FM deviation meter RF power meter 0 W / 0 Ω Frequency counter CAUTION: DO NOT transmit while SSG is connected to the antenna connector. Standard signal generator µv to mv ( dbm to dbm) -

15 - PLL ADJUSTMENT for IC-F/S ADJUSTMENT ADJUSTMENT CONDITIONS UNIT MEASUREMENT LOCATION VALUE ADJUSTMENT UNIT ADJUST PLL LOCK VOLTAGE Operating freq. : MHz (L-band).000 MHz (H-band) Transmitting Receiving MAIN Connect a multi-meter to check point CP..0 V (L-band). V (H-band).. V (L-band).. V (H-band) MAIN L Verify F/S MAIN unit RF power meter see detailed illustration below, DC power supply. L PLL lock voltage adjustment connect (soldering) here Power supply connection CP PLL lock voltage check point connect (soldering), line here VR board -

16 - TRIMMER ADJUSTMENT for IC-F/S Select an operation using [ ]/[ ] keys, then set the specified value using [ ]/[ ] keys on the connected computer keyboard. F/S ADJUSTMENT EREE FREQUEY OUTPUT POWER FM DEVIATION BPF BPF Operating freq. :.000 MHz (L-band).000 MHz (H-band) High/Low switch : Low Transmitting Transmitting Operating freq. :.000 MHz (L-band).000 MHz (H-band) High/Low switch : Low Transmitting High/Low switch : High Transmitting Operating freq. :.000 MHz (L-band) MHz (H-band) High/Low switch : Low Connect an audio generator to the [MIC] jack and set as: khz/0 mv Set an FM deviation meter as: HPF : OFF LPF : 0 khz De-emphasis : OFF Detector : (P P)/ Transmitting Operating freq. :.000 MHz (L-band).000 MHz (H-band) Set an SSG as: Level :. µv* ( dbm) Modulation Deviation Receiving ADJUSTMENT CONDITION : khz : ±. khz (W-type) ±. khz (N-type) ±. khz (M-type) UNIT Top panel Top panel Top panel Top panel MEASUREMENT LOCATION Loosely couple a frequency counter to the antenna connector. Connect an RF power meter to the antenna connector. Connect an FM deviation meter to the antenna connector through an attenuator. Connect an SSG to the antenna connector and a SINAD meter with an Ω load to the [SP] jack. CONVENIENT: The BPF T BPF T can be adjusted automatically. q- Set each to 0, then push the [F] key. (The cursor must be set to the BPF T position.) q- The connected PC tunes BPF T BPF T to peak levels. or w- Set the cursor to one of BPF T, T, T or T as desired. w- Push [F] to start tuning. w- Pepeat w- and w- to perform additional BPF tuning. *This output level of a standard signal generator (SSG) is indicated as SSG s open circuit. VALUE MHz (L-band) MHz (H-band).000 MHz (L-band).000 MHz (H-band).0 W.0 W ±. khz (W-type) ±. khz (N-type) ±. khz (M-type) Minimum distortion level -

17 - TRANSMITTER ADJUSTMENT for IC-F/S The following adjustment must be performed after EREE FREQUEY ADJUSTMENT in section -. ADJUSTMENT ADJUSTMENT CONDITIONS UNIT MEASUREMENT LOCATION VALUE ADJUSTMENT UNIT ADJUST DTCS WAVE FORM Operating freq. :.000 MHz (L-band) MHz (H-band) High/Low switch: Low No audio applied to the [MIC] jack. DTCS code : 00 Transmitting Top panel Connect an FM deviation meter with an oscilloscope to the antenna connector through an attenuator. Set to flat wave form MAIN 0 F/S MAIN unit FM deviation meter Attenuator Oscilloscope see detailed illustration below, DC power supply. 0 DTCS wave form adjustment connect (soldering) here Power supply connection connect (soldering), line here VR board -

18 - RECEIVER ADJUSTMENT for IC-F/S The following adjustment must be performed after BPF BPF ADJUSTMENT in section -. ADJUSTMENT ADJUSTMENT CONDITIONS UNIT MEASUREMENT LOCATION VALUE ADJUSTMENT UNIT ADJUST F/S SQUELCH LEVEL Operating freq. :.000 MHz (L-band).000 MHz (H-band) Set the SSG as: Modulation Deviation Receiving : khz : ±. khz (W-type) ±. khz (N-type) ±. khz (M-type) Top panel Connect an SSG to the antenna connector and SINAD meter with an Ω load to the [SP] jack. db SINAD SSG Output level Turn R clockwise to close squelch. Receiving At the point where the audio signals just appears. MAIN R MAIN unit Standard signal generator SINAD meter Speaker ( Ω) see detailed illustration below, DC power supply. R Squelch adjustment connect (soldering) here Power supply connection connect (soldering), line here VR board -

19 - PLL ADJUSTMENT for IC-F/S ADJUSTMENT ADJUSTMENT CONDITIONS UNIT MEASUREMENT LOCATION VALUE ADJUSTMENT UNIT ADJUST PLL LOCK VOLTAGE Operating freq. : MHz (L-band) MHz (ML-band) MHz (MH-band) MHz (H/H-bands) Receiving MAIN Connect a multimeter to check point CP.. V MAIN L Transmitting L0 Operating freq. : MHz (L-band) MHz (ML-band) MHz (MH-band).000 MHz (H-band) MHz (H-band) Receiving.. V (H-band).0. V (other) Verify F/S Transmitting MAIN unit RF power meter see detailed illustration below, DC power supply. L PLL lock voltage adjustment for RX L0 PLL lock voltage adjustment for TX connect (soldering) here Power supply connection CP PLL lock voltage check point connect (soldering), line here VR board -

20 - TRIMMER ADJUSTMENT for IC-F/S Select an item using [ ]/[ ] keys on the connected computer keyboard. F/S ADJUSTMENT EREE FREQUEY OUTPUT POWER BPF BPF ADJUSTMENT CONDITION Operating freq. : MHz (L-band) MHz (ML-band) MHz (MH-band) MHz (H/H-bands) High/Low switch : Low Transmitting Transmitting Operating freq. :.000 MHz (L-band).000 MHz (ML-band).000 MHz (MH-band) MHz (H-band) MHz (H-band) High/Low switch : High Transmitting Operating freq. : MHz (L-band) MHz (ML-band) MHz (MH-band) MHz (H/H-bands) High/Low switch : High Transmitting High/Low switch : Low Transmitting Operating freq. : MHz (L-band) MHz (ML-band) MHz (MH-band) MHz (H/H-bands) Set an SSG as: Level :. µv* ( dbm) Modulation Deviation Receiving : khz : ±. khz (W-type) ±. khz (N-type) UNIT Top panel Top panel Top panel MEASUREMENT LOCATION Loosely couple a frequency counter to the antenna connector. Connected computer screen Power (Hi). Connect an RF power meter to the antenna connector. Connect an SSG to the antenna connector and a SINAD meter with an Ω load to the [SP] jack. *This output level of a standard signal generator (SSG) is indicated as SSG s open circuit MHz (L-band) MHz (ML-band) MHz (MH-band) MHz (H/H-bands) MHz (L-band) MHz (ML-band) MHz (MH-band) MHz (H/H-bands) 0 Maximum output. W. W Minimum distortion level CONVENIENT: The BPF T BPF T can be adjusted automatically. q- Set each to 0, then push the [F] key. (The cursor must be set to the BPF T position.) q- The connected PC tunes BPF T BPF T to peak levels. or w- Set the cursor to one of BPF T, T, T or T as desired. w- Push [F] to start tuning. w- Pepeat w- and w- to perform additional BPF tuning. VALUE ADJUSTMENT Push [ ] or [ ] keys on the computer key-board. Push [ ] or [ ] keys on the computer key-board. Adjust C on the MAIN unit. (see detailed illustration at right) Push [ ] or [ ] keys on the computer key-board. Push [ ] or [ ] keys on the computer key-board. -

21 - TRANSMITTER ADJUSTMENT for IC-F/S The following adjustment must be performed after EREE FREQUEY ADJUSTMENT in section -. ADJUSTMENT ADJUSTMENT CONDITIONS UNIT MEASUREMENT LOCATION VALUE ADJUSTMENT UNIT ADJUST FM DEVIATION DTCS WAVE FORM Operating freq. : MHz (L-band) MHz (ML-band) MHz (MH-band) MHz (H/H-bands) High/Low switch : Low Connect an audio generator to the [MIC] jack and set as: khz/0 mv Set an FM deviation meter as: HPF : OFF LPF : 0 khz De-emphasis : OFF Detector : (P P)/ Transmitting Operating freq. :.000 MHz (L-band).000 MHz (ML-band).000 MHz (MH-band) MHz (H-band) MHz (H-band) High/Low switch : Low No audio applied to the [MIC] jack. DTCS code : 00 Transmitting Top panel Top panel Connect an FM deviation meter to the antenna connector through an attenuator. Connect an FM deviation meter with an oscilloscope to the antenna connector through an attenuator. ±. khz (W-type) ±. khz (N-type) Set to flat wave form MAIN MAIN R 0 F/S MAIN unit RF power meter Audio generator FM deviation meter Oscilloscope Attenuator C* Transmit output power adjustment AC millivoltmeter see detailed illustration below R Frequency deviation adjustment 0 DTCS wave form adjustment, DC power supply connect. (soldering) here Power supply connection connect (soldering), line here *Other side of this point. VR board -

22 - RECEIVER ADJUSTMENT for IC-F/S The following adjustment must be performed after BPF BPF ADJUSTMENT in section -. ADJUSTMENT ADJUSTMENT CONDITIONS UNIT MEASUREMENT LOCATION VALUE ADJUSTMENT UNIT ADJUST F/S SQUELCH LEVEL Operating freq. : MHz (L-band) MHz (ML-band) MHz (MH-band) MHz (H/H-bands) Set the SSG as: Modulation Deviation Receiving : khz : ±. khz (W-type) ±. khz (N-type) Top panel Connect an SSG to the antenna connector and SINAD meter with an Ω load to the antenna connector. db SINAD SSG Output level Turn R clockwise to close squelch. Receiving At the point where the audio signals just appears. MAIN R MAIN unit Standard signal generator SINAD meter Speaker ( Ω) see detailed illustration below, DC power supply. R Squelch adjustment connect (soldering) here Power supply connection connect (soldering), line here VR board - 0

23 SECTION PARTS LIST - IC-F/FS [MAIN UNIT] ORDER IC 0000 S.IC µpd0gs-e (DS) IC 0000 S.IC TAFN (D,EL) IC 0000 S.IC NJM0V-TE IC S.IC BU0BCFV-E IC 0000 S.IC TAF (TP) IC S.IC S-0PG-PD-T IC 0000 S.IC X00SI-.T [ ch] 0000 S.IC LC0T-I/SN [-BANK] IC 0000 S.IC HDA0H [ ch] 0000 S.IC HDBH [-BANK] IC S.IC MGP EC IC S.IC S-0SL-A-T Q S.FET SKAXTB Q S.FET SKBXTL Q 0000 S.TRANSISTOR SC-T Q S.TRANSISTOR SC-O (TER) Q S.TRANSISTOR SC-O (TER) Q S.TRANSISTOR SC-O (TER) Q 0000 S.TRANSISTOR SC-T Q 0000 S.TRANSISTOR SC-T Q 0000 S.TRANSISTOR XP0-(TX) Q S.TRANSISTOR SC0 T0 R Q S.FET SKAXRTL Q S.FET SKA--T Q 0000 S.TRANSISTOR SC-Y (TER) Q S.TRANSISTOR SB T00 R Q 0000 S.TRANSISTOR XP0-(TX).AB Q 0000 S.TRANSISTOR UNH(TX) Q S.TRANSISTOR SB T00 R Q 0000 S.TRANSISTOR XP0-(TX).AB Q S.TRANSISTOR SA-GR (TER) Q S.TRANSISTOR SA-GR (TER) Q S.TRANSISTOR SA-GR (TER) Q S.TRANSISTOR SC0 T0 R Q S.TRANSISTOR SC-Y (TERTEM) Q S.TRANSISTOR DTCEUA T0 Q S.TRANSISTOR SB T00 R Q S.TRANSISTOR SC0 T0 R Q 0000 S.TRANSISTOR XP (TX) Q S.TRANSISTOR DTCTU T0 Q S.TRANSISTOR DTCEUA T0 Q 0000 S.TRANSISTOR XP0 (TX) Q S.FET SK0-Y (TER) Q S.TRANSISTOR SC0 T0 R Q S.TRANSISTOR SC0 T0 R Q S.TRANSISTOR DTAEUA T0 Q S.TRANSISTOR DTCEUA T0 D S.DIODE MA (TX) D S.DIODE MA (TX) D S.DIODE MA (TX) D S.VARICAP HVU0TRF D S.DIODE MA (TX) D S.VARICAP HVUTRF D S.DIODE MA (TX) D S.VARICAP HVU0TRF D S.VARICAP HVU0TRF D S.VARICAP HVU0TRF D S.VARICAP HVU0TRF D S.VARICAP HVU0TRF D 0000 S.DIODE MA (TX) D S.DIODE MAS (TX) D S.DIODE MAS (TX) D 0000 S.DIODE MA (TX) F only D 0000 S.DIODE MA (TX) D S.VARICAP HVU0TRF D S.VARICAP HVU0TRF D S.DIODE DA0U T0 D S.DIODE SB0-0C-TB D S.DIODE DAN0U T0 [MAIN UNIT] ORDER D S.DIODE DA0U T0 D S.DIODE MA (TX) D 0000 S.ZENER MA00-H (TX) FI XTAL FL- (.0 MHz) N, M XTAL FL-0 (.0 MHz) W FI CERAMIC CFWM0G N CERAMIC CFWM0E M, W X 0000 XTAL CR-A (. MHz) e 0000 XTAL CR-A (. MHz) u X S.XTAL CR- (. MHz) X S.DISCRIMINATOR CDBCA0CX L COIL LA- L COIL LA- L COIL LA- L S.COIL LQN A NJ0 L S.COIL CS-YLY-0K=P L S.COIL LQN A NJ0 L S.COIL ELJRE R0G-F L S.COIL ELJRE R0G-F L S.COIL MLF0D K-T Ò S.COIL ELJRE R0G-F Ó L S.COIL MLF0D K-T Ò S.COIL ELJRE R0G-F Ó L S.COIL MC-ECN-000 L S.COIL NL T-RJ- L S.COIL MLF0A R0K-T L S.COIL ELJRE NG-F Ò S.COIL ELJRE NG-F Ó L S.COIL LQN A NJ0 L S.COIL LQNH NK0 L S.COIL LQNH NK0 L S.COIL LQN A NJ0 L S.COIL LQN A NJ0 L S.COIL MLF0D RK-T L S.COIL ELJRE NG-F L S.COIL LQN A NJ0 L S.COIL LQN A NJ0 Ò S.COIL LQN A NJ0 Ó L S.COIL NL T-RJ- L S.COIL MLF0A R0K-T L S.COIL EXCCLU L S.COIL EXCCLU L S.COIL ELJRE NG-F L S.COIL ELJRE R0G-F L S.COIL EXCCLU R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR RR0P-0-D (0 kω) R S.RESISTOR RR0P-0-D ( kω) R S.RESISTOR ERJGEYJ 0 V ( Ω) S.RESISTOR ERJGEYJ 0 V (00 Ω) R S.RESISTOR ERJGEYJ 0 V (00 Ω) R S.RESISTOR ERJGEYJ V (. kω) Ò S.RESISTOR ERJGEYJ V ( kω) Ó R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( Ω) Ò S.RESISTOR ERJGEYJ 0 V ( Ω) Ó R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ V (. kω) S.RESISTOR ERJGEYJ 0 V (00 Ω) R S.RESISTOR ERJGEYJ R0 V ( Ω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (0 Ω) F/S Ò: L-band, Ó: H-band, N: N-type, M: M-type, W: W-type e: ETS/CEPT version, u: EIA/TIA version - S.=Surface mount

24 F/S [MAIN UNIT] ORDER R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ 0 V (00 Ω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( Ω) Ò S.RESISTOR ERJGEYJ 0 V (00 Ω) Ó R S.ARRAY EXB-VV 0JV R S.RESISTOR ERJGEYJ 0 V (0 kω) S.RESISTOR ERJGEYJ 0 V (00 Ω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) S.RESISTOR ERJGEYJ 0 V (00 kω) S.RESISTOR ERJGEYJ V (0 kω) S.RESISTOR ERJGEYJ 0 V (00 kω) S.RESISTOR ERJGEYJ 0 V (0 kω) S.RESISTOR ERJGEYJ V (0 kω) S.RESISTOR ERJGEYJ 0 V ( kω) S.RESISTOR ERJGEYJ 0 V ( MΩ) S.RESISTOR ERJGEYJ 0 V (00 kω) S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V (00 Ω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ 0 V (00 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) N S.RESISTOR ERJGEYJ V (. kω) M S.RESISTOR ERJGEYJ V (. kω) W R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) N S.RESISTOR ERJGEYJ V (0 kω) M, W R 0000 S.TRIMMER EVM-YSX0 B (0) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.ARRAY EXB-VV 0JV R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) N S.RESISTOR ERJGEYJ V ( kω) M, W Ò: L-band, Ó: H-band, N: N-type, M: M-type, W: W-type e: ETS/CEPT version, u: EIA/TIA version - [MAIN UNIT] ORDER S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R 0000 S.TRIMMER EVM-YSX0 B (0) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V (. kω) S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V (00 Ω) R S.RESISTOR ERJGEYJ V ( kω) S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) S.TRIMMER EVM-YSX0 B (0) S.RESISTOR ERJGEYJ V ( kω) S.RESISTOR ERJGEYJ 0 V ( kω) S.RESISTOR RR0P--D (. kω) S.RESISTOR ERJGEYJ 0 V (00 Ω) S.RESISTOR MCR0EZHJ Ω (0) S.RESISTOR MCR0EZHJ Ω (0) S.RESISTOR ERJGEYJ 0 V (0 kω) S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJWRSJU ( Ω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR RR0R-0-D (00 kω) R S.THERMISTOR NTCCF0 AH KC-T R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) S.=Surface mount

25 [MAIN UNIT] ORDER S.RESISTOR RR0R--D (0 kω) R S.RESISTOR RR0R--D (0 kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) N S.RESISTOR ERJGEYJ V ( kω) M, W R S.ARRAY EXB-VV 0JV R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.ARRAY EXB-VV 0JV R S.ARRAY EXB-VV 0JV R S.RESISTOR ERJGEYJ V ( kω) S.RESISTOR ERJGEYJ V (0 kω) R S.ARRAY EXB-VV 0JV R S.ARRAY EXB-VV 0JV R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.ARRAY EXB-VV 0JV R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.ARRAY EXB-VV 0JV R S.RESISTOR ERJGEYJ 0 V (00 kω) S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V ( kω) S.RESISTOR RR0P-0-D (0 kω) S.RESISTOR ERJGEYJ V (0 kω) S.RESISTOR ERJGEYJ 0 V (00 kω) S.RESISTOR ERJGEYJ V (0 Ω) S.RESISTOR ERJGEYJ 0 V ( Ω) S.RESISTOR ERJGEYJ 0 V ( MΩ) S.RESISTOR ERJGEYJ 0 V (00 Ω) C S.CERAMIC C0 CH H 00D-T-A C S.CERAMIC C0 CH H 00B-T-A C S.CERAMIC C0 CH H 00J-T-A C S.CERAMIC C0 CH H 00B-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A Ò S.CERAMIC C0 CH H 00D-T-A Ó C S.CERAMIC C0 CH H 0J-T-A Ò S.CERAMIC C0 CH H 0J-T-A Ó C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C 0000 S.ELECTROLYTIC ECEVCA0P C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 00B-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0B-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 00B-T-A Ò S.CERAMIC C0 CH H 00B-T-A Ó C S.CERAMIC C0 CH H B-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A Ò: L-band, Ó: H-band, N: N-type, M: M-type, W: W-type e: ETS/CEPT version, u: EIA/TIA version - [MAIN UNIT] ORDER C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A Ò S.CERAMIC C0 JB H K-T-A Ó C S.CERAMIC C0 CH H J-T-A Ò S.CERAMIC C0 CH H 0J-T-A Ó C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB C 0KT-N C 0000 S.TANTALUM ECSTAYR C 0000 S.TANTALUM ECSTCYR C S.TANTALUM ECST0JY0R C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A Ò S.CERAMIC C0 CH H 0J-T-A Ó C S.CERAMIC C0 CH H 0J-T-A Ò S.CERAMIC C0 CH H 00D-T-A Ó C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 00B-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 00D-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB C 0KT-N C 0000 S.TANTALUM ECSTCY0R C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 CH H 00J-T-A Ò S.CERAMIC C0 CH H 0J-T-A Ó C S.CERAMIC C0 CH H 00D-T-A C S.CERAMIC C0 CH H 00B-T-A C S.CERAMIC C0 CH H 00B-T-A Ò S.CERAMIC C0 CH H B-T-A Ó C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 00B-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H J-T-A C S.CERAMIC C0 CH H 00D-T-A Ò S.CERAMIC C0 CH H 00B-T-A Ó C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 00D-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 00B-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 00D-T-A C S.CERAMIC C0 CH H 00B-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A N, M S.CERAMIC C0 CH H 00D-T-A W C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB C K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 CH H 0J-T-A N S.CERAMIC C0 CH H 0J-T-A M, W C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB E 0K-T-A S.=Surface mount F/S

26 F/S [MAIN UNIT] ORDER C S.CERAMIC C0 JF C 0Z-T-A C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 CH H J-T-A C S.CERAMIC C0 CH H J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB H K-T-A C S.CERAMIC C0 JB H K-T-A C S.CERAMIC C0 JF C 0Z-T-A C 0000 S.TANTALUM ECST0JYR C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 CH H J-T-A C S.CERAMIC C0 CH H J-T-A C S.CERAMIC C0 JB H K-T-A C S.CERAMIC C0 JB C K-T-A N S.CERAMIC C0 JB C K-T-A M, W C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C 0000 S.ELECTROLYTIC ECEVCA00SR C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JF C 0Z-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB C 0KT-N C S.TANTALUM ECST0JY0R C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB C K-T-A C 0000 S.ELECTROLYTIC ECEVAAP C 0000 S.ELECTROLYTIC ECEVCA00SR C 0000 S.ELECTROLYTIC ECEVCA00SR C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C 0000 S.ELECTROLYTIC ECEV0JA0SP C S.CERAMIC C0 JF C 0Z-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 JB H K-T-A C 0000 S.ELECTROLYTIC ECEVCA0SP C 0000 S.ELECTROLYTIC ECEV0JA0SR C 0000 S.ELECTROLYTIC ECEV0JA0SR C 0000 S.ELECTROLYTIC ECEV0JA0SR C 0000 S.ELECTROLYTIC ECEV0JA0SR C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 00D-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H K-T-A C S.CERAMIC C0 JB H K-T-A C 0000 S.TANTALUM ECSTAYR C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A Ò: L-band, Ó: H-band, N: N-type, M: M-type, W: W-type e: ETS/CEPT version, u: EIA/TIA version - [MAIN UNIT] ORDER C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C 0000 S.TANTALUM ECSTAYR C S.CERAMIC C0 JB C K-T-A C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB C K-T-A C S.CERAMIC C0 JB C K-T-A C S.CERAMIC C0 JB C 0KT-N C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.TANTALUM ECSTEYR C S.CERAMIC C0 JF C 0Z-T-A C S.CERAMIC C0 JF C 0Z-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H RB-T-A Ò only C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.TANTALUM ECST0JY0R C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB C K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 JB E 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H B-T-A C S.CERAMIC C0 CH H 0J-T-A Ò S.CERAMIC C0 CH H 00D-T-A Ó C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB H K-T-A Ò S.CERAMIC C0 JB H 0K-T-A Ó C S.CERAMIC C0 JB H K-T-A C S.CERAMIC C0 CH H 0J-T-A Ò S.CERAMIC C0 CH H 0J-T-A Ó C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 CH H 0J-T-A C S.CERAMIC C0 JB H 0K-T-A C S.CERAMIC C0 JB C 0KT-N S.=Surface mount