SERVICE MANUAL. VHF MARINE TRANSCEIVER im602

Transcript

1 SERVIE MANUAL VHF MARINE TRANSEIVER im0

2 INTRODUTION This service manual describes the latest service information for the I-M0 VHF MARINE TRANSEIVER at the time of publication. MODEL I-M0 VERSION USA USA- MIROPHONE HM- HM-W OLOR LAK WHITE To upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation. DANGER NEVER connect the transceiver to an A outlet or to a D power supply that uses more than. V. This will ruin the transceiver. DO NOT expose the transceiver to rain, snow or any liquids. DO NOT reverse the polarities of the power supply when connecting the transceiver. DO NOT apply an RF signal of more than 0 dm (00 mw) to the antenna connector. This could damage the transceiver s front end. ING PARTS e sure to include the following four points when ordering replacement parts:. 0-digit order numbers. omponent part number and name. Equipment model name and unit name. Quantity required <SAMPLE > 0000 S.I TAFN I-M0 MAIN UNIT pieces 0000 Screw screw I-M0 Top cover 0 pieces Addresses are provided on the inside back cover for your convenience. REPAIR NOTES. Make sure a problem is internal before disassembling the transceiver.. DO NOT open the transceiver until the transceiver is disconnected from its power source.. DO NOT force any of the variable components. Turn them slowly and smoothly.. DO NOT short any circuits or electronic parts. An insulated tuning tool MUST be used for all adjustments.. DO NOT keep power ON for a long time when the transceiver is defective.. DO NOT transmit power into a signal generator or a sweep generator.. ALWAYS connect a 0 d to 0 d attenuator between the transceiver and a deviation meter or spectrum analyzer when using such test equipment.. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver.

3 TALE OF ONTENTS SETION SPEIFIATIONS SETION INSIDE VIEWS - I-M HM- (OPTIONAL UNIT) SETION DISASSEMLY INSTRUTION SETION IRUIT - REEIVER IRUITS TRANSMITTER IRUITS PLL IRUITS DS IRUITS LOGI IRUITS POWER SUPPLY IRUITS PORT ALLOATIONS SETION ADJUSTMENT PROEDURES - PREPARATION PLL ADJUSTMENTS REEIVER ADJUSTMENTS SETION PARTS LIST SETION MEHANIAL PARTS AND DISASSEMLY - I-M HM HM- (OPTIONAL UNIT) SETION SEMI-ONDUTOR INFORMATION SETION OARD LAYOUTS - VR OARD SQL OARD DIAL OARD ONNET UNIT LOGI OARD MAIN UNIT AF UNIT HM HM- (OPTIONAL UNIT) SETION 0 LOK DIAGRAM SETION WIRING DIAGRAM SETION VOLTAGE DIAGRAM - LOGI OARD MAIN UNIT AF UNIT HM HM- (OPTIONAL UNIT)

4 SETION SPEIFIATIONS GENERAL Frequency coverage :.00. MHz (Tx).00. MHz (Rx) Mode : K0GE (FM) / K0G (DS) Usable channels : All international, U.S.A and anadian channels, plus, 0 Weather channels Power supply requirement :. V D ± % (negative ground) Usable temperature range : 0 to +0 ; F to +0 F urrent drain (at. V D) : Transmit at W. A typical Receive max. audio. A typical Antenna connector : SO- (0 Ω) Dimensions (projections not included) : 0(W) 0(H) 0.(D) mm; (W) (H) (D) inch Weight : 0 g;. lb TRANSMITTER Output power (at. V D) : High W Low W Modulation : Variable reactance frequency modulation Maximum frequency deviation : ±.0 khz Frequency error : ±0. khz Spurious emissions : Less than 0 dc Adjacent channel power : More than 0 d Residual modulation : More than 0 d Audio harmonic distortion : Less than 0% at 0% deviation Audio frequency response : + d to d of d octave from 00 Hz to 000 Hz Microphone impedance : kω REEIVER Receive system : Double conversion superheterodyne system Intermediate frequencies : st. MHz*,.0 MHz* nd 0 khz Sensitivity : Less than 0 dµ at d SINAD Squelch sensitivity : Less than 0 dµ at threshhold Adjacent channel selectivity : More than 0 d Spurious response : More than 0 d Intermodulation rejection ratio : more than 0 d Hum and noise : More than 0 d Audio output power (at. V D) :.0 W at 0% distortion with a Ω load Audio frequency responce : + d to d of d octave from 00 Hz to 000 Hz GPS interface : NMEA0 Ver..0 or.0 * For hannel 0 only, * For other channels Specifications are measured in accordance with TIA/EIA 0 All stated specifications are subject to change without notice or obligation. -

5 VHF MARINE HANNEL LIST hannel No. Frequency (MHz) hannel No. Frequency (MHz) hannel No. Frequency (MHz) USA 0A 0A 0A 0 0A * * * A A 0 0A INT * 0 AN A 0A 0 0A * * * A A 0* Transmit Receive USA A A A A A A A A * INT AN A b A b b 0 0 A A A A A A A* Transmit Receive RX only RX only RX only AN 0* * A A 0A A A A b * Low power only, * Receive only NOTE: hannels,,,,,, and ANNOT be used by the general public in USA waters. USA 0* * A A 0A A A A A A A A A INT 0* 0 Transmit Receive RX only WX HANNEL LIST Weather channel Transmit Frequency (MHz) Receive Weather channel Transmit Frequency (MHz) Receive WX0 Receive only.0 WX0 Receive only.00 WX0 Receive only.00 WX0 Receive only. WX0 Receive only. WX0 Receive only.0 WX0 Receive only. WX0 Receive only. WX0 Receive only.0 WX0 Receive only. -

6 SETION INSIDE VIEWS - I-M0 MAIN UNIT RF amplifier (Q: SK) RF amplifier (for H0) (Q: SK) Antenna switch circuit st mixer circuit (for H0) D: HSWS L, L: D-=P st mixer circuit D: HSWS L, L: D-=P TX/RX switch circuit (D, D*: MA) Power amplifier* (I: RAHM) RX VO circuit Q: PMFJ0 D, D: HV TX VO circuit Q: PMFJ0 D, D0: SV nd mixer (I: TAFN) PLL I (I: µpd0gs) nd mixer (for H0) (I: TAFN) Reference oscillator (X: R-A. MHz) D/A converter (I: MFP-0) * Located under side of the point LOGI OARD LOGI OARD Lithium battery (T: R0) EEPROM (I: HNXFPI) Reset I (I: S-0NM-G) PU (I: HDFF) DIAL OARD System clock (X: R-.0 MHz) SQL OARD VR OARD Speaker -

7 - HM- (OPTIONAL UNIT) TOP VIEW LD (DS: A0) OTTOM VIEW System clock (X: ST.MG) PU (I: µpd0agk-a0-eu) Data buffer circuit Dimmer circuit Reset I (I: S-0NM) regulator (I: TAL0F) V regulator (I: TA0F) Volume I (I: MFP) AF/MI switch (I: TWFU) MI amplifier (I: NJMF) AF amplifier (I: TAF) -

8 SETION DISASSEMLY AND OPTIONS INSTRUTIONS AUTION: DISONNET the D power cable from the transceiver before performing any work on the transceiver. Otherwise, there is danger of electric shock and/or equipment damage. Opening the transceiver case Unscrew screws A, and remove the front unit. Unscrew screws, and remove the rear panel. Removing the MAIN unit Remove the shield cover E. E A A A A A Removing the LOGI board Unsolder points. Disconnect microphone connector from J and SQL/DIAL connector from J. Unscrew screws D, and remove the LOGI board. Disconnect flat cables from J and J. Unsolder points F. Unscrew screws G, and remove the MAIN unit. D D G G D D F G D J J J F D D G G F J G J G Unsolder point -

9 Removing the AF unit Disconnect connectors from J, J, J and J0. Disconnect flat cables from J and J Unscrew screws H, and remove clips I, J. Unscrew screws K, and remove the AF unit. J I J J0 J J K H K K J J UT- VOIE SRAMLER UNIT INSTALLATION Plug UT- into J on the AF unit. UT- J -

10 SETION IRUIT - REEIVER IRUITS -- ANTENNA SWITHING IRUIT (MAIN UNIT) The antenna switching circuit functions as a low-pass filter while receiving and as resonator circuit while transmitting. The circuit does not allow transmit signals to enter the receiver circuits. Received signals enter the MAIN unit from the antenna connector and pass through the low-pass filter (L, L,,, ). The signals are then applied to the RF circuit via the antenna switching circuit (D, L, L, ). -- RF IRUIT (MAIN UNIT) The RF circuit amplifies signals within the range of frequency coverage and filters out-of-band signals. The signals from the antenna switching circuit pass through the tunable bandpass filter (L, ) which the object signals are led to each RF amplifier of channel 0 circuit (Q) or other channels (except channel 0) circuit (Q). HANNEL 0 IRUIT The amplified signals from the RF amplifier (Q) are applied to the -stage bandpass filter (L L, 0, 0, 0 ) to suppress unwanted signals and improve the selectivity. The signals are then applied to the st mixer circuit for channel ST MIXER AND ST IF IRUITS (MAIN UNIT) The st mixer circuit converts the received signal into a fixed frequency of the st IF signal with a st LO (VO output) frequency. y changing the st LO frequency, only the desired frequency will pass through a pair of crystal filters at the next stage of the mixer. HANNEL 0 IRUIT The signals from the RF circuit are mixed with the st LO signals at the st mixer circuit (D, L, L) to produce a. MHz st IF signal. The st IF signal is amplified at the st IF amplifiers (Q, Q), and then passes through the pair of crystal bandpass filters (FI, FI) to suppress out-of-band signals. The filtered signal is then amplified at the nd IF amplifier (Q0), and is then applied to the nd mixer circuit (I). OTHER HANNELS IRUIT The signals from the RF circuit are mixed with the st LO signals at the st mixer circuit (D, L, L) to produce a.0 MHz st IF signal. The st IF signal is amplified at the st IF amplifiers (Q, Q), and then passes through the crystal bandpass filter (FI) to suppress out-of-band signals. The filtered signal is then amplified at the nd IF amplifier (Q), and is then applied to the nd mixer circuit (I). OTHER HANNELS IRUIT The amplified signals from the RF amplifier (Q) are applied to the -stage bandpass filter (L L,,, ) to suppress unwanted signals and improve the selectivity. The signals are then applied to the st mixer circuit for other channels. ST MIXER AND ST IF IRUITS For other channels ANT to the nd mixer circuit (I, pin ) RF amp. PF Ib RF amp. st LO signal PF Ib Ant sw. LPF Ib Ib to the nd mixer circuit (I, pin ) RF amp. For channel 0 only PF Ib RF amp. st LO signal -

11 -- ND IF AND DEMODULATOR IRUITS (MAIN UNIT) The nd mixer circuit converts the st IF signal into a nd IF signal. A double superheterodyne system (which converts receive signals twice) improves the image rejection ratio and obtains stable receiver gain. The FM IF I (I for channel 0, I for other channels) contains the nd local oscillator, nd mixer, limiter amplifier, quadrature detector, and noise detector circuits, etc. HANNEL 0 IRUIT The st IF signal from the nd IF amplifier (Q0) is applied to the nd mixer section of FM IF I (I, pin ), and is mixed with a. MHz nd LO signal, which is generated at the nd oscillator section in I and X, to produce a 0 khz nd IF signal. The nd IF signal from I (pin ) is passed through the ceramic filter (FI), which unwanted signals are suppressed, and is then applied to the nd IF (limiter) amplifier in I (pin ). The signal is applied to the FM detector section in I for demodulating into AF signals. The FM detector circuit employs a quadrature detection method (linear phase detection), which uses a ceramic discriminator (X) for phase delay to obtain a non-adjusting circuit. The detected signal from I (pin ) is applied to the AF circuit. OTHER HANNELS IRUIT The st IF signal from the nd IF amplifier (Q) is applied to the nd mixer section of FM IF I (I, pin ), and is mixed with a 0. MHz nd LO signal, which is generated at the PLL circuit using the reference frequency (. MHz), to produce a 0 khz nd IF signal. The nd IF signal from I (pin ) is passed through the ceramic filter (FI), which unwanted signals are suppressed, and is then applied to the nd IF (limiter) amplifier in I (pin ). The signal is applied to the FM detector section in I for demodulating into AF signals. The FM detector circuit employs a quadrature detection method (linear phase detection), which uses a ceramic discriminator (X) for phase delay to obtain a non-adjusting circuit. The detected signal from I (pin ) is applied to the AF circuit. ND IF AND DEMODULATOR IRUITS (For HANNEL 0 ONLY) Limiter amp. nd IF filter 0 khz FI (. MHz) X. MHz Ia, Ib "DE" signal I DS decoder Ic, Id FM detector nd Mixer AF signal "DET" I ND IF AND DEMODULATOR IRUITS (For OTHER HANNELS) D/A convertor I (I, pin ) 0 X nd IF filter 0 khz FI V (0. MHz) Q I TAFN st IF (. MHz) from Q0 PLL I I "WXDE" signal Ia Active filter FM detector Noise detector Limiter amp. RSSI nd Mixer X. MHz "DE" signal DS decoder Ib 0 I TAFN st IF (.0 MHz) from Q AF signal "DET" I X V "NOISE" signal to the SQL amplifier (I, pin ) -

12 -- AF AMPLIFIER IRUIT (AF UNIT) The AF amplifier circuit amplifies the demodulated signals to drive a speaker. The AF circuit includes an AF mute circuit for the squelch. AF signals from the FM IF Is (channel 0; I, pin, other channels I, pin ) are passed through the analog switch (I, pins 0, ) via the DET signal, and are applied to the de-emphasis circuit (R, ). The de-emphasis circuit is an integrated circuit with frequency characteristic of d/octave. The signals pass through the bandpass filter (Q, Q), and are then applied to the AF mute swtich (Q). The signals passed through the [VOLUME] control (VR unit; R), and are then applied to the AF power amplifier (I, pin ) to obtain W AF audio output power. The amplified AF signals drive the internal speaker as SP+ signal directly or external speaker as AF signal via the RL. -- SQUELH IRUIT (MAIN AND LOGI UNITS) A squelch circuit cuts out AF signals when no RF signals are received. y detecting noise components in the AF signals, the squelch circuit switches the AF mute switch. A portion of the AF signals from the FM IF I (I, pin ) is passed through, and is applied to the D/A converter (I, pin ) to control the amplitude. The signal is applied to the FM IF I s active filter section (I, pin ). The active filter section amplifies and filters noise components. The filtered signals are applied to the noise detector section and output from pin as the SQL signal. The SQL signal is amplified at the D amplifier (I) and applied to the main PU (LOGI unit; I, pin 0) as the SQL signal. The main PU compares SQL voltage with SQLV voltage from the SQL board, and outputs the MIM and RMUTE signals to toggle the AF mute switches (Q, Q). The amplified signals are applied to the ID amplifier (Ia, pin ) via the analog switch (I, pins,, ), and are then passed through the splatter filter (Ib) to suppress unwanted khz or higher signals. The filtered signals are applied to the modulation circuit. -- MODULATION IRUIT (MAIN UNIT) The modulation circuit modulates the VO oscillating signal (RF signal) using the microphone audio signals. The audio signals from the splatter filter (Ib) are passed through the D/A converter I (I, pins, ), and are then applied to the modulation circuit. The applied signals change the reactance of the varactor diode (D), and modulate the oscillated signal at the TX-VO (Q). -- PRE-DRIVE AND YGR AMPLIFIERS IRUIT (MAIN UNIT) The drive amplifier circuit amplifies the VO oscillating signal to a level needed at the power amplifier. The output signal from VO circuit is amplified at the buffer amplifiers (Q and Q), and is applied to the TX/RX switch (D). The transmit signal from the TX/RX switch is amplified at the pre-drive (Q) and YGR (Q0) amplifiers to obtain an approximate 0 mw signal level. The amplified signal is then applied to the RF power amplifier (I). -- POWER AMPLIFIER IRUIT (MAIN UNIT) The power amplifier circuit amplifies the driver signal to an output power level. I is a power module which has amplification output capabilities of about W with 0 mw input. The output signal from I (pin ) is passed through the antenna switching circuit (D) and is then applied to the antenna connector via the low-pass filter (L, L, L,,,,, ). - TRANSMITTER IRUITS -- MIROPHONE AMPLIFIER IRUIT (AF UNIT) The microphone amplifier circuit amplifies audio signals with + d/octave pre-emphasis from the microphone to a level needed at the modulation circuit. USING HM- The AF signals from the microphone (A unit; HM-) are amplified at the microphone amplifier (Ia) via the analog switch (I, pins, 0) as MI signal. A capacitor () and resistor (R) are connected to the microphone amplifier to obtain the pre-emphasis characteristics. USING HM- The AF signals from the microphone (A unit; HM-) are amplified at the microphone amplifier (Ia) via the analog switch (connecting option jack: I, pins,, ; connecting option jack: I, pins,, 0) as AF/MI or AF/MI signals. A capacitor () and resistor (R) are connected to the microphone amplifier to obtain the preemphasis characteristics. -

13 -- AP IRUIT (MAIN UNIT) The AP (Automatic Power ontroller) circuit stabilizes the TX output power. The RF output signal from the power amplifier (I) is detected at the power detector circuit (D, D) and is applied to AP controller. The applied voltage compares to PON signal from the D/A converter I (I, pin ), and then outputs the differential bias voltage for power amplifier (I, pin ). Thus the AP circuit maintains a constant output power. - PLL IRUITS -- GENERAL The PLL circuit provides stable oscillation of the transmit frequency and receive st LO frequency. The PLL circuit compares the phase of divided VO frequency with the reference frequency. The PLL output frequency is controlled by the crystal oscillator and divided ratio of the programmable divider. I is a dual PLL I, which controls both TX and RX VO circuits, and contains a prescaler, programmable counter, programmable divider, phase detector, charge pomp and etc. The PLL circuit, using a one chip PLL I (I), directly generates the transmit frequency and receive st IF frequency with VOs. The PLL I sets the divided ratio based on serial data from the main PU, and compares the phases of VO signals with the reference oscillator frequency. The PLL I detects the out-of-step phase and outputs from pins and for TX and RX, respectively. The reference frequency (. MHz) is oscillated at the reference oscillator (X). -- TX AND HANNEL 0 (RX) LOOPS The generated signal at the TX-VO/HANNEL 0-VO (Q, D, D0) enters the PLL I (I, pin ) and is divided at the programmable divider section and is then applied to the phase detector section. The phase detector compares the input signal with a reference frequency, and then outputs the out-of-phase signal (pulse-type signal) from pin. The pulse-type signal is converted into D voltage (lock voltage) at the loop filter (R R,,, ), and is then applied to the varactor diodes (D, D0) of the TX-VO to stabilize the oscillated frequency. -- OTHER HANNELS (RX) LOOP The generated signal at the RX-VO (Q, D, D) enters the PLL I (I, pin ) and is divided at the programmable divider section and is then applied to the phase detector section. The phase detector compares the input signal with a reference frequency, and then outputs the out-of-phase signal (pulse-type signal) from pin. The pulse-type signal is converted into D voltage (lock voltage) at the loop filter (R, R, R,, ), and is then applied to the varactor diodes (D, D) of the RX-VO to stabilize the oscillated frequency. The lock voltage from the loop filter is amplified at the buffer amplifier (Q), and is then applied to the RF circuit. AP IRUIT RF signal from PLL Q Pre drive Q0 YGR Power module I D L D RF detector circuit to antenna Q I T AP control circuit Q H/L "TMUTE" signal from the PU (LOGI board; I, pin ) "PON" signal from the D/A convertor (I, pin ) "TXDET" signal to the PU (LOGI board; I, pin 0) -

14 -- VO IRUIT (MAIN UNIT) TX-VO/HANNEL 0-VO (RX) IRUITS The VO outputs from TX-VO/HANNEL 0-VO (Q) are amplified at the buffer amplifiers (Q and Q), and are applied to the TX/RX switch circuit (D, D). The receiver LO signal is applied to the st mixer circuit for HANNEL 0 (D, L, L) passing through a low-pass filter (L, L, 0 ), and the transmitter signal is applied to the predrive amplifier (Q). A portion of the VO output signal is re-applied to the PLL I (I, pin ) via the buffer amplifier (Q). OTHER HANNELS-VO (RX) IRUITS The VO outputs from OTHER HANNELS-VO (Q) are amplified at the buffer amplifiers (Q and Q). The receiver LO signal is applied to the st mixer circuit for OTHER HANNELS (D, L, L) passing through a low-pass filter (L, L, ). A portion of the VO output signal is re-applied to the PLL I (I, pin or pin ) via the buffer amplifier (Q). - DS IRUITS -- DS MODULATION IRUIT (LOGI, AF AND MAIN UNITS) The ATIS signal from the PU (LOGI unit; I, pin ) is applied to the buffer amplifier (AF unit; Q) as DS signal. The signal passes through the analog switch (AF unit; I, pin ), and then applied to ID amplifier (AF unit; Ia). Then, the amplified signal is applied to the transmitter circuit. The signalis passed through the splatter filter (AF unit; Ib) to suppress unwanted khz or higher signals. The filtered signals are then applied to the TX modulation circuit via the D/A converter I (MAIN unit; I, pins, ) as a DS modulation signal MOD. - LOGI IRUITS -- MAIN UNIT PU I is a bit single chip micro-computer, which contains LD driver, serial I/O, timer, A/D converter, programmable I/O, ROM and RAM. SYSTEM LOK IRUIT X is a crystal oscillator, which oscillates.0 MHz system clock for the main PU (I). RESET IRUIT I is a reset I, which outputs a reset signal ( LOW pulse) to main PU (I, pin ) when turning transceiver power ON. PLL IRUIT uffer Q D to st mixer circuit VO uffer Q D to transmitter circuit Loop filter Q, D, D0 uffer Q I (PLL I) Phase detector Programmable counter Prescaler 0. MHz signal to the FM IF I (I, pin ) X. MHz Q Programmable divider Shift register/ data latch PST PK PDATA DS IRUIT "DS" signal from the PU (LOGI board; I, pin ) I uff. amp. Q analog switch Ia ID amp. LPF Ib D/A convertor I to VO circuit -

15 - POWER SUPPLY IRUITS -- VOLTAGE LINE (MAIN UNIT) LINE. HV HVS V T R The. V from the connected D power supply. Same voltage as the HV line which is passed through the [PWR] switch (LOGI unit; S). Same voltage as the HVS line which is passed through the power controller (AF unit; RL). Same voltage as the. V line, and is applied to the AF power amplifiers (AF unit; I, I0), LOGI unit, etc. ommon V converted from the line at the +V regulator circuit (AF unit; I). The output voltage is applied to the T controller (MAIN unit; Q, Q), + regulator (AF unit; I), R regulator (AF unit; Q, Q), etc. ommon V converted from the V line at the + regulator circuit (AF unit; I). The output voltage is applied to the buffer amplifiers (AF unit; I, Q), expander Is (AF unit; I, I), etc. Transmit V controlled by the T control circuit (MAIN unit; Q, Q) using the SEND signal from main PU. The output voltage is applied to the pre-dirve (MAIN unit; Q), YGR amplifier (MAIN unit; Q0), AP controller (MAIN unit; I), etc. Receive V controlled by the R control circuit (AF unit; Q, Q) using the RV signal from main PU. The controlled voltage is applied to the bandpass filter (AF unit; Q, Q), buffer and IF amplifiers (AF unit; Q and Q), etc. - PORT ALLOATIONS -- EXPANDER I (AF unit; I) Pin number Port name MIS MIS SPS SPS SP PLVL RV HL Description Outputs HM-/ control signal. High : While transmitting via the HM-/. Outputs HM-/ control signal. High : While transmitting via the HM-/. Outputs HM-/ control signal. High : While receiving via the HM-/. Outputs HM-/ control signal. High : While receiving via the HM-/. Outputs the internal speaker (FRONT unit; SP) control signal. High : The speaker is activating. Outputs beep audio level control signal. Low : eep audio level is maximum. Outputs the R regulator (AF unit; Q, Q) control signal. High : While receiving. Outputs the Hailer speaker TX/RX select signal. High : While transmitting via the Hailer speaker. -- EXPANDER I (AF unit; I) Pin Port Description number name STRU AFSU INMH INHM MI/DS HAILIN FOG HAILOUT Outputs scrambler unit bypass control signal. High : ypassing the scrambler unit. Outputs sound signals to the HM-. High : Sounding from HM-. Outputs voice signals from I-M0 to HM- using intercom function. High : While receiving. Outputs voice signals from HM- to I-M0 using intercom function. High : While transmitting. Outputs MI/DS modulation circuit control signal. High : While the DS signal is modulated. Outputs the microphone select signal. High : While using the hailer speaker. Outputs fog horn control signal. High : Fog horn is ON. Outputs the microphone select signal. High : While using the HM-. -

16 -- PU (LOGI OARD; I) Pin number Port name Description Pin number Port name Description UNLK EDATA Input port for PLL unlock signal from the PLL I (MAIN unit; I, pin ). High : While PLL is unlocked. I/O port for the data signals to the EEPROM (I, pin ). 0 0 LAT TXDET Input port for the low-battery detecting signal. Low battery indicator appears when the battery becomes less than. V Input port for transmit detecting signal. EK Outputs a clock signal to the EEP- ROM (I, pin ). 0 TEMP Input port for the indide temperature detecting signal. DE. Input port for the decode signal for channel 0 receiver. DIAL DIAL Input ports for the dial data signals. DE EEP DATAM DATAM DATAMH DATAHM Input port for the ATIS/DS decode signals. Outputs beep audio signals. I/O port for the cloning data from the transceiver. I/O port for the cloning data to the transceiver. I/O port for the communicating signal from the transceiver to the microphone (HM-/). I/O port for the communicating signal from the microphone (HM-/) to the transceiver. 0 PTT HANG DS SON OPST DAST Input port for the HM- s PTT button detecting signal. Low : While PTT button is pushed. Input port for the microphone hanger detecting signal Low : The microphone on hook. Outputs ATIS/DS encode signals. Outputs the voice scramber unit (UT-) control signal. Outputs a strobe signal to the voice scrambler unit (UT-). Outputs a strobe signal to the PLL I (MAIN unit; I, pin ). 0 DATANM DATAMN PDATA PK OPTIN I/O port for the GGA signals I/O port for the NMEA data. Outputs a data signal to the PLL I (MAIN unit; I, pin ). Outputs a clock signal to the PLL I (MAIN unit; I, pin ). Outputs the voice scrambler unit (UT-) detecting signal. Low : While UT- is connecting. PST DATAHM DATAMH Outputs a strobe signal to the D/A convertor I (MAIN unit; I, pin ). I/O port for the communicating singal from the microphone (HM-/) to the transceiver. I/O port for the communicating singal from the transceiver to the microphone (HM-/). RMUTE Outputs RX muting signal. High : While RX signal is muting. TMUTE Outputs transmit mute signal. High : While TX muting. SEND Outputs T regulator control signal. High: While transmitting. H/L Output port for RF output power (High or Low) select signal. Low : While Low power is selected. Output RX attenuator control signals. ATT ATT ATT level ATT ATT OFF ON () 0 ON () 0 MAX. 0 0 WXDE SQL Input port for the weather alert signal. Input port for the FM IF I (MAIN unit; I, pin ) s noise amplifier detecting signal. -

17 SETION ADJUSTMENT PROEDURES - PREPARATION REQUIRED TEST EQUIPMENT EQUIPMENT D power supply External speaker Tracking generator Output voltage urrent capacity Input impedance apacity Frequency range Output level GRADE AND RANGE :. V D : 0 A or more : Ω : W or more : MHz : 0. µv mv ( dm to dm) EQUIPMENT Standard signal generator (SSG) D voltmeter Distortion meter GRADE AND RANGE Frequency range : MHz Output level : 0. µv mv ( to dm) Input impedance : 0 kω/v D or better Frequency range : khz ±0 % Measuring range : 00 % ONNETION I-M0 rear panel to the antenna connector AUTION! DO NOT transmit while an SSG is connected to the antenna connector. Standard signal generator MHz dm to dm (0. V to mv) Tracking generator to external speaker jack Power supply. V / 0 A or more load Distortion meter NOTE: EXTERNAL SPEAKER JAK PIN ONNETION NMEAOUT (+) NMEAOUT ( ) NMEAIN ( ) SP (+) SP ( ) NMEAIN (+) -

18 - PLL ADJUSTMENTS ADJUSTMENT LOK VOLTAGE ADJUSTMENT ONDITION Operating channel : ch P Receiving Operating channel : ch P Output power : Low Transmitting Operating channel : ch 0 Receiving ADJUSTMENT MEASUREMENT VALUE POINT UNIT LOATION UNIT ADJUST MAIN onnect a digital multi-meter or oscilloscope to check point P. onnect a digital multi-meter or oscilloscope to check point P.. V.0 V. V. V.. V MAIN L L Verify MAIN UNIT TOP VIEW L Lock voltage adjustment for TX P Lock voltage check point for RX P Lock voltage check point for TX L Lock voltage adjustment for RX -

19 - REEIVER ADJUSTMENTS ADJUSTMENT SENSITIVITY (Except channel 0) ADJUSTMENT ONDITION Operating channel : ch onnect a tracking generator s output to the antenna connector and set as: Level :. mv* ( 0 dm) ADJUSTMENT MEASUREMENT VALUE POINT UNIT LOATION UNIT ADJUST MAIN onnect a tracking generator s input to the MAIN unit; J. Set the flat wave form as shown below. Set to flat wave form MAIN L L L L L MHz MHz (hannel 0) Operating channel : ch onnect an SSG to the antenna connector and set as: Frequency :.00 MHz Level : 0 µv* ( dm) Modulation : khz Deviation : ±. khz Set the internal speaker OFF in the SET mode, and connect a distortion meter with a Ω load to [EXT SP] receptacle. Receiving MAIN onnect a D voltmeter to check point P. Maximum voltage MAIN L L L L *This output level of a standard signal generator (SSG) is indicated as SSG s open circuit. -

20 MAIN UNIT TOP VIEW L L L L RX sensitivity adjustment for channel 0 L L L L L RX sensitivity adjustment for other channels J RX sensitivity check point -

21 SETION PARTS LIST - I-M0 [SQL OARD] REF R 0000 VARIALE TPN-F-0K-0 EP 000 P [LOGI OARD] REF I 000 S.I HDFF (FXA-) I 0000 S.I S-0NM-G-T I 0000 S.I RT-A I 0000 S.I HNXFPI I 0000 S.I S-AAU-GN-T [VR OARD] REF R VARIALE TPN-F-0KA- W 0000 ALE OP- EP 000 P Q Q Q Q Q Q Q Q Q Q Q Q Q S.TRANSISTOR SA-GR (TER) S.TRANSISTOR DTEUA T S.TRANSISTOR DTEUA T S.TRANSISTOR DTEUA T S.TRANSISTOR DTEUA T S.TRANSISTOR DTAEUA T S.TRANSISTOR DTEUA T S.TRANSISTOR DTEUA T S.TRANSISTOR DTAEUA T S.TRANSISTOR DTAEUA T S.TRANSISTOR S-L (TER) 0000 S.TRANSISTOR S-L (TER) S.TRANSISTOR S T00 R [ONNET UNIT] REF J 000 ONNETOR LTW-MP- <LIA> J 000 ONNETOR LTW-MP- <LIA> J 000 ONNETOR LTWD-0PMMP-L <LIA> J 0000 S.ONNETOR 0FLT-SM-T J 000 S.ONNETOR -ZR-SM-TF EP 000 P [DIAL UNIT] REF S ENODER EVQ-V00E W 0000 ALE OP- EP 000 P [FRONT UNIT] REF SP 0000 SPEAKER 0P00 <KS> W 0000 ALE OP- <LIA> W JUMPER ERDST0 W JUMPER ERDST0 D S.DIODE DAN0K T D S.DIODE DA0K T D S.DIODE DA0K T D S.DIODE DA0K T D 0000 S.ZENER MA0-M (TX) D S.DIODE HSUTRF D S.DIODE HSUTRF D S.DIODE HSUTRF D S.DIODE HSUTRF D S.DIODE HSUTRF D S.DIODE HSUTRF D S.DIODE HSUTRF D S.DIODE HSUTRF X S.XTAL R- (.0 MHz) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) S.=Surface mount -

22 [LOGI OARD] REF R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) 0000 S.TANTALUM ESTR S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H K-T 0000 S.ELETROLYTI EEVHARSR S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T 0000 S.ELETROLYTI EEVA00SR S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T 0000 S.ELETROLYTI EEVA00SR S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T 0000 S.ELETROLYTI EEVA00SR S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T [LOGI OARD] REF 0000 S.TANTALUM ESTVXR 0000 S.TANTALUM ESTVXR 0000 S.TANTALUM ESTVXR 0000 S.TANTALUM ESTVXR S.TANTALUM ESTVY0R S.TANTALUM ESTVY0R S.TANTALUM ESTVY0R S.TANTALUM ESTVY0R S.TANTALUM ESTVY0R S.ERAMI 0 J H 0K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 J H 0K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T S.ERAMI 0 H H 0J-T J 000 S.ONNETOR FLT-SM-T J 000 S.ONNETOR FLT-SM-T J 000 S.ONNETOR FLZ-SM-T J 000 S.ONNETOR -PH-SM-T J 000 ONNETOR H-00. <LT> J 000 S.ONNETOR -ZR-SM-TF J 000 S.ONNETOR -ZR-SM-TF DS LD HLM-0000 DS S.LED FY0F-TR (LED) DS S.LED FY0F-TR (LED) DS S.LED FY0F-TR (LED) DS S.LED FY0F-TR (LED) DS S.LED FY0F-TR (LED) DS S.LED FY0F-TR (LED) DS S.LED SML-YTT DS S.LED SML-YTT DS S.LED SML-YTT DS S.LED SML-YTT DS S.LED SML-YTT DS S.LED SML-YTT DS S.LED SML-YTT DS S.LED SML-YTT DS S.LED SML-YTT DS S.LED SML-YTT DS S.LED SML-YTT DS S.LED SML-YTT S.=Surface mount -

23 [LOGI OARD] REF DS S.LED FY0F-TR (LED) DS S.LED FY0F-TR (LED) DS S.LED FY0F-TR (LED) DS S.LED FY0F-TR (LED) DS S.LED FY0F-TR (LED) DS S.LED FY0F-TR (LED) S SWITH SPPH0A T LITHIUM R0 EP 0000 P [AF UNIT] REF I I TA0S I S.I TAL0F (TER) I I LAA I 0000 S.I U0F-E I 0000 S.I U0F-E I 0000 S.I MAFP 00 I 0000 S.I U0F-E I 0000 S.I MAFP 00 I 0000 S.I MAFP 00 I I TAL I 0000 S.I MFP 00 I S.I PNT I 000 S.I UFV-E I S.I NJM0F-TE I 0000 S.I U0F-E I 0000 S.I U0FV-E I 0000 S.I U0FV-E I 0000 S.I TSFU (TER) I S.I NJM0F-TE Q S.TRANSISTOR S T00 R Q S.TRANSISTOR DTEUA T0 Q 0000 S.TRANSISTOR S- (TER) Q S.TRANSISTOR DTEUA T0 Q 0000 S.TRANSISTOR S-L (TER) Q 0000 S.TRANSISTOR S-L (TER) Q 0000 S.TRANSISTOR S-L (TER) Q 0000 S.FET SJ-Y (TER) Q S.FET SK0--TL Q 0000 S.TRANSISTOR S-L (TER) Q 0000 S.TRANSISTOR S0 T0 S Q S.TRANSISTOR DTEUA T0 Q S.FET SK0--TL Q 0000 S.TRANSISTOR S0 T0 S Q S.TRANSISTOR SAA T0R Q S.FET SK0--TL Q 0000 S.TRANSISTOR S0 T0 S Q S.TRANSISTOR SAA T0R D DIODE DSAA D S.DIODE SS TE- D S.DIODE DAP0K T D S.DIODE DA0K T D S.DIODE SS TE- D 0000 S.ZENER MA0-M (TX) D S.DIODE SS TE- D S.DIODE SS TE- D S.DIODE DA0K T D 0000 S.ZENER MA0-M (TX) D 0000 S.ZENER MA0-M (TX) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) [AF UNIT] REF R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR MR0EZHJ. Ω (R) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ 0 V ( kω) S.=Surface mount -

24 [AF UNIT] REF R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR MR0EZHJ Ω (00) R S.RESISTOR MR0EZHJ Ω (00) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V (0 kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ 0 V (00 kω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ 00 V (0 Ω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ 0 V ( kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ 0 V ( Ω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ 0 V ( MΩ) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (. kω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V (0 Ω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ V ( kω) R S.RESISTOR ERJGEYJ R0 V ( Ω) S.ERAMI 0 H H 0J-T S.ERAMI 0 J H 0K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 J H 0K-T S.ERAMI 0 H H 0J-T ELETROLYTI MV 0 H S.ERAMI 0 H H 0J-T S.ERAMI 0 J H 0K-T 0000 S.ELETROLYTI EEVA00SR S.ERAMI 0 J E 0K-T 0000 S.ELETROLYTI EEVA00SR S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T 0000 S.ELETROLYTI EEVA00SR S.ERAMI 0 J H 0K-T S.ERAMI 0 J A 0M-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J A 0M-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T 0000 ELETROLYTI MV 0 H 0000 ELETROLYTI MV 0 H S.ERAMI 0 J E 0K-T S.ERAMI 0 J H K-T S.TANTALUM TESVA V 0M-L S.ERAMI 0 J H K-T S.ERAMI 0 J H K-T S.ERAMI 0 J H K-T S.ERAMI 0 J H K-T 0000 S.ELETROLYTI EEVA00SR S.ERAMI 0 J A 0M-T S.ERAMI 0 J A 0M-T S.ERAMI 0 J H K-T S.ERAMI 0 J A 0M-T [AF UNIT] REF S.ERAMI 0 J A 0M-T S.ERAMI 0 J H K-T S.ERAMI 0 J H K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J A 0M-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J A 0M-T S.ERAMI 0 J H 0K-T 0000 S.ELETROLYTI EEVA00SR S.ERAMI 0 J E 0K-T 0000 S.ERAMI 0 J A K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 J H K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H K-T S.ERAMI 0 H H 0J-T S.ERAMI 0 J H K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T 0000 S.ELETROLYTI EEVA00SR S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ELETROLYTI EEVHARSR S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J A 0M-T S.ERAMI 0 J E 0K-T S.ELETROLYTI EEVHARSR ELETROLYTI MV 000 H S.ERAMI 0 J H 0K-T S.ELETROLYTI EEVA0UP S.ELETROLYTI EEVA0UP 0000 S.ELETROLYTI EEVA0SP 0000 S.ELETROLYTI EEVAP 0000 S.ELETROLYTI EEVAP S.ERAMI 0 J H 0K-T S.ERAMI 0 J H K-T S.ERAMI 0 J H K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J A 0M-T S.ERAMI 0 J A 0M-T S.ERAMI 0 J A 0M-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J E 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H 0K-T S.ERAMI 0 J H K-T S.ERAMI 0 J H 0K-T S.=Surface mount -

25 [AF UNIT] REF S.ERAMI 0 J H K-T 0000 S.ERAMI 0 J A K-T 0000 S.ERAMI 0 J A K-T S.ELETROLYTI EEVA00SR RL 0000 RELAY FTR-PP0W RL 0000 RELAY FTR-FAA0E RL 0000 RELAY FTR-FA0V J 000 S.ONNETOR FLT-SM-T J 000 S.ONNETOR 0FMN-MTTR-A-TT J 000 S.ONNETOR 0- J 0000 S.ONNETOR 0FLT-SM-T J 000 ONNETOR HVQ-A J 000 S.ONNETOR -ZR-SM-TF J 000 S.ONNETOR -PH-SM-T J 0000 ONNETOR 0-EH-S J ONNETOR OP-0 J ONNETOR OP-0 W S.JUMPER MR0EZHJ JPW (000) W S.JUMPER ERJGE JPW V W 0000 ALE OP-0 EP 000 P 0D EP 000 S.EAD LMSND (LMS) EP 000 S.EAD LMSND (LMS) [MAIN UNIT] REF I 0000 S.I TAFN (D,EL) I 0000 S.I NJMF-TE I 0000 S.I NJM0V-TE I 000 S.I UFV-E I 0000 S.I TAFN (D,EL) I 0000 S.I NJMM-TE I 0000 S.I TWF (TEL) I 0000 S.I µpd0gs-e (DS) I I RAHM-0 I S.I NJM0F-TE I S.I MFP-0 Q S.FET SK (TEL) Q S.TRANSISTOR S-O (TER) Q S.FET PMFJ0 Q S.FET PMFJ0 Q S.FET SK (TEL) Q S.FET PMFJ0 Q S.FET PMFJ0 Q S.TRANSISTOR S-O (TER) Q 0000 S.TRANSISTOR S-L (TER) Q S.FET PMFJ0 Q S.TRANSISTOR S-O (TER) Q S.TRANSISTOR S-O (TER) Q S.TRANSISTOR S-O (TER) Q 0000 S.TRANSISTOR S-L (TER) Q 0000 S.TRANSISTOR S-L (TER) Q S.FET PMFJ0 Q S.TRANSISTOR S-O (TER) Q S.TRANSISTOR DTAEUA T0 Q S.TRANSISTOR DTEUA T0 Q 0000 S.TRANSISTOR S0-O (TER) Q 0000 S.TRANSISTOR S0-O (TER) Q 0000 S.TRANSISTOR S--T Q S.TRANSISTOR DTEUA T0 Q S.TRANSISTOR S--T Q S.TRANSISTOR DTTU T0 Q S.TRANSISTOR DTEUA T0 Q S.TRANSISTOR SA T0 Q Q S.TRANSISTOR DTEUA T0 [MAIN UNIT] REF D DIODE XA0 D S.DIODE SV0 (TPH) D S.DIODE SV0 (TPH) D S.DIODE HSWSTR D 0000 S.ZENER MA0-L (TX) D S.DIODE MA (TX) D S.DIODE HSWSTR D 0000 S.ZENER MA0-L (TX) D S.VARIAP HVTRF D S.VARIAP HVTRF D S.VARIAP SV (TPH) D S.VARIAP SV (TPH) D S.VARIAP SV (TPH) D S.VARIAP SV (TPH) D 0000 S.DIODE SV0 (TPL) D S.DIODE MA (TX) D S.DIODE MA (TX) D S.DIODE SS TE- D DIODE XA0 D S.DIODE HSMASR-TR D S.DIODE HSMASR-TR D 0000 S.ZENER MA0-M (TX) D 0000 S.DIODE MAS-(TX) FI MONOLITH FL- IMD:-00 (.0 MHz) FI ERAMI ALFYM0F=K FI MONOLITH FL- IMD:-00 (. MHz) FI MONOLITH FL- (.00 MHz) FI ERAMI ALFYM0F=K X S.DISRIMINATOR D0KAY-R0 X S.DISRIMINATOR D0KAY-R0 X 0000 S.XTAL R- (. MHz) X S.XTAL R-A (.00 MHz) L OIL LA- L OIL LA- L OIL LA- L 0000 OIL LA- L S.OIL MLF0A RK-T L S.OIL MLF0A RK-T L 0000 OIL EHNA-00 L 0000 OIL EHNA-00 L 0000 OIL EHNA-00 L 0000 OIL EHNA-00 L 0000 OIL EHNA-00 L 0000 S.OIL D-=P L 0000 S.OIL D-=P L S.OIL NL T-00J L S.OIL NL 0T-0J L S.OIL LQWHNNJ0L L S.OIL NL 0T-RJ L S.OIL 0-RG (0.U) L 0000 OIL EENAS-000 L 0000 OIL EENAS-000 L 0000 OIL EENAS-000 L 0000 OIL EENAS-000 L 0000 S.OIL D-=P L 0000 S.OIL D-=P L S.OIL NL T-00J L S.OIL ELJN NK-F L S.OIL LQWHNNJ0L L S.OIL NL 0T-RJ L S.OIL 0-RG (.U) L S.OIL AL0L-RK-T L S.OIL NL T-RJ- L 0000 S.OIL L- L S.OIL NL T-RJ- L S.OIL MLG0 R0J-T L S.OIL MLG0 R0J-T L S.OIL ELJRE NG-F L S.OIL MLG0 R0J-T L S.OIL NL 0T-R0J L S.OIL NL 0T-R0J L S.OIL ELJRE NG-F L S.OIL NL T-RJ- L 0000 S.OIL L- L S.OIL NL T-RJ- L S.OIL MLG0 R0J-T S.=Surface mount -