HF/VHF/UHF ALL MODE TRANSCEVER

Transcript

1 HF/VHF/UHF ALL MODE TRANSCEVER S-XZ-C June. 00

2 INTRODUCTION CAUTION This service manual describes the latest service information for the IC-0MKIIG HF/VHF/UHF ALL MODE TRANSCEVER at the time of publication. NEVER connect the transceiver to an AC outlet or to a DC power supply that uses more than. V. This will ruin the transceiver. MODEL VERSION USA EUR FRA ESP OTH ITA ITR CHN USA- EUR- FRA- ESP- OTH- ITA- ITR- CHN- IC-0MKIIG DO NOT expose the transceiver to rain, snow or any liquids. UT-0 DO NOT reverse the polarities of the power supply when connecting the transceiver. Available as an option DO NOT apply an RF signal of more than 0 dbm (00 mw) to the antenna connector. This could damage the transceiver s front-end. Built-in To upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation. ING PARTS REPAIR NOTES Be sure to include the following four points when ordering replacement parts:. Make sure the problem is internal before disassembling the transceiver.. DO NOT open the transceiver until the transceiver is disconnected from its power source.. DO NOT force any of the variable components. Turn them slowly and smoothly.. DO NOT short any circuits or electronic parts. An insulated tuning tool MUST be used for all adjustments.. DO NOT keep power ON for a long time when the transceiver is defective.. DO NOT transmit power into a Standard Signal Generator or a Sweep Generator.. ALWAYS connect a 0 db to 0 db attenuator between the transceiver and a Deviation Meter or Spectrum Analyzer when using such test equipment.. READ the instructions of test equipment throughly before connecting a test equipment to the transceiver.. 0-digit Icom parts numbers. Component name. Equipment model name and unit name. Quantity required < EXLE> 000 TAFNG IC-0MKIIG MAIN UNIT 0000 Screw screw IC-0MKIIG Top cover pieces 0 pieces Addresses are provided on the inside back cover for your convenience. Icom, Icom Inc. and logo are registered trademarks of Icom Incorporated (Japan) in the United States, the United Kingdom, Germany, France, Spain, Russia and/or other countries.

3 CONTENTS SECTION SPECIFICATIONS SECTION INSIDE VIEWS CIRCUIT DESCRIPITON SECTION SECTION - RECEIVER CIRCUITS TRANSMITTER CIRCUITS PLL CIRCUITS LOGIC CIRCUITS ADJUSTMENT PROCEDURES - PREPARATION BEFORE SERVICING PLL ADJUSTMENTS TRANSMITTER ADJUSTMENTS RECEIVER ADJUSTMENTS SET MODE ADJUSTMENT SECTION PARTS LIST SECTION MECHANICAL PARTS AND DISASSEMBLY SECTION SEMI-CONDUCTOR INFORMATION SECTION BOARD LAYOUTS SECTION BLOCK DIAGRAM SECTION 0 VOLTAGE DIAGRAM DISPALY AND VR BOARD S MAIN UNIT AND HPF BOARD S PLL UNIT FILTER BOARD PA UNIT AND DRIVER BOARD

4 SECTION SPECIFICATIONS GENERAL Frequency coverage Receive RECEIVER : Transmit Receive system : SSB/CW/AM/WFM Double superheterodyne FM Triple superheterodyne MHz* MHz* MHz* MHz* MHz* MHz MHz MHz MHz MHz MHz MHz* MHz* MHz* Intermediate frequencies MODE SSB/AM-N/FM AM/FM-N CW RTTY WFM : USB, LSB, CW, RTTY (FSK), AM, FM, WFM (WFM is for receiver only) Number of memory ch. : 0 ( regular, scan edges, call) Antenna connector : SO- (for HF/0 MHz and /0 MHz)/0 Ω Receive sensitivity Current consumption Transmit Receive : Less than ± ppm from min. to 0 min. after power ON. After that, rate of stability less than ± ppm/hr. at + C (+ F). Temperature fluctuations 0 C to +0 C (+ F to + F) less than ± ppm. 0 A. A.0 A : (pre-amp ON) Less than. µv Less than 0. µv Selectivity* SSB, CW, RTTY : AM/FM-N Dimensions : (W) (H) 00(D) mm (projections not included) (W) (H) (D) inch FM :. kg ( lb oz) CI-V connector : -conductor. (d) mm (/")/ Ω ACC connector : -pin MHz band 0 MHz band Modulation system SSB AM FM : Spurious emissions Below. MHz Above. MHz : Carrier suppression : More than 0 db 00 W 0 W 0 W 0 W 0 W W Audio output power (at. V DC) : More than.0 W at 0% distortion with an Ω load RIT variable range : ±. khz PHONES connector : -conductor. (d) mm (/")/ Ω EXT SP connector : -conductor. (d) mm (/")/ Ω Balanced modulation Low level modulation Variable reactance modulation Less than 0 db (typical) Less than 0 db Unwanted sideband supp. : More than 0 db KEY connector : -pin modular jack (00 Ω) : -conductor. (d) mm (/") RTTY connector : -conductor. (d) mm (/") Microphone connector More than. khz/ db Less than. khz/ 0 db More than.0 khz/ db Less than 0 khz/ 0 db More than khz/ db Less than 0 khz/ 0 db *Without an optional filter unit and with mid bandwidth selected. : SSB/CW/RTTY/FM AM SSB/CW/RTTY/FM AM SSB/CW/RTTY/FM AM FM 0. µv 0. µv 0. µv 0. µv Spurious and image rejection ratio: HF band 0dB 0 MHz band db (except IF through) /0 MHz band db TRANSMITTER Output power. 0 MHz band (pre-amp ON) AM µv µv µv µv µv µv Squelch Sensitivity SSB FM Usable temperature range : 0 C to +0 C (+ F to +0 F) Weight rd IF khz* khz* Note: SSB, CW and AM modes are measured at 0 db S/N; FM mode at db SINAD. *Except. MHz, MHz. : max. power standby max. audio : FREQUENCY SSB/CW/RTTY 0.. MHz. MHz* 0. µv. MHz 0. µv 0. µv 0 MHz band MHz band 0. µv 0 MHz band 0. µv Power supply requirement :. V DC ±% (negative ground) Frequency stability nd IF.0 MHz.000 MHz.00 MHz.00 MHz MHz *FM or FM-N mode only *Depending on version. Mode : st IF.0 MHz.000 MHz.00 MHz.00 MHz MHz All stated specifications are subject to change without notice or obligation. -

5 SECTION INSIDE VIEWS MAIN AND FILTER BOARDS FILTER board D/A converter (IC0: MGP) RX preamplifier (IC: PCG) MAIN CPU clock (X: CR-) MAIN CPU * (IC 00: HDYAF) HPF board st mixer (D: HSBWSTR) MAIN board st IF filter (FI: FI-) rd IF filter for FM * (FI: SFPCE-TC0) nd mixer * (D: HSBWSTR) MIC amplifier (IC: PC0GS-0-E) nd IF filter (FI: FL-) AF selector switch * (IC: BU0BCFV-E) Space for optional filters FL-00, FL-0, FL-0 FL-, FL- Discriminator (X: CDBCX) Balanced modulator * (IC0: NJMV) FM IF IC * (IC: TAFN) Tx FM PLL IC * (IC0: LCM-TLM) PA AND PLL UNITS Power amplifers (Q, Q, Q: SRFJ0) PA unit DRIVER board DDS IC (IC0: SC-) Drive amplifers (Q, Q: MRF0TI) Predrive amplifier (Q0: SK) BFO DDS IC (IC0: SC-) Predrive amplifer (Q: MXR) AF power amplifer (IC: LAA) PLL IC * (IC: LMX0TMX) PLL unit AF volume controller (IC0: MFP) VCO * (Q: SK0) VCO * (Q0: SK0) Reference oscillator (X: CR-A MHz) VCO * (Q: SK0) *Located under side of the point -

6 SECTION CIRCUIT Used RF high-pass filter (HPF board) - RECEIVER CIRCUITS Frequency Control Entrance Frequency Control Entrance (MHz) signal signal coil coil (MHz) -- HF/0 MHz RF CIRCUIT (FILTER, MAIN AND HPF BOARDS) HF/0 MHz RF filters pass only the desired band signals and suppress any undesired band signals. The HF/0 MHz RF circuit has low-pass filters and high-pass filters for specified band use. HF/0 MHz RF signals from the [ANT] connector, pass through one of low-pass filters as below, the transmit/ receive switching relay (FILTER board; RL) and low-pass filter (FILTER board; L, L, C C), and are then applied to the MAIN board via J (FILTER board). L RL MHz L RL L RL 0 MHz L RL MHz L RL 0 0 MHz L RL MHz L RL D MHz MHz LH D MHz LH D MHz LH D LH D 0 MHz LH D 0 0 MHz THH D 0 0 MHz BH D The VHF and UHF RF circuits pass and amplify only the desired band signals and suppresses any undesired band signals. The both RF circuits have a preamplifier and bandpass filters respectively. Frequency Control Entrance Frequency Control Entrance (MHz) signal signal coil coil (MHz) MHz THH -- VHF AND UHF RF CIRCUITS (PA UNIT) Used RF low-pass filter (FILTER board) 0.0 MHz 0.0 MHz VHF RF CIRCUIT The VHF RF signals from the [ANT] connector pass through the low-pass filter (L L, C C) and antenna switching circuit (D D). The signals are applied to the bandpass filter (D0, D0, D0), and are then amplified at the preamplifier circuit (Q0). The amplified signals are then applied to the another bandpass filter (D0, D0, D0). The signals from the FILTER board are applied to or bypass the 0 db attenuator (R, R, R). The signals pass through the high-pass filter (L, L, C C) to suppress strong signals below. MHz and are then applied to the HPF board via the SAF terminal. UHF RF CIRCUIT The UHF RF signals from the [ANT] connector pass through the high-pass filter (L, L, C C), lowpass filter (L L, C C) and antenna switching circuit (D, D, D). The signals are amplified at the preamplifier circuit (Q) between the bandpass filters (D, D and D, D). () 0.0 MHz and 0 0 MHz The signals pass through a low-pass filter (L0, L0, C0 C0), and then applied to the preamplifier circuit on the MAIN board. The filtered signals are applied to the MAIN board via J (PA unit) and are then applied to the preamplifier circuit. () 0 MHz The signals from the low-pass filter (L0, L0, C0 C0) are applied to one of high-pass filters as at right above and are then applied to the preamplifier circuit on the MAIN board. D0, D0, D0, D0, D0, D0, D, D, D and D are varactor diodes that tune the ceinter frequency of an RF passband for wide bandwidth receiving and good image response rejection. On the VHF band, receiving signals are above MHz, the switching diodes (D0, D0) are turned off by the control signal MBL from PLL unit, then the varactor diodes (D0, D0) are disconnected. () 0 0 MHz The signals pass through the low-pass filter (L, L, C C) and the high-pass filter (L, L, C C) via D and are then applied to the preamplifier circuit on the MAIN board. RECEIVER CONSTRUCTION FI FILTER BOARD [ANT] MHz HPF BOARD HPF PA UNIT [ANT] 0 0 MHz Pre-amp. IC amp. st LO:.0 MHz 0.0 MHz st mixer D SSB, CW filter nd LO: 0.0 MHz FI FI Crystal filter Crystal filter.0 MHz nd mixer D FI to AM demod. circuit (D) NB gate AM, FM-N filter to BFO circuit (IC0) NB circuit Optional filter-.0mhz MAIN BOARD to WFM detector circuit (IC) BPF - Optional filter- to FM demod. circuit (IC)

7 -- PRELIFIER CIRCUIT (MAIN BOARD) While in WFM mode, the IF signals pass through the lowpass filter (L0, C0 C0), IF amplifiers (Q0, Q), ceramic filter (FI). The signals are then applied to the WFM demodulator circuit (IC). The preamplifier circuit in the IC-0MKIIG has approx. db gain over a wide-band frequency range. When the preamplifier is turned ON, the signals from the RF circuit are applied to the preamplifier (IC) via D. Amplified or bypassed signals are applied to the st mixer circuit (D). -- NOISE BLANKER CIRCUIT (MAIN BOARD) The noise blanker circuit detects pulse type noise, and turns OFF the signal line when noise appears. -- ST MIXER CIRCUIT (MAIN BOARD) A portion of the signals from FI are amplified at the noise amplifiers (Q, Q, amplifier section of IC), then detected at the noise detector (D) to convert the noise components to DC voltages. The st mixer circuit mixes the receive signals with the st LO signal to convert the receive signal frequencies to a or 0. MHz st IF signal. The signals from the preamplifier circuit, or signals which bypass the preamplifier, are passed through a low-pass filter and then applied to the st mixer (D). The st LO signals (.0.0 MHz) enter the MAIN board from the PLL unit via J. The LO signal is amplified at IC, filtered by a lowpass filter, and then, applied to the st mixer. The converted voltages are then applied to the noise blanker switch (Q, Q). At the moment the detected voltage exceeds Q s threshold level, Q outputs a blanking signal to close the noise blanker gate (D, D) by applying reverse-biased voltage. st IF frequency Mode SSB/AM-N/FM AM/FM-N CW RTTY WFM st IF.0 MHz.000 MHz.00 MHz.00 MHz MHz The detected voltage from D is also applied to the noise blanker AGC circuit (Q, Q) and is then fed back to the noise amplifier (IC) as a bias voltage. The noise AGC circuit prevents closure of the noise blanker gate for long periods by non-pulse-type noise. The time constant of the noise blanker AGC circuit is determined by R. The nd IF signals from the noise blanker gate are then applied to the nd IF circuit. -- ST IF CIRCUIT (MAIN BOARD) The st IF circuit filters and amplifies the st IF signals. The st IF signals are applied to a Crystal Filter (FI) to suppress out-of-band signals. -- ND IF CIRCUIT The MHz st IF signals (except WFM) pass through the crystal filter (FI), however, the 0. MHz st IF signal (WFM) passes through a bandpass filter (L0 L0, C0 C0). Then the filtered signals are applied to the IF amplifier (IC). The nd IF circuit amplifies and filters the nd IF signals. The AGC voltage is supplied to the transmit/receive switching circuit (D, D) and D/D function as PIN attenuators for AGC operation. The filtered or bypassed signals are applied to the buffer amplifier (Q), IF amplifiers (Q, Q) and buffer amplifier (Q) to obtain a detectable level at the demodulator circuit The amplified signals are then applied to the nd mixer circuit (D) via the bandpass filter (L L, C C). Used nd IF filter Mode The nd IF signals from the noise blanker gate (D, D) are amplified at the IF amplifier (IC) via the Tx/Rx switch (D) and applied to a nd IF filter as shown below. -- ND MIXER CIRCUIT (MAIN BOARD) The nd mixer circuit mixes the st IF signals and nd LO signal (0.00 MHz) to convert the st IF to a nd IF. The st IF signals from the band pass filter (L L, C C) are converted to MHz or 0. MHz nd IF signals at the nd mixer (D). The nd IF signals are applied to the bandpass filter (FI) to suppress undesired signals, such as the nd LO signal, and are then applied to the noise blanker gate (D, D). nd IF frequency Mode nd IF SSB/AM-N/FM.0 MHz AM/FM-N.000 MHz CW.00 MHz RTTY.00 MHz WFM MHz Used filter Control signal SSB, CW, RTTY AM nar. FL- (FI) F AM, FM nar. FL- (FI) F0 FM Bypassed FTH SSB nar. Optional FL- OP or OP CW nar., RTTY nar. Optional FL-00, FL0, FL-, FL- OP or OP SSB wide, CW wide, RTTY wide Optional FL-0 OP or OP The amplified signals from the buffer amplifier (Q) are shared between the SSB/CW/RTTY detector (IC), AM detector (D) and AGC detector (D). Output signals from the buffer amplifier (Q) are applied to the FM IF IC (IC). -

8 -- IF SHIFT CIRCUIT (MAIN BOARD) -- S-METER CIRCUIT (MAIN BOARD) The IF shift circuit shifts the center frequency of IF signals to electronically shift the center frequency. The S-meter circuit indicates the relative received signal strength while receiving by utilizing the AGC voltage which changes depending on the received signal strength. The IF shift circuit shifts the st LO and BFO within ±. khz in SSB/CW/RTTY modes or ±0 Hz in CW-N/RTTY-N modes. As a result, the nd IF (also st IF) is shifted from the center frequency of the nd IF filter (FI, FI or optional IF filters). This means nd IF signals do not pass through the center of the nd IF filter. Therefore, the higher or lower frequency components of the IF are cut out. Since the BFO frequency is also shifted the same value as the st IF, frequency is corrected at the detector. The output voltage of the AGC amplifier (ICb, pin ) is applied to the main CPU (IC00, pin ) as an S-meter signal via the analog switch (IC0, pins, ) as the SML signal. The FM S-meter signal from the FM IF IC (IC, pin ) is also applied to the analog switch (IC0, pin ) via the meter amplifier (Q). The S-meter signal from the main CPU (IC00) is applied to the sub CPU and is then displayed on the S-meter readout. In the IC-0MKIIG, the st LO frequency is shifted to change the nd IF because a fixed nd LO frequency (0 MHz) is used. The st IF filter (FI) and crystal filter (FI) have khz pass-band widths, and do not affect IF shift operation. -- SQUELCH CIRCUIT (MAIN BOARD) The squelch circuit mutes audio output when the S-meter signal is lower than the [RF/SQL] control setting level. --0 AGC CIRCUIT (MAIN BOARD) The S-meter signal is applied to the main CPU (IC00, pin ) in SSB/CW/RTTY modes and is compared with the threshold level set by the [RF/SQL] control. The [RF/SQL] setting is picked up at the sub CPU (DISPLAY board; IC, pin ). The main CPU compares the S-meter signal and [RF/SQL] setting, and controls the AF selector switch (IC) to cut out AF signals via ICa. The AGC (Automatic Gain Control) circuit reduces IF amplifier gain to keep the audio output at a constant level. The receiver gain is determined by the voltage on the AGC line (Q collector). The nd IF signal from the buffer amplifier (Q) is detected at the AGC detector (D) and applied to the AGC amplifier (ICb). ICb sets the receiver gain with the [RF/SQL] control via the RFGV signal line. When receiving strong signals, the detected voltage increases and the AGC voltage decreases via the DC amplifier (Q). The AGC voltage is used for the bias voltage of the transmit/receive switching PIN diodes (D, D, D, D) to attenuate the received signals. In FM mode, a portion of the AF signals from the FM IF IC (IC, pin ) are applied to the active filter section (pin ) where noise components above 0 khz are amplified. The signals are rectified at the noise detector section and then output from pin. The noise squelch signal from pin is applied to the main CPU (IC00, pin ) via the analog switch (IC0, pins, ) as the NSQL signal. The CPU then controls the AF selector switch (IC). When AGC slow is selected, C and R are connected in parallel to obtain appropriate AGC characteristics. -- DEMODULATOR CIRCUITS (MAIN BOARD) () SSB/CW/RTTY modes The nd IF signals from the buffer amplifier (Q) are mixed with the BFO signal from the PLL unit at the product detector (IC, pin ). The detected AF signals from IC (pin ) are applied to the AF selector switch (IC, pin ). AGC CIRCUIT R D RFGV (RF gain control) R ICb AGC FAST Amp. C C Q Q C AGC amp. AGC line () FM/FM NARROW modes The nd IF signals from the buffer amplifier (Q) are applied to the FM IF IC (IC, pin ) where the IF signals are converted into khz IF signals. The signals pass through FI and are applied to the quadrature detector section. X is used for quadrature detector. The detected AF signals from pin are then applied to the AF selector switch (IC, pin ) via the de-emphasis circuit (ICa). R R D R C AGC det. Q C nd IF signal R R () AM mode The nd IF signals from the buffer amplifier (Q) are detected at the AM detector (D). The detected AF signal is applied to the AF selector switch (IC, pin ). Q, Q SML S-meter signal () WFM mode The nd IF signals from the IF amplifier (Q) are applied to the WFM demodulator circuit (IC, pins, ) where the IF signals are converted into AF signals. The detected AF signals from pin are then applied to the AF selector switch (IC, pin ). -

9 -- AF SELECTOR SWITCH (MAIN BOARD) Audio signals from the front or rear panel [MIC] connector enter the microphone amplifier IC (IC, pin ) and are then amplified at the microphone amplifier or speech compressor section. Compression level is adjusted with the [COMP GAIN] control (R). The AF signals from one of the detector circuits are applied to the AF selector switch (IC). IC consists of dual channel analog switches which are selected with a mode signal and the squelch control signal. The amplified or compressed signals are applied to the VCA section of IC. The microphone gain setting from the D/A converter (IC0, pin ) is applied to the VCA control terminal (IC, pin 0). The resulting signals from pin are then applied to the buffer amplifier (Q) via the analog switch (IC). External modulation input from the [ACC] socket (pin ) is also applied to Q. AF selector switch IC SSB/CW/ RTTY AM FM WFM X0 X X X AFI signal to PLL unit X While in SSB mode, the amplified signals from the buffer amplifier (Q) are passed through the AF selector switch (IC) and are then applied to the balanced modulator (IC0). INH, 0 AFS, AFS SQL While in AM/FM mode, the amplified signals from the buffer amplifier (Q) are applied to the limiter amplifier (ICa) and splatter filter (ICb). The signals are then applied to the AF selector switch (IC) in AM mode or to the varactor diode (D0) in FM mode. -- AF LIFIER CIRCUIT (PLL UNIT) The AF amplifier amplifies the demodulated signal to a suitable driving level for the speaker. The AF signals from the AF selector switch (MAIN board; IC) are applied to the PLL unit via the AFI signal line. The CW side tone/beep tone and optional synthesized voice are also applied to the PLL unit via the AFBP signal line. -- VOX CIRCUIT (MAIN BOARD) The VOX (Voice-Operated-Transmission) circuit sets transmitting conditions according to voice input. The AF signals from the MAIN board are applied to the VCA (Voltage Controlled Amplifier) circuit (IC0). The AF gain setting from the main CPU is converted to DC voltage at the D/A converter (MAIN board IC0) and applied to the VCA control terminal (IC0, pin ) via the AFGC signal line. The output AF signal from IC0 (pin ) is power-amplified at IC to drive the speaker. When the VOX function is activated, the microphone signals from IC (pin ) are applied to the VOX comparator section in the main CPU (IC00, pin ) via the VOXL line. - TRANSMITTER CIRCUITS Then the main CPU compares these and controls the transmitter circuit. A portion of the power amplified AF signals from the AF power amplifier (PLL unit; IC) are amplified at the buffer amplifier (IC, pins, ) and applied to the anti-vox comparator section in the main CPU (IC00, pin ) via the AVXL line. -- MICROPHONE LIFIER CIRCUIT (MAIN BOARD) The microphone amplifier circuit amplifies microphone input signals and outputs the amplified signals to the balanced modulator or FM modulation circuit. -- BALANCED MODULATOR (MAIN BOARD) The balanced modulator converts the AF signals from the microphone amplifier to a MHz IF signal with a BFO (Beat Frequency Oscillator) signal. Microphone amplifier [COMP GAIN] (R) IC MIC signal, COMS from CPU Microphone signals from the AF selector switch (IC) are applied to the balanced modulator (IC0, pin ). The BFO signal from the PLL unit is applied to IC0 (pin 0) as a carrier signal. MIGV from D/A convertor (IC) 0 IC0 is a double balanced mixer IC and outputs a double side band (DSB) signal with 0 db of carrier suppression. R0 adjusts the balanced level of IC0 for maximum carrier suppression. The resulting signal passes through a MHz IF filter (FI in SSB/CW/RTTY modes) to suppress unwanted side-band signals. Amp. COMP VCA Buffer Buffer VOXL to CPU AVOXL to CPU AMOD to IC Buffer In AM mode, R0 is connected to upset the balance of IC0 via Q0 for leaking the BFO signal as a carrier signal. The CW keying/rtty TX signal is applied to IC0 pin. Buffer AFO signal -

10 -- FM MODULATION CIRCUIT (MAIN BOARD) The microphone signals from Q are applied to the limiter amplifier (ICa) and the splatter filter (ICb). The 0 Hz European tone signal from the main CPU (IC00 pin 0) is also applied to ICa pin for European repeaters. The sub-audible tone signal (.0. Hz) from the main CPU (IC00 pin ) is also applied to ICb pin for repeater use. The MHz RF signals from the st mixer (D) via the low-pass filter (L, C ) bypass the filters and pass through the bandpass filter (L L, L, L, C C, C C) in the MAIN board. The signals are amplified at the RF amplifier (IC) and YGR amplifer (IC) and are then applied to the PA unit. The 0 MHz RF signals from the st mixer (D) via the low-pass filter (L, C ) are amplified at RF amplifier (IC) and passed through the bandpass filter (FI FI) in the MAIN board. The filtered signal is amplified at the YGR amplifer (IC) and is applied to the PA unit. The resulting signals are applied to the VCO circuit (Q0, D0) via R00 to change the reactance of the varactor diode (D0) for FM modulation. The modulated signal is amplified at the buffer amplifier (Q0) and bypasses the MHz IF filter. The signals from IC enter the PA unit and is amplified at the drive amplifiers (Q0, Q) in sequence. The amplified signals are applied to the band switch (RL). -- TRANSMITTER IF CIRCUIT (MAIN BOARD) The MHz IF signal from the modulation circuit passes through the MHz IF filter (FI in SSB/CW/RTTY modes; FI in AM/FM-N modes; through in FM mode). The signal is amplified at IC, and then passes through the total gain adjustment volume (R), and the crystal filter (FI). The signal is then applied to the nd mixer (D). The HF/0 MHz RF signals from the band switch (RL) are amplified at the drive (DRIVER board; Q) and power (Q, Q) amplifiers to obtain a stable 00 W of RF output power. The power-amplified signals are then applied to the [ANT] connector via one of the low-pass filters in the FILTER board. The signal is mixed with the nd LO signal (0 MHz) and converted to a MHz IF signal at the nd mixer (D). The MHz IF signal passes through a bandpass filter, IF amplifier (IC) and MHz IF filter (FI), and is then converted to the displayed frequency at the st mixer (D) with the st LO signal. The mixers (D, D) and IF amplifiers (IC, IC) are used commonly for both receiving and transmitting. For the /0 MHz RF signals from the band switch (RL), 0 W for MHz band or 0 W for 0 MHz band of RF output power is obtained at the drive (DRIVER board; Q) and power amplifier (Q). The power-amplified signals are applied to the [ANT] connector via the antenna switching circuit and low-pass ( MHz band) or high pass (0 MHz band) filters. The ALC voltage is supplied to the transmit/receive switching circuit (D/D and D/D). D/D and D/D function as PIN attenuators for ALC operation. -- ALC CIRCUIT (MAIN BOARD) The ALC (Automatic Level Control) circuit reduces the gain of IF amplifiers in order for the transceiver to output a constant RF power set by the RF power setting even when the supplied voltage shifts, etc. -- RF CIRCUIT (PA UNIT, MAIN AND HPF BOARD) The RF circuit amplifies the displayed frequency signal to obtain 00 W of RF output power for HF/0 MHz bands and 0 W for the MHz band, 0 W for the 0 MHz band. The HF/0 MHz RF power signal level is detected at the power detector (FILTER board; D), buffer-amplified at ICb and applied to the MAIN board as the HFOR voltage. The HF/0 MHz RF signals from the st mixer (D) via the low-pass filter enter the HPF board and then pass through one of high-pass filters (Refer to - for used RF high-pass filter). The 0 MHz RF signals pass through a low-pass filter additionally. The filtered signals return to the MAIN board, are amplified at the YGR amplifier (IC), and are then applied to the PA unit. The MHz and 0 MHz RF power signals are detected at the power detectors (PA unit; D, D) and (PA unit; D, D) respectively. The detected signals are applied to the MAIN board as the VFOR or UFOR voltages. TRANSMITTER CONSTRUCTION [ANT] HF+0 MHz HPF BOARD BFO st LO 0.0 MHz FI HPF Crystal filter except FM IC HPF Amp. SSB IC0 IC MIC Crystal filter Amp. AM FM, AM FM tone.0 MHz IDC FM Q0 D FI, FI, or optional filter BPF FM only D BPF 0 MHz BPF MAIN BOARD Q Q Q Amp. Amp. 0 MHz - [ANT] /0 MHz Amp. Q0 Q Q Q Amp. MHz BPF FILTER BOARD PA UNIT Amp. MHz HPF 0 MHz

11 () SWR meter The FORL and L voltages are applied to the main CPU (IC00, pins and ) via the analog switch (IC0, pins, and, ) respectively. The main CPU compares the ratio of FORV to V voltage and indicates the SWR for the [ANT] connector. The FOR, VFOR and UFOR voltages are combined to the FORL voltage and then applied to IC0b (pin ). The POCV voltage from the D/A converter (IC0, pin ), determined by the RF power setting, is applied to IC0b (pin ) as the reference voltage. When the FORL voltage exceeds the POCV voltage, ALC bias voltage from IC0a (pin ) controls the PIN diodes (D, D, D, D) using Q0. This adjusts the output power to the level determined by the RF power setting until the FORL and POCV voltages are equalized. - PLL CIRCUITS -- GENERAL The PLL unit generates a st LO frequency ( MHz), a nd LO frequency (0 MHz), a BFO frequency (.0 MHz), an FM rd LO frequency (./.0 MHz) and a TX FM PLL reference frequency (.0/.000 MHz). In AM mode, IC0a operates as an averaging ALC amplifier with Q0 and C0. Q0 turns ON and the POCV voltage is shifted for 0 W AM output power (maximum, 0 W for MHz band, W for 0 MHz band) through R00. The ALC bias voltage from IC0a is also applied to the main CPU (IC00 pin ) as the ALCL voltage for ALC meter indication. The st LO PLL adopts a mixer-less dual loop PLL system and has VCO circuits. The BFO uses a DDS and the nd LO uses a fixed frequency double that of the crystal oscillator. An external ALC input (minus voltage) from the [ACC] socket (pin ) is shifted to plus voltage at D and is applied to the buffer amplifier (Q). External ALC operation is identical to that of the internal ALC. -- ST LO PLL CIRCUIT The st LO PLL contains a main loop and reference loop forming a dual loop system. The reference loop generates a 0.0 to 0. MHz frequency using a DDS circuit, and the main loop generates a.0 to.0 MHz frequency using the reference loop frequency. -- APC CIRCUIT (MAIN BOARD) The APC (Automatic Power Control) circuit protects the power amplifiers on the PA unit from high SWR and excessive current for the HF/0 MHz band. While operating on 0 MHz and above, the output is doubled at D for oscillating a wide frequency range. The reflected wave signal appears and increases on the antenna connector when the antenna is mismatched. The HF/0 MHz reflected signal level is detected at D0 (FILTER board), and is amplified at the APC amplifier (IC0c) and applied to the ALC circuit as the reference voltage. () ERENCE LOOP PLL The oscillated signal at the reference VCO (Q, D) is amplified at the amplifiers (Q, Q) and is then applied to the DDS IC (IC0, pin ). The signal is then divided and detected on phase with the DDS generated frequency. For the current APC, the driving current at the power amplifier is detected in the voltages ( ICH and ICL ) which appear at both terminals of a 0.0 Ω resistor (R0) on the PA unit. The detected voltages are applied to the differential amplifier (IC0d, pins, ). When the current of the power amplifier exceeds A, IC0d controls the ALC line via IC0a to prevent excessive current flow. The detected signals output from IC0 (pin ) is converted into a DC voltage (lock voltage) at the loop filter (R, R, C) and then fed back to the varactor diode (D) in the VCO circuit. () MAIN LOOP PLL The oscillated signal at one of the main loop VCOs (Q0, Q, Q) is amplified at the buffer amplifiers (Q0) and is then applied to the PLL IC (IC, pin ). The signal is then divided and detected on phase with the reference loop output frequency. -- RF, ALC, SWR METER CIRCUITS (MAIN BOARD) While transmitting, RF, ALC or SWR meter readings are available and can be selected with the [MET] switch. () Power meter The FOR, VFOR and UFOR voltages are combined to the FORL voltage, and it is then applied to the main CPU (IC00, pin ) via the analog switch (IC0, pins, ) for indicating the output power. The detected signal output from the PLL IC (IC, pin ) is converted into a DC voltage (lock voltage) at the active loop filter and then fed back to one of the varactor diodes (D0, D, D) in the VCO circuits. While operating on 0 MHz and above, the VCO output is doubled at the doubler circuit (D) and amplified at the ampolifier (IC). () ALC meter The ALC bias voltage from IC0a pin is applied to the main CPU (IC00, pin ) via the ALCV signal line for indicating the ALC level. The oscillated signal passes through a low-pass or bandpass filter and is then applied to the MAIN board as a st LO signal. -

12 -- ND LO AND ERENCE OSCILLATOR CIRCUITS -- BFO CIRCUIT The DDS IC (IC0) generates a 0-bit digital signal. The signal is converted into an analog wave signal at the D/A converter (R R0). The analog wave is passed through the high-pass filter and low-pass filter. The MHz BFO signal is then applied to the MAIN board via the BFO signal line. The reference oscillator (X, Q) generates a 0.0 MHz frequency used for the st LO and BFO circuits as a system clock and for the nd LO signal. The oscillated signal is amplified at the buffer amplifier (Q), and is doubled at Q and the 0 MHz frequency is picked up at the bandpass filter (L, L). The 0 MHz signal is applied to the MAIN board as a nd LO signal. While transmitting in RTTY mode, the RTTY keying signal is applied to IC0 pin to shift the generated frequency and to obtain frequencies for FSK operation. While receiving in FM or FM narrow mode, the BFO circuit generates a. MHz frequency as the rd LO signal. While transmitting in FM or FM narrow mode, the BFO circuit generates a.0 MHz or.000 MHz frequency as the TX FM PLL reference frequency, respectively. FREQUENCY CONSTRUCTION [ANT] MHz 0 st mixer 0 MHz D.0 MHz (WFM: 0. MHz) st IF to WFM detector (IC) Product detector IC nd mixer D AF signals nd IF BPF.0.0 MHz (st LO) 0.0 MHz (nd LO).0 MHz (BFO) PLL UNIT.0.0 MHz.0.0 MHz Q0 Q Q Main loop PLL N divider IC BPF BPF Phase detector Q to TX FM PLL IC (IC0).0 MHz (FM).000 MHz (FM nar.) MAIN BOARD MHz Q Ref. loop PLL IC0 Phase DDS detector D/A DDS IC0 Ref. Osc. 0.0 MHz X Q - to AF selector switch to FM IF IC (IC). MHz (FM).0 MHz (FM nar.) [ANT]

13 -- SUB CPU PORT ALLOCATIONS (DISPLAY board; IC) BFO frequency Mode RX BFO/rd LO frequency [MHz] TX BFO/FM PLL ref. frequency [MHz] USB LSB ( CW pitch frequency) PTTS CW.00 ( CW pitch frequency) Outputs a PTT signal. Low : While transmitting..00 (+CW pitch frequency).00 (+CW pitch freqency), 0 CW-R BUS, BUS Outputs displaly backlight control signal. RTTY.00 ( Hz tone).00 ( Hz tone).00 (MARK) 0 PHNK AM No output.000 Input port for the [PHONES] jack connection detection. High : When the headphone or external speaker is connected to the [PHONES] jack. FM. (rd LO).0 (PLL ref.) RSK Input port for the [RIT] switch. FM nar..0 (rd LO).000 (PLL ref.) WFM No output No output PTTL Input port for the [PTT] switch on the microphone. FUDL Input port for the microphone up/down signal. AFGL Input port for the [AF] control. SQLL Input port for the [RF/SQL] control. Pin number IF shift: Center, RTTY: Normal polarity - LOGIC CIRCUITS Port name SFTL Description Input port for the [SHIFT] control. -- BAND SELECTION DATA (MAIN BOARD AND PLL UNIT) To select the correct RF low-pass filter, high-pass filter and VCOs on the PLL unit, the CPU outputs the following band selection data from the I/O expander (MAIN board; IC, IC), the D/A converter (MAIN board; IC0) or DDS IC (PLL unit; IC0) depending on the display frequency. -- I/O EXPANDER PORT ALLOCATIONS (MAIN board; IC) Pin number The D/A convertor output from IC0 (pin ) is doubled at ICd to obtain the band voltage for external equipment. Port name Frequency [MHz] 0.0. L L.0 V.0. L L. V.0. L L. V L L.0. L L. V.0. L L. V 0.0. BW B 0V IC0 (PLL) VCO VCO MODS AMS Outputs AM mode select signal. High : When AM mode is selected. FMS Outputs FM and FM-N modes select signal. High : When FM and FM-N modes are selected. WFMS Outputs WFM mode select signal. High : When WFM mode is selected. L 0.0., VCO LOF VCO LOF AFS, AFS B L 0. V VCO LOF B VCO LOF - WFM FM AM SSB/CW/RTTY AFS High High Low Low AFS High High Low Low Outputs non-fm mode select signal. High : When SSB/CW/RTTY/AM modes are selected. MINH Outputs an audio mute signal for the analog switch (IC). High : While transmitting in CW/RTTY modes. LOF B MODE PORT UNFM LOF Output select signals for the Rx AF selector switch (IC). LOF. V BPF Outputs select signal for the Tx AF selector switch (IC). Hign : When AM and SSB modes are selected. Band selection data IC, IC0 IC (MAIN) (MAIN) HPF / band BPF voltage Description

14 -- MAIN CPU PORT ALLOCATIONS (MAIN unit; IC00) (MAIN unit; IC00) Continued Pin number Pin number Port name Description DASK Input port for the external paddle (DASH). Low : During key down DOTK Input port for the external paddle (DOT) or straight key. Low : During key down UNLK Input port for the PLL unlock signal from the DDS IC (PLL unit; IC0) and PLL IC (PLL unit; IC). Low : while PLL unlock TKEY Input port for transmit control signal from the optional AT-0/AH- antenna tuners. TCON Input port for the optional antenna tuner connection detection. High : When the optional antenna tuner is connected. Port name Description 0 ETON Outputs 0 Hz European tone signal. MSST Outputs a strobe signal for the optional UT-0 (Voice synthesizer unit). MDT Outputs serial data for the I/O expanders, optional AT-0/UT-0. MCK Outputs a clock signal for the I/O expanders, optional AT-0/ UT-0. BSTB Outputs a strobe signal for the I/O expander ICs (IC, IC). DSST Outputs a strobe signal for the I/O expander ICs (IC, IC). ASTB Outputs a strobe signal for the D/A converter IC (IC0). PBST Outputs a strobe signal for the BFO DDS IC (PLL unit; IC0). SQSS Outputs a squelch control signal for the external unit. CON CON0 Output mode control signals for the st LO DDS IC (PLL unit; IC0). PWK Input port for the [POWER] switch. Low : When the [POWER] switch is pushed. PDST Outputs a strobe signal for the st LO DDS IC (PLL unit; IC0). PMST POWS Outputs the switching relay (PA unit; RL) control signal. High : While power is ON. 0 Outputs a strobe signal for the st LO PLL IC (PLL unit; IC). PDT ATST Outputs start signal for the optional AT-0 antenna tuner. Outputs serial data for the DDS ICs (PLL unit; IC0, IC0) and PLL IC (PLL unit; IC). PCK BEEP Output port : Beep audio signals while receiving. : CW side tone signals while transmitting. Outputs a clock signal for the DDS ICs (PLL unit; IC0, IC0) and PLL IC (PLL unit; IC). AFGS 0 AHST Outputs start signal for the optional AH- AFMS Outputs squelch mute control signal, applied to the AF mute switch (MAIN board; Q). Low : While squelch is closed. CTCV SNDL Input port for the CTCSS decode signal from the low-pass filter (ICC). Input port from the [RTTY] or [MIC] connector. High : While transmitting. Outputs AGC rate select signal Low : When AGC fast is selected. NBS Outputs the NB switch (Q) control slignal. High : When the [NB] is turned ON, except FM/WFM modes. ATTS Outputs the attenuator circuit control slignal. High : When the [ATT] is turned ON. FMST Outputs a strobe signal for the TX FM PLL IC (IC0). SNDS Input port for transmit/receive switching signals for the [ACC] connector. Low : While transmitting. VOXL Input port for the VOX voltage. AVXL Input port for the anti-vox voltage. KDS Outputs a CW keying signal or RTTY TX signal. ALCV ALC level input port for the ALC meter indication. LTXD Output port for CI-V bus line. TONE Outputs subaudible tone signals. LRXD Input port for CI-V bus line. SPBK Input port for the optional UT-0 (Voice synthesizer unit) activation signal. High : During speech synthesis. -

15 SECTION ADJUSTMENT PROCEDURE - PREPARATION BEFORE SARVICING REQUIRED TEST EQUIPMENT EQUIPMENT GREDE AND RANGE EQUIPMENT DC power supply Output voltage Current capacity :. V DC : 0 A or more RF power meter (terminated type) Measuring range Frequency range Impedance SWR : : : : Frequency counter Frequency range Frequency accuracy Sensitivity : MHz : ± ppm or better : 00 mv or better RF voltmeter Frequency range Measuring range : MHz : V Standard signal generator (SSG) Frequency range Output level FM deviation meter Modulation analyzer GREDE AND RENGE Distortion meter Frequency range Measuring range : khz ±0 % : 00 % Oscilloscope Frequency range Measuring range : DC 00 MHz : V Digital multimeter Imput impeadance : 0 MΩ/DC or beter AC millivoltmeter Measuring range : 0 mv 0 V DC voltmeter Input impedance : 0 kω/v DC or better DC ammeter Measurement capability: A/0 A Audio generator Frequency range Measuring range : 0. 0 MHz : 0. µv mv ( to dbm) Spectram analyzer Frequency range : At least 000 MHz Spectraum bandwidth : 00 khz or more Frequency range Measuring range : 0 00 MHz : 0 to ± khz Attenuator Power attenuation Capacity : 0 or 0 db : 0 W or more Frequency range Measuring range : At least 00 MHz : 0 00 % External speaker Input impedance Capacity :Ω : W or more 0 00 W. 00 MHz 0 Ω Less than. : : Hz : 00 mv CONNECTIONS Microphone connector (Rear panel view) AC millivoltmeter Pin MIC + to [EXT SP] Audio generator Pin MIC INPUT Speaker Pin Pin PTT Spectrum analyzer to [MIC] Attenuator 0 or 0 db DC power supply AA. V/0 A AM meter A, 0 A to [DC. V] RF power meter A00 W/0 Ω FM deviation AAmeter Modulation aanalyzer Frequency counter to [ANT /] to [ELEC KEY] Keyer Standard signal aagenerator CAUTION: IC-0MKIIG - DO NOT connect the signal generator while transmitting.

16 - PLL ADJUSTMENTS ADJUSTMENT ADJUSTMENT CONDITION MEASUREMENT UNIT ERENCE Display frequency: Any L (PLL unit) : Center FREQUENCY Receiving PLL Connect an RF volt- Maximum level meter to check point (0 db or more) P. UNIT ADJUST PLL L, L L0 L R0 Connect a frequency MHz counter to check point P. ERENCE Display frequency: MHz Mode : USB LOOP LOCK Receiving VOLTAGE MAIN LOOP LOCK VOLTAGE VALUE LOCATION ADJUSTMENT POINT Display frequency:. MHz Mode : USB Receiving PLL Connect a digital.0 V multimeter or oscilloscope to check point CP. PLL C PLL Connect a digital.0 V multimeter or oscilloscope to check point CP0. PLL C0 Display frequency:. MHz Mode : USB Receiving.0 V C Display frequency: MHz Mode : USB Receiving.0 V C - TRANSMITTER ADJUSTMENTS ADJUSTMENT ADJUSTMENT CONDITION MEASUREMENT UNIT TRANSMIT TOTAL GAIN Display frequency:.0000 MHz Mode : USB [Q RF POWER] : H Connect an audio generator to [MIC] connector and set as:. khz/ mv Transmitting LOCATION Rear Panel Connect an RF Maximum RF power power meter to [ANT] connector. Rear Panel Connect an RF 00 W power meter to [ANT] connector. Transmitting OUTPUT POWER Display frequency:.0000 MHz Mode : USB [Q MIC GAIN] : Connect an audio generator to [MIC] connector and set as:. khz/0 mv Transmitting VALUE ADJUSTMENT POINT UNIT ADJUST MAIN L, L, L, L, L MAIN R0 0 W Display frequency: MHz Transmitting R 00 W R0 Display frequency: MHz Transmitting Connect an RF 0 W power meter to [ANT] connector. R0 Display frequency: MHz Transmitting 0 W R0 Display frequency:.0000 MHz CARRIER Mode : USB and LSB SUPPRESSION Apply no signal to [MIC] connector. Transmitting Rear Panel Connect a spectrum Minimum carrier level analyzer to [ANT] connector via an attenuator. - MAIN R0

17 PLL AND PA UNITS L0 L Reference loop lock CP voltage check point R0 Reference loop lock C voltage adjustment L L Main loop lock voltage check point Main loop lock voltage adjustment Reference frequency adjustment CP0 nd LO level adjustment P Reference frequency check point C0 C C MAIN UNIT R0 R0 Output power R0 adjustment R R0 L L R0 Carrier suppression Transmit total gain adjustment L L L -

18 TRANSMITTER ADJUSTMENTS (continued) ADJUSTMENT ADJUSTMENT CONDITION MEASUREMENT UNIT VALUE UNIT ADJUST FM VCO Display frequency:.0000 MHz Mode : FM [Q RF POWER] : H [M TON] : OFF Apply no signal to [MIC] connector. Transmitting MAIN Connect a digital. V multimeter to check point CP0. MAIN C0 FM DEVIATION Display frequency:.0000 MHz Mode : FM [Q RF POWER] : H [M TON] : OFF [Q MIC GAIN] : Connect an audio generator to [MIC] connector and set as: khz/0 mv Transmitting Rear Panel Connect an FM devi- ±. khz ation meter to [ANT] connector via an attenuator. MAIN R00 RESIDUAL AM Display frequency:.0000 MHz Mode : FM [Q RF POWER] : H [M TON] : OFF [Q MIC GAIN] : Connect an audio generator to [MIC] connector and set as: khz/0 mv and OFF Transmitting Connect an RF Minimum power differpower meter to ence with modulation and unmodulation. [ANT] connector. MAIN adjust in sequence L, L, then adjust L, L, L. MAIN R0 LOCATION ADJUSTMENT POINT After adjustment, varify the TRANSMIT TOTAL GAIN and OUTPUT POWER adjustments. Display frequency:.0000 MHz AM Mode : AM MODULATION [Q RF POWER] : H [Q MIC GAIN] : Disconnect the plug from J on the MAIN board. Apply no signal to [MIC] connector. Transmitting MAIN Connect an osillo- 00 mvp-p scope to check point CP0. Connect the plug to J on the MAIN board. Apply no signal to [MIC] connector. Transmitting Rear Panel Connect an RF W power meter to [ANT] connector. R00 Connect an audio generator to [MIC] connector and set as: khz/0 mv Transmitting Connect a modula- 0 % modulation tion analyzer to [ANT] connector via an attenuator. R Connect an osilloscope to check point CP and [ANT] connector. CW CARRIER LEVEL Display frequency:.0000 MHz Mode : CW [Q RF POWER] : H [Q KEY SPEED] : 0 [M BRK] : BK (semi break-in) CW paddle :n Connect an RF power meter to [ANT] connector. Transmit dots for a while using a paddle. At the point where the CW carrier completely comes up in a 0 msec. delay after CP voltage comes up. Keying (CP) 0 msec. - MAIN R

19 MAIN UNIT CW carrier level CP check point FM VCO check point CP0 C0 FM VCO adjustment AM modulation CP0 check point R AM modulation J pre-setting CW carrier level adjustment R00 FM deviation adjustment L R L Residual AM adjustment AM modulation R0 adjustment R00 L L L -

20 TRANSMITTER ADJUSTMENTS (continued) ADJUSTMENT IDLING CURRENT (for drive amplifiers) (for final amplifiers) SWR DETECTION MEASUREMENT ADJUSTMENT CONDITION Display frequency:.0000 MHz Mode : USB [Q MIC GAIN] : (minimum) turn R, R, R, R, R (on the PA unit) to maximum counterclockwise position. Disconnect the plug from J on the PA unit. Transmitting UNIT LOCATION PA Connect a DC ammeter between the DC power supply and transceiver s DC power socket (P0 on the PA unit). VALUE 0. A increase from that R is in maximum counterclockwise position. ADJUSTMENT POINT UNIT ADJUST PA R Display frequency:.0000 MHz Mode : USB [Q MIC GAIN] : (minimum) Transmitting.0 A increase from step. R Display frequency:.0000 MHz Mode : USB [Q MIC GAIN] : (minimum) Transmitting.0 A increase from that R is in maximum counterclockwise position. R Transmitting.0 A increase from step. R Display frequency:.0000 MHz Mode : USB [Q MIC GAIN] : (minimum) Transmitting.0 A increase from step. R Display frequency:.0000 MHz Mode : USB Ground CP0 on the MAIN board. Connect an audio generator to [MIC] connector and set as:. khz/0 mv Transmitting Transmitting Rear Panel Connect an RF 00 W power meter to [ANT] connector. Quick set mode Q MIC GAIN FILTER Connect a digital Minimum voltage multimeter to check point W. FILTER C After remove the jumper wire from CP0 on the MAIN board. -

21 PA UNIT R R Drive idling adjustment R Idling current pre-setting J R Final idling adjustment R MAIN AND FILTER UNITS C SWR detection adjustment SWR detection W check point CP0 SWR detection pre-setting -

22 - RECEIVER ADJUSTMENTS MEASUREMENT ADJUSTMENT ADJUSTMENT CONDITION VALUE UNIT LOCATION ADJUSTMENT POINT UNIT ADJUST Display freq. :.0000 MHz Mode : USB [RIT] : OFF [M AGC] : Fast (F AGC) [M NB] : OFF [P./ATT] : Preamp ON Connect a standard signal generator to the [ANT] connector and set as: Frequency :.00 MHz Level : 0. µv* ( dbm) Modulation : OFF Receiving Rear Panel Connect an AC milli- Muximum AF output voltmeter to the [EXT level SP] jack with an Ω dummy load. MAIN L, L [P./ATT] : Preamp OFF Set an SSG as: Frequency :.00 MHz Level : 00 µv* ( dbm) and OFF Modulation : OFF Receiving Rear Panel Connect an AC milli- 0 db of AF level differvoltmeter to the [EXT ence SP] jack with a Ω dummy load. MAIN R WFM RECEIVING Display freq. :.0000 MHz Mode : WFM Set an SSG as: Frequency :.0000 MHz Level : 00 µv* ( dbm) Modulation : OFF Receiving MAIN Connect a digital.0 V multimeter or oscilloscope to check point CP. MAIN L NOISE BLANKER Display freq. :.0000 MHz Mode : USB [P./ATT] : Preamp ON [M NB] : OFF R (MAIN) : Center Connect an SSG to the [ANT] connector and set as: Frequency :.0 MHz Level : µv* ( dbm) Modulation : OFF and apply the following signal to the [ANT] connector. MAIN Connect an oscillo- Adjust the maximum scope to check point noise wave displayed on the oscilloscope. CP. MAIN L, L At the point where the noise just reduces. MAIN R RECEIVER TOTAL GAIN 00 msec. msec. Receiving : ON [M NB] Set an SSG as: Level : 0 µv* ( dbm) Modulation : OFF Receiving *This output level of the standard signal generator (SSG) is indicated as SSG s open circuit. -

23 MAIN UNIT Noise blanler check point CP Noise blanler adjustment L L R WFM receiving L adjustment L WFM receiving CP check point L - Receiver total gain adjustment

24 - SET MODE ADJUSTMENT ADJUSTMENT ADJUSTMENT CONDITION ENTERING ADJUSTMENT SET MODE Enter adjustment set mode: Turn power OFF. Terminate the [REMOTE] jack with a.(d) mm mini-plug. While pushing [P./ATT] and [TUNE/CALL], turn power ON. Id APC DISPLAY Push [F- (TX)] to enter the TX adjustment setting mode. USB RX TX SET IdAPC Connect an RF power meter to [ANT] connector. Connect a DC ammeter between the DC power supply and transceiver s DC power socket (P0 on the PA unit). Transmit using an external PTT switch. OPERATION Then advance to the following setting, or push [UP]/[DN] to scroll the display. Set a total current at A by adjusting R on the MAIN board. Push [MENU] to set the "SET IdAPC" after returning receiving condition. FILTER CALIBRATION Connect an RF power meter to [ANT] connector. POWER METER ( MHz) Connect an RF power meter to [ANT] connector. Transmit using an external PTT switch. SET 0 % Set to 0 W using [MAIN DIAL], then push [MENU] while transmitting. Transmit using an external PTT switch. SET 0 % Set to 0 W using [MAIN DIAL], then push [MENU] while transmitting. TUNING POWER ( MHz) Connect an RF power meter to [ANT] connector. Transmit using an external PTT switch. SET TUNE Po Set to 0 W using [MAIN DIAL], then push [MENU] while transmitting. (0 MHz) Transmit using an external PTT switch. SET TUNE Po Set to 0 W using [MAIN DIAL], then push [MENU] while transmitting. POWER METER ( MHz) Connect an RF power meter to [ANT] connector. Transmit using an external PTT switch. SET 0 % Set to W using [MAIN DIAL], then push [MENU] while transmitting. Transmit using an external PTT switch. SET 0 % Set to W using [MAIN DIAL], then push [MENU] while transmitting. Connect an RF power meter to [ANT] connector. Transmit using an external PTT switch. SET 0 % Set to W using [MAIN DIAL], then push [MENU] while transmitting. Transmit using an external PTT switch. SET 0 % Set to 0 W using [MAIN DIAL], then push [MENU] while transmitting. Connect an RF power meter to [ANT] connector. Connect an audio generator to [MIC] connector and set as : Level :. khz/0mv Transmit using an external PTT switch. ALC START Push and hold [MENU] to set ALC reference level while transmitting. SWR METER Connect a 0 Ω dummy load or power meter to [ANT] connector. SWR LOAD Push [MENU] to set SWR reference level. Connect a 0 Ω dummy load or power meter to [ANT] connector. SWR LOAD Push [MENU] to set SWR level. GO FILTER CAL Push and hold [MENU (GO)] to make the calibration. Transceiver transmits for a while. POWER METER (0 MHz) ALC METER The display returns to the same as the ADUSTMENT SET MODE above. Push [F- (EXIT)] to exit adjustment set mode. - 0