SERVICE MANUAL. VHF TRANSCEIVER i2200h

Transcript

1 SERVICE MANUAL VHF TRANSCEIVER i00h

2 INTRODUCTION This service manual describes the latest service information for the IC-00H VHF TRANSCEIVER at the time of publication. MODEL VERSION Europe Taiwan U.S.A. SYMBOL EUR TPE USA IC-00H Korea Export Europe- KOR EXP EUR- Export- EXP- DANGER NEVER connect the transceiver to an AC outlet or to a DC power supply that uses more than V. This will ruin the transceiver. DO NOT expose the transceiver to rain, snow or any liquids. DO NOT reverse the polarities of the power supply when connecting the transceiver. DO NOT apply an RF signal of more than 0 dbm (00 mw) to the antenna connector. This could damage the transceiver s front end. To upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation. ORDERING PARTS Be sure to include the following four points when ordering replacement parts:. 0-digit order numbers. Component part number and name. Equipment model name and unit name. Quantity required <SAMPLE ORDER> 0000 S.IC LV0V IC-00H MAIN UNIT pieces Screw FH M. ZK IC-00H Cover 0 pieces Addresses are provided on the inside back cover for your convenience. REPAIR NOTES. Make sure a problem is internal before disassembling the transceiver.. DO NOT open the transceiver until the transceiver is disconnected from its power source.. DO NOT force any of the variable components. Turn them slowly and smoothly.. DO NOT short any circuits or electronic parts. An insulated tuning tool MUST be used for all adjustments.. DO NOT keep power ON for a long time when the transceiver is defective.. DO NOT transmit power into a signal generator or a sweep generator.. ALWAYS connect a 0 db to 0 db attenuator between the transceiver and a deviation meter or spectrum analyzer when using such test equipment.. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver. Icom, Icom Inc. and are registered trademarks of Icom Incorporated (Japan) in the United States, the United Kingdom, Germany, France, Spain, Russia and/or other countries.

3 TABLE OF CONTENTS SECTION SPECIFICATIONS SECTION INSIDE VIEWS - IC-00H HM-V SECTION OPTIONAL UNIT INSTALLATION SECTION CIRCUIT DESCRIPTION SECTION ADJUSTMENT PROCEDURES SECTION PARTS LIST SECTION MECHANICAL PARTS AND DISSASEMBLY - IC-00H HM-V SECTION SEMI-CONDUCTOR INFORMATION SECTION 9 BOARD LAYOUTS 9 - LOGIC UNIT MAIN UNIT HM-V HM-TN SECTION 0 BLOCK DIAGRAMS 0 - IC-00H HM-V SECTION VOLTAGE DIAGRAMS - LOGIC UNIT MAIN UNIT HM-V SECTION HM-/N (OPTIONAL UNIT) - INSIDE VIEW BOARD LAYOUTS MECHANICAL PARTS LIST AND DISSASEMBLY SECTION UT-0 (OPTIONAL UNIT) - BOARD LAYOUT SECTION UT- (OPTIONAL UNIT) - BOARD LAYOUT SEMI-CONDUCTOR INFORMATION BLOCK DIAGRAM VOLTAGE DIAGRAM

4 SECTION SPECIFICATIONS M GENERAL Frequency range : Version [EUR] [USA] [EXP], [EXP-] [EUR-], [TPE], [KOR] Receive (MHz) Transmit (MHz) * * * * * Specifications guaranteed MHz only * Specifications guaranteed MHz only Mode : FM, AM (Receive only) Number of memory channel : 0 (include in band edges memory and call channel) Usable temperature range : 0 C to +0 C; + F to +0 F Scan type : Full, Program, Priority, Memory channel, Bank, Skip and Tone scans Frequency resolution :, 0,.,, 0,, 0 and 0 khz Frequency stability : ±0 ppm ( 0 C to +0 C; + F to +0 F) Power supply requirement :. V DC ± % (negative ground) Current drain (at. V DC) : Receive Standby (squelched) 0. A Max. audio.0 A Transmit at W or 0 W.0 A (except [TPE]) at W 9.0 A at W 0.0 A ([TPE] only) at 0 W A (except [TPE]) at W A Antenna connector : SO-9 (0 Ω) Dimensions : 0(W) 0(H) (D) mm; (projections not included) (W) 9 (H) (D) inch Weight : Approx.. kg; lb oz M TRANSMITTER Output power : Version except [TPE], [KOR] [KOR] [TPE] High Middle-high Middle-low Low W W 0 W W 0 W W 0 W W W 0 W W Modulation system : Variable reactance frequency Maximum frequency deviation : ±.0/±.* khz Spurious emissions : Less than 0 dbc Microphone connector : -pin modular (00 Ω) *except [EXP-] M RECEIVER Receive system : Double-conversion superheterodyne Intermediate frequency : st. MHz nd 0 khz Sensitivity (at db SINAD) : Less than 0. µv Squelch sensitivity (threshold) : Less than 0. µv Selectivity : (Wide) More than ± khz at db, More than ± khz at 0 db (Narrow)* More than ± khz at db, More than ±9 khz at db *except [EXP-] Spurious and image rejection : More than 0 db Audio output power (at. V) : More than. W at 0% distortion with an Ω load External speaker connector : -conductor.(d) mm ( ")/Ω All stated specifications are subject to change without notice or obligation. -

5 UT- SPECIFICATIONS M GENERAL Usable temperature range Power supply requirement AF input level Modulation output level Demodulation input level AF output level CODEC type Transfer speed Control signal input voltage Control signal output voltage Current drain (at.0 V DC) Dimentions (projections not included) Weight (accessoreis not included) Connector : 0 C to +0 C; + F to +0 F :.0 V DC (. V. V for AMBE IC VCC line) : Vp-p typical : 0 mvp-p typical : 00 mvp-p typical : 0 mvp-p typical : AMBE :. kbps :.0 V.0 V for High 0 V for Low : Open collector for High 0 V for Low : ma typical : 0(W) (D) mm; (W) (D) inch : Approx. g; oz : AXN0C0 All stated specifications are subject to change without notice or obligation. -

6 SECTION INSIDE VIEWS - IC-00H MAIN UNIT (TOP VIEW) Power switch circuit Q*: SC Q0: DTATUA Q: DTCZU Power module (IC0: S-AV) Speaker AF power amplifier (IC9: TAAP) VCO circuit Discriminator (X: CDB0C) IF nd filter IF filter FI: CFWS0F FI: CFWS0HT AGC (Q: XP0) Reference oscillator (X: CR-9.MHz) *Located under side of the point MAIN UNIT (BOTTOM VIEW) Mixer st Mixer (Q9: SK99) APC controller (IC: NJM0AV) RF amplifier (Q: SK99) IF amplifier (Q: SC0) IF FM detector IF IC (IC: TAFN) D/A converter (IC: MFP) CV regulator (IC: TAL0F) regulator (IC: TA0F) TX/RX switch (D, D: MA) PLL IC (IC: LV0V) Enphasis switch (Q: SC) -

7 - HM-V CPU (IC: µpd90) LED driver Q, Q: SA DS0*: LTEPA V regulator Q: SC D: MA0 Regulator switch Q: SC Q9: DTBZK Reset IC (IC: BDG) LED driver Q, Q: SA DS*: LTEPA EE-PROM (IC: BRL0FV) [MAIN-A] unit only Data buffer circuit Q: DTCEU Q: DTAEU *Located under side of the point -

8 SECTION OPTIONAL UNIT INSTALLATION ➀ Remove [DIAL] and unscrew the allen-socket bolts from the front panel using with an allen wrench (. mm; 0 ). ➄ Intall the unit as illustrated below. Insert tightly to avoid bad contact. Flat cable Allen-socket bolts ➁ Detach the front panel from the main unit. Insulation sheet ➅ Return the front panel and the allen-socket bolts to their original position. ➂ Attach the insulation sheet (supplied as accessory) to IC on the Front unit. ➃ Remove the protective paper attached to the bottom of the optional unit to expose the adhesive strip. NOTE: When attaching the front panel to the main unit, make sure the flat cable are running in the groove to prevent catching between front panel and main unit. -

9 SECTION CIRCUIT DESCRIPTION - RECEIVER CIRCUITS -- ANTENNA SWITCHING CIRCUIT (MAIN UNIT) The antenna switching circuit functions as a low-pass filter while receiving and a resonator circuit while transmitting. The circuit does not allow transmit signals to enter receiver circuits. Received signals enter the antenna connector and pass through the low-pass filter (L, L, C0, C0, C). The filtered signals are passed through the λ/ type antenna switching circuit (D, D9, L, L) and limiter circuits (D). The signals are then applied to the squelch attenuator circuit. -- SQUELCH ATTENUATOR CIRCUIT (MAIN UNIT) The attenuator circuit attenuates the signal strength to a maximum of 0 db to protect the RF amplifier from distortion when excessively strong signals are received. The current flow of the antenna switching circuit (D, D9) is controlled by the [SQL] control via the attenuator controller (ICa, D). When the [SQL] control is rotated clockwise deeper than o clock, the current of D and D9 is increased. In this case, D and D9 act as an attenuator. -- RF CIRCUIT (MAIN UNIT) The RF circuit amplifies signals within the range of frequency coverage and filters out-of-band signals. The signals from the squelch attenuator circuit pass through the tunable bandpass filter (D). The filtered signals are amplified at the RF amplifier (Q) and then enter another three-stage bandpass filters (D9 D) to suppress unwanted signals. The filtered signals are applied to the st mixer circuit (Q9). The tunable bandpass filters (D D) employ varactor diodes to tune the center frequency of the RF passband for wide bandwidth receiving and good image response rejection. These diodes are controlled by the CPU (LOGIC unit; IC) via the D/A convertor (IC). -- ST MIXER AND ST IF CIRCUITS (MAIN UNIT) The st mixer circuit converts the received signals to a fixed frequency of the st IF signal with the PLL output frequency. By changing the PLL frequency, only the desired frequency will pass through a pair of crystal filters at the next stage of the st mixer. The RF signals from the bandpass filter are applied to the st mixer circuit (Q9). The applied signals are mixed with the st LO signal coming from the RX-VCO circuit (Q, D, D) to produce a. MHz st IF signal. The st IF signal passes through a pair of crystal filters (FI, FI) to suppress out-of-band signals. The filtered signal is amplified at the st IF amplifier (Q), and applied to the nd IF circuit via the limiter circuit (D9). -- ND IF AND DEMODULATOR CIRCUITS (MAIN unit) The nd mixer circuit converts the st IF signal to a nd IF signal. A double-conversion superheterodyne system improves the image rejection ratio and obtains stable receiver gain. The st IF signal from the IF amplifier (Q) is applied to the nd mixer section of the FM IF IC (IC, pin ) and is then mixed with the nd LO signal for conversion to a 0 khz nd IF signal. IC contains the nd mixer, limiter amplifier, quadrature detector, S-meter detector, active filter and noise amplifier circuits, etc. A frequency from the PLL reference oscillator is used for the nd LO signal (. MHz). ND IF AND DEMODULATOR CIRCUIT AM detector Q, Q FI FI (for wide) (for narrow) nd IF filter 0 khz PLL IC IC X. MHz "SQLIN" signal from the D/A converter IC (IC, pin ) AF signal "DETO" AM/FM selector IC Active filter FM detector 9 0 Limiter amp. X Noise detector RV Noise comp. RSSI Mixer IC TAFN st IF from the IF amplifier (Q) "NOIS" signal to the CPU (FRONT unit; IC, pin ) "SD" signal to the CPU (FRONT unit; IC, pin ) -

10 The nd IF signal from the nd mixer (IC, pin ) passes through the ceramic filter (FI) (during wide channel spacing selection or passes through FI during narrow channel spacing selection; [W/N] only). -- AM/FM SELECTOR CIRCUIT (MAIN UNIT) IC-00H can receive AM and FM signal. The nd IF signal is detected AM or FM detector circuits respectively. () AM DETECTOR CIRCUIT The filtered signal is applied to the AM detector circuit (Q, Q) to demodulate nd IF signal into AM AF signals. The AM AF signals are applied to the AF circuit via the AM/FM selector switch (IC, pin ). () FM DETECTOR CIRCUIT The filtered signal is amplified at the limiter amplifier section (IC, pin ), and is then applied to the quadrature detector section (IC, pins 0, and X) to demodulate the nd IF signal into FM AF signals. The FM AF signals are output from pin 9 (IC) and are then applied to the AF circuit via the AM/FM selector switch (IC, pin ). -- AF CIRCUITS (LOGIC UNIT) The AF circuits are composed of digital and analog AF circuits. The AF signals are amplifies the demodulated AF signals to drive a speaker. () IN CASE OF DIGITAL AF SIGNALS The digital AF signals are applied to the optional digital unit (UT-*) via the J (pin ) by the DETO line. The audio signals that are converted to analog signals at the UT- are applied to the analog selector circuit (IC, pin ) from the optional digital voice unit passed through the J (pin ) via the AFOUT line. The signals pass through the highpass filter (ICc, pins, 9) from the analog selector (IC, pin 9), and are then applied to the analog switch (IC, pin ). *Refer to - UT- CIRCUIT DESCRIPTION (page - ) in detail. () IN CASE OF ANALOG AF SIGNALS The analog AF signals are applied to the analog selector (IC, pin ), and pass through the high-pass filter (ICc, pins, 9). The filtered signals are applied to the analog switch (IC, pin ). The audio signals are applied to the AF mute switch (MAIN unit; Q9) via the VOL adjust pot (R). The signals are amplified at the AF amplifier (MAIN unit; IC9, pin ) to obtain. W audio output power after being passed through the emphasis switch (MAIN unit; Q). The amplified AF signals are applied to the speaker via the J (MAIN unit) and J (MAIN unit). -- SQUELCH CIRCUITS (MAIN AND LOGIC UNITS) NOISE SQUELCH The noise squelch circuit cuts out AF signals when no RF signals are received. By detecting noise components in the AF signals, the squelch circuit switches the AF mute switch. A portion of detected audio signals from the FM IF IC (IC, pin 9) are applied to the active filter section of the IC (IC, pin ) as SQLIN signal, after passing through the D/A converter (IC, pin ). The active filter section of the IC amplifies and filters noise components. The filtered signals are applied to the noise detector section in the IC and output from pin as the NOIS signal. The NOIS signal from IC (pin ) is applied to the CPU (LOGIC unit; IC, pin ). The CPU analyzes the noise condition and outputs AFMUTE and FILC signals via the I/O expander IC (LOGIC unit; IC) to toggle the AF mute (Q9) and emphasis (Q) switches. Even when the squelch is closed, the AF mute switch (Q9) opens at the moment of emitting beep tones. TONE SQUELCH The tone squelch circuit detects AF signals and opens the squelch only when receiving a signal containing a matching subaudible tone (CTCSS). When tone squelch is in use, and a signal with a mismatched or no subaudible tone is received, the tone squelch circuit mutes the AF signals even when noise squelch is open. AF signals from the FM IF IC (IC, pin 9) are applied to the AM/FM selector (IC, pin or ), and then pass through the analog selector (LOGIC unit; IC, pins 0, ). The signals pass through the low-pass filter (LOGIC unit; Q) to remove AF (voice) signals, and is applied to the CTCSS decoder inside the CPU (LOGIC unit; IC, pin ) via the CTCIN line to control the AF mute switch. AF CIRCUIT "DETO" AF signal from the AM/FM selector (MAIN unit; IC, pin ) Optional unit (UT-) Analog selector (IC) 9 0 LOGIC unit 9 HPF IC Analog switch (IC) Speaker (SP) AF IC9 MAIN unit Emphasis switch Q AF mute Q9 AF volume R -

11 - TRANSMITTER CIRCUITS -- MICROPHONE AMPLIFIER CIRCUIT (LOGIC unit) The microphone amplifier circuit amplifies audio signals with + db/octave pre-emphasis characteristics from the microphone to a level needed for the modulation circuit. The AF signals from the microphone pass through the microphone switch (IC, D), and are then amplified at the microphone amplifier (ICa,pin ). The amplified signals pass through (or bypass) the ALC circuit. IN CASE OF ANALOG AF SIGNALS The AF signals are applied to the DI/AN switch (IC, pin 9), and are then reapplied to the switch (pin ) from pin.the signals output from the switch (pin ) as analog AF signals, and are then applied to the modulation circuit after being passed through the J via the MODIN line. -- MODULATION CIRCUIT (MAIN UNIT) The modulation circuit modulates the VCO oscillating signal (RF signal) using the microphone audio signals. -- ALC CIRCUIT (LOGIC UNIT) The ALC (Automatic Level Control) circuit reduces the gain of IF amplifiers in order for the transceiver to output a constant RF power set by the RF power setting even when the supplied voltage shifts, etc. IN CASE OF PASSING THROUGH THE ALC CIRCUIT The amplified signals are applied to the ALC switch (IC0, pin ), and are then output from pin. The signals are applied to the ALC amplifier (IC, pin ), and are then reapplied to the ALC switch (IC0, pin ). The signals pass through the high-pass filter (ICd, pins, ), and are then applied to the analog switch (IC, pin ). IN CASE OF BYPASSING THE ALC CIRCUIT The amplified signals are applied to the ALC switch (IC0, pin ), and are then output from pin. The signals are applied to the ALC switch (IC0, pin 9) again, and then pass through the high-pass filter (ICd, pins, ) via the IC0, pin 0. The signals are applied to the analog switch (IC, pin ). -- DIGITAL SWITCH CIRCUIT (LOGIC UNIT) The signals from the analog switch (IC, pin ) pass through the high-pass filter (IC, pins, ), and are then reapplied to the analog switch (IC, pin 9). The signals are applied to the DI/AN switch via the MOD_I line. IN CASE OF DIGITAL AF SIGNALS The AF signals are applied to the DI/AN switch (IC, pin 0), and are then applied to the optional digital voice unit after being passed through the J (pin ) via the ANA- LOGUE_MOD_IN line. The A/D converted AF signals are applied to the DI/AN switch (IC, pin ) from the J (pin ) via the DIGITAL_MOD_OUT line. The digital AF signals from DI/AN switch (IC, pin ) are applied to the modulation circuit after being passed through the J via the MODIN line. ALC CIRCUIT Microphone MIC switch IC, D "ALC" from the CPU (MAIN unit; IC, pin ) "THROUGH" from the CPU (MAIN unit; IC, pin 0) MIC ICA "THROUGH" from the CPU (MAIN unit; IC, pin 0) IC0 ALC switch Power supply Through switch IC ALC Q The digital or analog audio signals (MODIN) change the reactance of D and D to modulate the oscillated signal at the TX-VCO circuit (Q). The modulated signal is amplified at the LO amplifier (Q9) and buffer amplifier (Q), then applied to the drive amplifiers. -- DRIVE AMPLIFIER CIRCUIT (MAIN UNIT) The drive amplifier circuit amplifies the VCO oscillating signal to the level needed at the power amplifier. The RF signal from the buffer amplifier (Q) passes through the T/R switch (D) and is amplified at the pre-drive (Q) and drive (Q) amplifiers. The amplified signal is applied to the power amplifier circuit. -- POWER AMPLIFIER CIRCUIT (MAIN UNIT) The power amplifier circuit amplifies the driver signal to an output power level. The RF signal from the drive amplifier (Q) is applied to the power module (IC0) to obtain W (0 W for Korea version, W for Taiwan version) of RF power. The amplified signals is passed through the antenna switching circuit (D), APC detector circuit (D, D, L9), and low-pass filter (L, L, C0, C0, C) and is then applied to the antenna connector. Control voltage for the power amplifier (IC0, pin ) are controlled by the APC circuit to protect the power module from a mismatched condition as well as to stabilize the output power. IC0 IC0 ALC switch Switch IC to the modulator circuit -

12 -- APC CIRCUIT (MAIN UNIT) The APC circuit protects the power amplifier from a mismatched output load and stabilizes the output power. The APC detector circuit (D, D, L9) detects forward signals and reflection signals at D and D respectively. The combined voltage is at minimum level when the antenna impedance is matched at 0 Ω and is increased when it is mismatched. The detected voltage is applied to the differential amplifier (IC, pin ), and the power setting voltage is applied to the other input (pin ) for the reference. When antenna impedance is mismatched, the detected voltage exceeds the power setting voltage. The output voltage of the differential amplifier (IC, pin ) controls the input current of the power module (IC0) to reduce the output power. - PLL CIRCUITS -- PLL CIRCUIT A PLL circuit provides stable oscillation of the transmit frequency and the receive st LO frequency. The PLL circuit compares the phase of the divided VCO frequency to the reference frequency. The PLL output frequency is controlled by the divided ratio (N-data) of a programmable divider. An oscillated signal from the VCO passes thorough the LO and buffer amplifiers (Q9, Q) is applied to the PLL IC (IC, pin ) and is prescaled in the PLL IC based on the divided ratio (N-data). The reference signal is generated at the reference oscillator (X) and is also applied to the PLL IC. The PLL IC detects the out-of-step phase using the reference frequency and outputs it from pin. The output signal is passed through the loop filter (Q, R, R R, C, C) and is then applied to the VCO circuit as the lock voltage via the LV line. -- VCO CIRCUIT (MAIN unit) The VCO circuit contains a separate TX-VCO (Q, D, D) and RX-VCO (Q, D, D). The oscillated signal is amplified at the LO (Q9) and buffer (Q) amplifiers, and is then applied to the T/R switching circuit (D, D). Then the Tx and Rx signals are applied to the pre-driver (Q) and st mixer (Q9) respectively. A portion of the signal from Q is amplified at the buffer amplifier (Q) and is then fed back to the PLL IC (IC pin ) as the comparison signal. APC CIRCUIT HV T RF signal TXC T Q, Q9, Q0 IC APC amp. IC + APC control circuit Pre drive Q Q IC0 Driver Power amp. amp. D Power detector circuit L9 to the antenna D PLL CIRCUIT RX VCO Q, D TX VCO Q9 LO Q Buffer Q D D to st mixer circuit to transmitter circuit Buffer Loop filter Q, D, D IC LV0V LPF. MHz nd LO signal to the FM IF IC (IC, pin ) LPF 9 Charge Phase Programmable Prescaler pump detector divider Reference divider X. MHz Shift register PLLCK PLLDATA PLLSTB -

13 -- REFEREE OSCILLATOR CONTROL CIRCUIT (LOGIC AND MAIN UNITS) The reference oscillator control circuit changes the reference frequency when using digital voice function. When digital voice signals output from the optional digital voice unit, the REFMOD signal outputs from it via the J (pin ) at the same time. The REFMOD signal is applied to the amplifier (IC, pin ), and passes through the CTCSS switch (IC, pins and ). The signal is applied to the D/A convertor (MAIN unit; IC, pin ) via the CTCSS line. The output signal from the D/A convertor (MAIN unit; IC, pin ) is applied to the reference oscillator (MAIN unit; X) to control the reference frequency while transmitting digital signals as DTC line. - POWER SUPPLY CIRCUITS VOLTAGE LINES Line HV Description The. V voltage from the connected DC power supply. - PORT ALLOCATIONS -- D/A CONVERTER IC (MAIN UNIT; IC) Pin number 0 Port name T SQLATT FC SQLIN DTC MOD T T Description Outputs RF tracking voltage while receiving. Outputs attenuator control signal. Outputs reference frequency control voltage. Outputs squelch control signal to adjust threshold level. Outputs DTCS slope correction signal. Outputs transmitting deviation control signal. Outputs RF tracking voltage while receiving. Outputs RF tracking voltage while receiving. Outputs transmitting power control signal while transmitting. SWHV CV T RV The same voltage as the HV line which is controlled by the HVSW circuit (Q, Q0, Q). When the [POWER] switch (LOGIC unit; S) is pushed, the CPU (LOGIC unit; IC, pin 0) outputs the PWRON control signal to the power switching circuit to turn the circuit ON. Common V for the CPU (LOGIC unit; IC) converted from the HV line by the CV regulator circuit (IC). The circuit outputs the voltage regardless of the power ON/OFF condition. Common V converted from the SWHV line by the regulator circuit (IC). Common V converted from the line by the regulator circuit (Q, Q). Transmit V controlled by the T regulator circuit (Q, Q) using the TXC signal from the I/O expander IC (IC, pin ). The voltage is converted from the line at the regulator circuit. Receive V controlled by the R regulator circuit (Q) using the RXC signal from the I/O expander IC (IC, pin ). The voltage is converted from the + V line at the regulator circuit. -- EXPANDER IC (MAIN UNIT; IC) Pin number Port name AFMUTE RXC TXC W/N SHIFT Description Outputs AF mute control signal. High: While muting. Outputs R regulator (Q) control signal. Low: While receiving. Outputs T regulator (Q and Q) control signal. High: While transmitting. Outputs nd IF filter select signal ([W/N] version ONLY). High: While wide passband width (±.0 khz) is selected (FI is selected). Low: While narrow passband width (±. khz) is selected (FI is selected). Outputs VCO regualtor (Q, Q, Q, Q, D) control signal. Low: While transmitting. High: While receiving. -

14 -- CPU (LOGIC UNIT; IC) Pin number Port name CTCIN SQLV MICUD SD LVIN TEMP DET0 COLOR DIM0 DIM CSHIFT RESET PWRSW NOIS DICK DIUD CLIN CLOUT SCK BUSY PWRON BSHIFT PLLSTB PLLCK EXSTB OPV UNLK REMO MICS AFON Description Input port for the CTCSS/DTCS signals. Input port for squelch volume detecting signal. Input port for the [ ] and [ ] switches from the external microphone. Input port for the S-meter voltage detecting signal. Input port for the PLL lock voltage. Input port for the transceiver s internal temperature detecting signal. Input port for the weather channel alert detecting sinal. Outputs LCD backlight color select signal. Low: Umber color is selected. Output LCD backlight brightness controls signals Outputs the CPU clock shift control signal. Input port for the reset signal. Input port for [POWER] switch. Low: [POWER] switch is pushed. Input port for the noise pulse signal for squelch and CPU. Input ports for encoder signals. Input port for the cloning signal. Output port for the cloning signal. Outputs serial clock signal to the D/A convertor (MAIN unit; IC, pin ). Outputs BUSY signal to the UT-. Outputs [POWER] switch control signal. High: [POWER] is ON. Outputs band shift signal. Low : While receiving Air band ( MHz). Outputs strobe signal to the PLL IC (MAIN unit; IC, pin ). Outputs clock signal to the PLL IC (MAIN unit; IC, pin ). Outputs strobe signal to the expander IC (MAIN unit; IC, pin ). Input port for the optional unit detecting signal. Input port for the PLL unlock signal. Input port for the HM-V remote microphone signals. Output transmitting/receiving AF filter select signal to the analog swtich (IC, pin [ AFON is applied to the pin ]). - Pin number, , 9 Port name IS0 IS KS, KS KR KR0 PTT DI_SEC TX_DIGI SO OPSCK OPV DASTB OPV EXTMIC DUSE ESCK ESDA OP_PS THROUGH ALC OPT OPT OPT SEG SEG COM COM VL VL IDET Description Output initial matrix strobe signals. Output key scan signals Input ports for the keyboard matrix signals. Input port for the [PTT] switch signal. High: While transmitting. Outputs digital/analog select signal while the UT- is installed. High : Digital is selected. Outputs filter characteristic control signal while the UT- is installed. Low : While transmitting digital signal. Outputs serial data to D/A convertor (MAIN unit; IC, pin ). Outputs DTMF clock signal to the expander IC (MAIN unit; IC, pin ). Outputs clock signal to the optional unit. Input port for the optional unit detecting signal. Outputs strobe signal to the D/A converter (MAIN unit; IC, pin ). Input port for the optional unit detecting signal. Input port for detecting signal whether the multifunction microphone is connected or not. Low: The multifuntion microphone is connected. Outputs low-pass filter cut-off frequency control signal when using DTCS. Outputs clock signal to the EEPROM (IC, pin ). I/O port for data signals from/to the EEPROM (IC, pin ). Outputs the optional unit power supply controll signal. High : Power is ON. Outputs the ALC circuit control signal. High : The ALC circuit is OFF. Outputs the ALC circuit control signal. High : The ALC circuit is ON. I/O ports for the optional unit control signals. Output LCD segment signals. Output LCD common signals. Output LCD device signals. Input port for the current drain detecting signal while transmitting.

15 - UT- CIRCUIT DESCRIPTION -- RECEIVER CIRCUIT The detected digital signals FMDET from the connected transceiver via the J0 (pin ) are amplified at the buffer amplifier (IC, pin ). The amplified signals are applied to the GMSK modem circuit (IC, pin ), and are then applied to the CPU (IC0) as clock synchronizer digital signal. The digital signals from the CPU are applied to the AMBE voice CODEC IC (IC) to precess code extention, and are then applied to the linear CODEC IC (IC0) as bits digital voice data. The applied digital signals are converted to the analog AF signals at the D/A converter section (IC0), and are then applied to the connected transceiver via the J0 (pin ) as DAFOUT signal. -- TRANSMITTER CIRCUIT The analog AF signals AMODIN from the connected transceiver via the J0 (pin ) are amplified at the buffer amplifier (IC, pin ). The amplified signals are applied to the linear CODEC IC (IC0, pin ) to convert bits digital voice data at the A/D converter section via the ADIN line. The digital signals are applied to the AMBE voice CODEC IC (IC) to process code compression, and are then applied to the CPU (IC0). The digital signals from the CPU convert to the GMSK base band signal at the GMSK modem (IC), and are then amplified at the buffer amplifier (IC, pin ). The amplified signals are applied to the connected transceiver via the J0 (pin ). -- RESET CIRCUIT The UT- has the reset IC (IC0). The IC outputs reset signal to the CPU (IC0, pin ) when VDD port (pin ) becomes more than. V. -- RS-C CIRCUIT IC is a RS-C compatible serial interface IC which converts data between the CPU and the external equipment (EX: Personal Computer). -- LEVEL CONVERTER CIRCUIT The level converter circuit (Q0 and Q0) converts communication data level between the CPU (IC0) and the connected transceiver s CPU. Q0, Q0 and Q0 convert control signals level between the UT- and the connected transceiver. - UT- POWER SUPPLY CIRCUITS VOLTAGE LINES Line V.V.V Description The V voltage from the connected transceiver via the J0 (pin 9). The V line is controlled by the control circuit (Q0 and Q). The circuit is controlled by the PSAVE signal from the CPU (IC0, pin and 9). Common. V converted from the V line by the.v regulator circuit (IC). One of the. V line is controlled by the +V control circuit (Q00 and Q0). The circuit is controlled by the PSAVE signal from the CPU (IC0, pin and 9). Common. V converted from the. V line by the.v regulator circuit (IC). The circuit is controlled by the APWR signal from the CPU (IC0, pin ). - UT- PORT ALLOCATIONS -- MODEM IC (IC) Pin number 9 0 Port name MCLK ACQ TXDT RXDT RXCK TXCK Description Outputs. MHz clock signal to the CPU (IC, pin 9). Outputs the PLL band width control signal while receiving. Outputs transmitting data signal to the CPU (IC0, pin ). Input port for receiving data signal from the CPU (IC0, pin ). Input port for receive clock signal from the CPU (IC0, pin ). Outputs transmit clock signal to the CPU (IC0, pin ). UT- BLOCK DIAGRAM -"TXD_" signal to the J0, pin -"RXD_" signal to the J0, pin Level converter Q0, Q0 CPU CODEC IC0 Modem IC Buffer ICB "DMOD" signal to the J0, pin -"C_RX" signal to the J0, pin -"C_TX" signal to the J0, pin RS-C IC DSP CODEC IC Buffer ICA "FMDET" signal from the J0, pin "DAFOUT" signal to the J0, pin Linear CODEC IC0 Buffer ICB "AMODIN" signal from the J0, pin -

16 -- CPU (IC) Pin number Port name RES PTTOUT_C ATXD ACLK ASTB ARXD ARES PSAVE BUSY PTTIN Description Input port for the reset signal from the reset IC (IC0, pin ). Low :The CPU is reset. OSC Outputs 9.0 MHz reference signal. Input port for 9.0 MHz reference OSC signal. Outputs.V regulator circuit (IC, APWR pin ) control signal. Outputs receive AF mute control signal to the connected transceiver via the RMUTE_C J0 (pin ). High :While muting. Outputs PTT signal to the connected transceiver via the J0 (pin ). High :While transmitting. Outputs transmit data signal to the CPU (IC, pin ). Outputs clock signal to the CPU (IC, pins and ). Outputs strobe signal to the CPU (IC, pins 0 and ). Input port for receive data signal from the CPU (IC, pin ). Outputs reset signal to the linear CODEC IC (IC0, pin ). Output power save control signal to the +V controller circuit (Q00 and Q0). Low :Power save is ON. Input port for the BUSY signal from the connected transceiver via the J0 (pin ). High :While receiving signals. Input port for the PTT signal from the connected transceiver via the J0 (pin ). High :While transmitting. -

17 SECTION ADJUSTMENT PROCEDURES - PREPARATION Enter the adjustment mode when adjusting the IC-00H Then the JIG cable as shown the page - is required. REQUIRED TEST EQUIPMENT EQUIPMENT GREDE AND RANGE EQUIPMENT GREDE AND RENGE Output voltage :. V DC Frequency range : 0 00 MHz DC power supply FM deviation meter Current capacity : 0 A or more Measuring range : 0 to ± khz Measuring range : W Frequency range : DC 00 MHz Oscilloscope RF power meter Frequency range : 0 00 MHz Measuring range : V (terminated type) Impedance : 0 Ω SWR : Less than. : Frequency range : Hz Audio generator Measuring range : 00 mv Frequency range : MHz Frequency counter Frequency accuracy : ± ppm or better Power attenuation : 0 or 0 db Attenuator Sensitivity : 00 mv or better Capacity : 0 W or more Frequency range : MHz Standard signal Output level : 0. µv mv generator (SSG) ( to dbm) ENTERING THE ADJUSTMENT MODE q Turn the transceiver s power OFF. w Connect the JIG cable to the [MIC] jack. e Push and hold the [SET] and [MONI] keys, and then turn power ON. NOTE: Exiting from the adjustment mode when the transciever s power is OFF. OPERATING ON THE ADJUSTMENT MODE Change the adjustment value : [DIAL] Verifying the adjustment value : [M/CALL] key Forward the adjustment item : [BANK] key Go back the adjustment item : [V/MHz] key Store the adjustment value in the memory : [S.MW] key CAUTION: Need to push the [S.MW] key when storing the adjustment value in the memory. Otherwise, the transceiver is not adjusted properly. IMPORTANT!: The transceiver need to be cancelled adjustment mode (as following method) to use normal mode when adjustments are finished, otherwise the transceiver does not work properly. q: Turn the power OFF. w: Push and hold [S.MW] and [SET] keys, and then turn the power ON. -

18 CONNECTIONS FM DEVIATION METER ATTENUATOR 0 db or 0 db RF POWER METER 0, 0 W STANDARD SIGNAL GENERATOR MHz to dbm (0. V to mv) CAUTION! DO NOT transmit while an SSG is connected to the antenna connector. to the antenna connector POWER SUPPLY. V, 0 A or more JIG CABLE INFORMATION AUDIO GENERATOR 00 Hz to khz pin pin (MICE) pin pin (MIC) k pin () pin (PTT) ADJUSTMENT ITEM EXPLANATION Starting item Fr NOTE: DO NOT adjust items with "*" mark at below explanation. Those items are adjusted automatically when other adjustment items are adjusted. re PO to the microphone connector PO+[MID] PO+[MID]+[LOW] PO+[LOW] PU de *dp de+[digital] dt *F *dt *C *CS *Et *df Sr+[.] Sr Sq tr tr tr tr dt+[digital] *bp *F *F *F *F *F *F *F *F9 *F0 *F *F *F *F *F *F *F *de+[digital] *db *db *db *db *dd *dd *dd *dd *de *de *de *FA *F9 *F *de+[digital] *de+[digital] *dd+[digital] *dd+[digital] *dd+[digital] *dd+[digital] *db+[digital] *db+[digital] *db+[digital] *db+[digital] *db+[digital] *dd+[digital] *PN *PP * * * * * * * *+[.] *+[.] *+[.] *+[.] *+[.] *du *FN *FN *FN *FN *+[.] *+[.] *Not adjust items -

19 - SOFTWARE ADJUSTMENTS (TRANSMITTING AND RECEIVING) ADJUSTMENT ADJUSTMENT CONDITION OPERATION REFEREE FREQUEY [Fr] REFEREE VOLTAGE [re] VHF OUTPUT POWER (High) [PO] Operating frequency :.0 MHz Turn the [DIAL] to set to.0000 MHz. Loosely couple a frequency counter to the antenna Push the [S.MW] key. connector on the rear panel. Transmitting Operating frequency :.0 MHz Push the [S.MW] key. Receiving Operating frequency :.0 MHz Connect an RF power meter to the antenna connector. Transmitting Turn the [DIAL] to set the VHF high power to W. Push the [S.MW] key. (Middle) [PO+MID] (Middle-Low) [PO+MID+LOW] (Low) [PO+LOW] PROTECT VOLTAGE [PU] FREQUEY DEVIATION (Analog) [de] DIGITAL VCO DEVIATION [de+digital] DTCS WAVE FORM [dt] Operating frequency Transmitting Operating frequency Transmitting Operating frequency Transmitting :.0 MHz :.0 MHz :.0 MHz Operating frequency :.0 MHz Push the [S.MW] key while transmitting. [High]/[Low] switch : High Connect an RF power meter to the antenna connector. Transmitting Operating frequency :.0 MHz Turn the [DIAL] to set to ±. khz. IF bandwidth : Wide Push the [S.MW] key after finish adjustment. Connect an audio generator to the [MIC] jack and set as : khz/0 mv rms Connect an FM deviation meter to the antenna connector and set as : HPF : OFF LPF : 0 khz De-emphasis : OFF Detector : (P P)/ Transmitting Operating frequency :.0 MHz Turn the [DIAL] to set to ±. khz. IF bandwidth : Wide Push the [S.MW] key after finish adjustment. No audio signal is applied to the [MIC] jack. Connect an FM deviation meter to the antenna connector and set as : HPF : OFF LPF : 0 khz De-emphasis : OFF Detector : (P P)/ Transmitting Operating frequency :.0 MHz Turn the [DIAL] to set to flat wave form as shown IF bandwidth : Wide below. No audio signal is applied to the [MIC] jack. Push the [S.MW] key after finish adjustment. DTCS code : 0 Set an FM deviation meter as: HPF LPF De-emphasis Detector Transmitting : OFF : 0 khz : OFF : (P P)/ Turn the [DIAL] to set the VHF middle power to W. Push the [S.MW] key. Turn the [DIAL] to set the VHF low power to 0 W. Push the [S.MW] key. Turn the [DIAL] to set the VHF low power to W. Push the [S.MW] key. Set to flat wave form -

20 SOFTWARE ADJUSTMENTS (TRANSMITTING AND RECEIVING) Continued ADJUSTMENT ADJUSTMENT CONDITION OPERATION DIGITAL REFEREE DEVIATION [dt+digital] RECEIVER SENSITIVITY [tr] SQUELCH LEVEL (Wide) [Sq] S-METER (FM mode) [Sr] (AM mode) [Sr+.] Operating frequency :.0 MHz IF bandwidth : Wide No audio signal is applied to the [MIC] jack. Connect an FM deviation meter to the antenna connector and set as : HPF : OFF LPF : 0 khz De-emphasis : OFF Detector : (P P)/ Transmitting Operating frequency :.00 MHz Connect an SSG to the antenna connector and set as Level : 0. µv* ( dbm) Modulation : khz Deviation : ±. khz Receiving Operating frequency :.00 MHz Receiving Operating frequency :.90 MHz Receiving Operating frequency :.90 MHz Receiving Operating frequency :.00 MHz Connect an SSG to the antenna connector and set as Level : 0. µv* ( dbm) Modulation : khz Deviation : ±. khz Receiving Operating frequency :.00 MHz Connect an SSG to the antenna connector and set as Level :. µv* ( 0 dbm) Modulation : khz Deviation : ±. khz Receiving Operating frequency :.00 MHz Connect an SSG to the antenna connector and set as Level :.0 µv* ( 0 dbm) Modulation : khz Deviation : 0 % Receiving Turn the [DIAL] to set to ±0. khz. Push the [S.MW] key after finish adjustment. Push the [S.MW] key. Push the [S.MW] key. Push the [S.MW] key. Push the [S.MW] key. Turn the [DIAL] to set to squelch tight point. Turn the [DIAL] to set to squelch threshold point. Push the [S.MW] key. Push the [S.MW] key. Push the [S.MW] key. *This output level of a standard signal generator (SSG) is indicated as SSG s open circuit. -

21 - UT- ADJUSTMENT PROCEDURES PREPARATION Enter the adjustment mode when adjusting the UT-. REQUIRED TEST EQUIPMENT EQUIPMENT GREDE AND RANGE EQUIPMENT GREDE AND RENGE DC power supply DC power supply Sensitivity : 00 mv or better Output voltage :.0 V DC Current capacity : A or more Frequency range : DC 00 MHz Oscilloscope Measuring range : V Output voltage :.0 V DC Frequency range : MHz Current capacity : A or more Frequency counter Frequency accuracy : ± ppm or better ENTERING THE ADJUSTMENT MODE Connect J0, pin to, then the UT- enters adjustment mode. NOTE: Exit from the adjustment mode to disconnect J0, pin from before the UT- adjustment is fihished CONNECTION UT- BOTTOM VIEW Power supply V DC / A Power supply V DC / A J0, Pin Entering adjustment mode -

22 - TRIMMER ADJUSTMENTS ADJUSTMENT MEASUREMENT UNIT MEASUREMENT LOCATION VALUE ADJUSTMENT POINT UNIT ADJUST CODEC FREQUEY SET MAIN Connect the frequency counter to the check point CP0..00 MHz ±0 Hz MAIN C0 MODEM FREQUEY SET MAIN Connect the frequency counter to the check point CP..00 MHz ± Hz MAIN C0 MODURATION OUTPUT LEVEL MAIN Transmit the UT- to connect J0, pin to. Connect the oscilloscope to the J0, pin. 0 mvp-p ±0 mv MAIN R Disconnect J0, pin from. UT- TOP VIEW C0 MODEM frequency set adjustment C0 CODEC frequency set adjustment UT- BOTTOM VIEW CP MODEM frequency set check point J0, Pin Transmit the UT- J0, Pin Modulation output level check point CP0 CODEC frequency set check point -

23 SECTION PARTS LIST - IC-00H [LOGIC UNIT] REF ORDER IC 000 S.IC M00FCRP (FX-9A) [EXP] B 00 S.IC M00FCRP (FX-9A-) [USA] B 0090 S.IC M00MA-RP (FX-9A-) except [EXP] and [USA] B IC S.IC TCSF (TER) B IC 0000 S.IC NJM90V-TE B IC 0000 S.IC BDFVE-TR B IC 0000 S.IC HNXTI B IC 000 S.IC CD0BPWR T IC 0000 S.IC TAS9F (TER) T IC 0000 S.IC ANMS B IC0 000 S.IC CD0BPWR T IC 0000 S.IC TCSF (TEL) B IC 000 S.IC CD0BPWR B IC 000 S.IC SNAHCGHDCTR B IC 000 S.IC CD0BPWR T Q S.TRANSISTOR SC-GR (TER) T Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR XP0 (TX) B Q S.TRANSISTOR DTCTU T0 B Q S.TRANSISTOR SAA T0R B Q S.TRANSISTOR SC-GR (TER) B Q S.TRANSISTOR SC-GR (TER) B Q S.TRANSISTOR SC-GR (TER) B Q S.TRANSISTOR SB9-T DK B Q S.TRANSISTOR SC-GR (TER) B Q S.TRANSISTOR SAA T0R B Q S.TRANSISTOR SAA T0R T Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR UMGN TL B Q S.TRANSISTOR DTAEE TL T D 0000 S.ZENER MA09-M (TX) T D S.DIODE MAS-(TX) T D 0000 S.ZENER MA09-M (TX) B D S.DIODE DANTL B D S.DIODE DA TL B D S.DIODE DANTL T D S.DIODE DANTL T D S.DIODE DANTL T D 0000 DIODE SS T (M/M) [TPE], [KOR], [EUR-] only B D S.DIODE ISS00 TE except [EXP], [EXP-] B D S.DIODE ISS00 TE [EXP], [EXP-] only B D S.DIODE ISS00 TE [EUR], [EUR-], [EXP], [EXP-] only B D S.DIODE ISS00 TE [TPE], [KOR], [EXP], [EXP-] only B D S.DIODE DANTL T D S.DIODE ISS00 TE [TPE], [EXP], [EXP-] only B D S.DIODE ISS00 TE [TPE], [KOR] only B D S.DIODE MAS0-(TX) B D S.DIODE ISS00 TE except [EXP-] B D S.DIODE ISS00 TE [EXP], [EXP-] only B D S.DIODE MAS-(TX) B X S.XTAL CR-9 (9.0 MHz) B R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR ERJGEJ X (0 kω) T R S.RESISTOR ERJGEJ 0 X (0 kω) T R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ X (0 kω) T R S.RESISTOR ERJGEJ 0 X (00 kω) T R S.RESISTOR ERJGEJ 0 X (00 Ω) B R S.RESISTOR ERJGEJ X (. kω) T R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR ERJGEJ 0 X (0 kω) T R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) T R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ 0 X ( kω) B M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) [LOGIC UNIT] REF ORDER R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEYJ 9 V (9 kω) [EXP] only B S.RESISTOR ERJGEJ 9 X (9 kω) [other] B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X (. kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X (. kω) B R S.RESISTOR ERJGEJ X (0 kω) B R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X ( MΩ) B R S.RESISTOR ERJGEJ 0 X ( MΩ) B R S.RESISTOR ERJGEJ 0 X ( MΩ) B R S.RESISTOR ERJGEJ 9 X (.9 kω) B R S.ARRAY EXB-VV 0JV ( kω) T R S.RESISTOR ERJGEJ 0 X (00 kω) T R S.RESISTOR ERJGEJ 0 X ( MΩ) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X ( MΩ) B R S.RESISTOR ERJGEJ 00 X (0 Ω) B R S.RESISTOR ERJGEJ 0 X ( kω) T R S.RESISTOR ERJGEJ X (. MΩ) B R S.RESISTOR ERJGEJ 0 X ( kω) [EUR], [EXP], [EXP-] only B R S.RESISTOR ERJGEYJ R0 V ( Ω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R 0000 VARIABLE EVU-FAF0 A (0KA) T R 0000 VARIABLE EVU-FAF0 B (0KB) T R S.RESISTOR ERJGEJ 0 X ( MΩ) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X (0 kω) B R S.RESISTOR ERJGEJ 9 X (9 kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ X (0 kω) B R S.RESISTOR ERJGEJ X (0 kω) B R S.RESISTOR ERJGEJ X (0 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X (. kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X (. kω) B R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ X (0 kω) B R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ 0 X ( Ω) B R S.RESISTOR ERJGEJ X (. kω) B R S.RESISTOR ERJGEJ X (. kω) B R S.RESISTOR ERJGEJ X (0 Ω) B R S.ARRAY EXB-VV 0JV T R S.RESISTOR ERJGE B R S.RESISTOR ERJGEJ X (0 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ 0 X ( Ω) B R S.RESISTOR ERJGEJ 9 X (9 kω) B R S.RESISTOR ERJGEJ X (0 Ω) B R S.RESISTOR ERJGEJ X (0 Ω) B R S.RESISTOR ERJGEJ X (. kω) B R S.RESISTOR ERJGEJ X (0 kω) B S.=Surface mount -

24 [LOGIC UNIT] REF ORDER R S.RESISTOR ERJGEJ X ( kω) [USA] only B S.RESISTOR ERJGEJ X ( kω) [other] B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ X ( kω) [USA] only B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (00 Ω) B R S.RESISTOR ERJGE-JPW T R S.RESISTOR ERJGEJ 0 X ( MΩ) B R S.RESISTOR ERJGEJ X (0 Ω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X (0 kω) B R S.RESISTOR ERJGEJ 0 X ( MΩ) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ 0 X (00 Ω) B R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (0 kω) T R S.RESISTOR ERJGEJ X (0 Ω) T R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.ARRAY EXB-VV 0JV ( kω) T R S.RESISTOR ERJGEJ 0 X (00 kω) T R S.RESISTOR MCR0EZHJ Ω (0) T R S.RESISTOR MCR0EZHJ Ω (0) B R S.RESISTOR ERJGE-JPW B R S.RESISTOR ERJGEJ 0 X (0 kω) B [LOGIC UNIT] REF ORDER C S.CERAMIC ECJ0ECH0J B C S.CERAMIC ECJ0EBC0K B C S.CERAMIC ECJ0ECH00C B C 0000 S.CERAMIC ECJ0EBHK B C 0000 S.CERAMIC ECJ0EBHK B C S.CERAMIC ECJ0ECH0J B C 0000 S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0EBC0K B C S.CERAMIC ECJ0EBC0K B C S.CERAMIC ECJ0EBC0K T C 0000 S.ELECTROLYTIC ECEVCA00SR B C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0EBC0K T C S.CERAMIC ECJ0EBC0K B C S.CERAMIC ECJ0EBAK B C 0000 S.ELECTROLYTIC ECEVHARSR B C 0000 S.CERAMIC ECJ0EBEK B C 0000 S.CERAMIC ECJ0EBEK B C S.CERAMIC ECJ0EBAK B C 0000 S.ELECTROLYTIC ECEVHARSR B C S.CERAMIC ECJ0EBC0K B C S.CERAMIC ECJ0ECHJ B C S.CERAMIC ECJ0EBC0K B C S.CERAMIC ECJ0EBC0K B C 0000 S.CERAMIC ECJ0EBEK B C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K B C S.ELECTROLYTIC ECEVCS00SR B C 0000 S.TANTALUM TEESVA A 0ML B C S.CERAMIC C0 JB A 0K-T B C S.CERAMIC ECJ0EBE0K T C S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0EBE0K T C S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0EBE0K T C S.TANTALUM ECSTCX0R T C S.TANTALUM TEESVA A 0ML B J 0000 CONNECTOR 0- <KIN> T J 000 S.CONNECTOR B J 0090 S.CONNECTOR AXN0C0P B C 0000 S.CERAMIC ECJ0EBE0K B C 0000 S.CERAMIC ECJ0EBE0K T C 0000 S.CERAMIC ECJ0ECH0J T C 0000 S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0EBC0K T C S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0EBE0K B C 0000 S.CERAMIC ECJ0EBE0K B C 0000 S.CERAMIC ECJ0EBE0K B C 0000 S.CERAMIC ECJ0EBE0K B C 0000 S.CERAMIC ECJ0EBE0K B C 0000 S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0EBC0K B C S.CERAMIC ECJ0EBE0K B C 0000 S.CERAMIC ECJ0EBE0K T C 0000 S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0ECH0J B C 0000 S.CERAMIC ECJ0ECH0J T C 0000 S.ELECTROLYTIC ECEVCA00SR B C S.CERAMIC C00 JB C K-T-N B C S.CERAMIC ECJ0EBEK B C S.CERAMIC ECJ0EBAK B C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0EBC0K B C S.CERAMIC ECJ0EBHK B C S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0EBE0K B C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0EBAK B C S.CERAMIC ECJ0EBAK B C 0000 S.CERAMIC ECJ0EBEK B C S.CERAMIC ECJ0EBC0K B C S.CERAMIC ECJ0EBCK B C S.CERAMIC ECJ0EBA0K B C 0000 S.CERAMIC ECJ0EBHK B C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0EBAK B C 0000 S.CERAMIC ECJ0ECH0J T M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) DS LCD IS0E00V T DS S.LED SEC C T DS S.LED SEC C T DS S.LED SEC C T DS S.LED SEC C T DS S.LED SEC C T DS S.LED SEC C T DS S.LED SEC C T DS S.LED SEC C T DS S.LED SEC C T DS S.LED SEC C T DS S.LED SEC C T DS S.LED SEC C T S S.SWITCH SKQDPA T S S.SWITCH SKQDPA T S S.SWITCH SKQDPA T S S.SWITCH SKQDPA T S S.SWITCH SKQDPA T S S.SWITCH SKQDPA T S S.SWITCH SKQDPA T S S.SWITCH SKQDPA T S EODER EVQ-VENF0B T S S.SWITCH SKQDPA T EP 9000 S.BEAD MMZ0Y 0BT T EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT T EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP S.BEAD MMZ0Y 0BT B EP S.BEAD MMZ0Y 0BT B EP 900 LCD CONTACT SRCN-9-SP-N-W- T S.=Surface mount -

25 [LOGIC UNIT] REF ORDER EP 0900 PCB B 0B [MAIN UNIT] REF ORDER D S.DIODE SS TE- B D S.DIODE MAS-(TX) B D S.VARICAP MAS000L T [MAIN UNIT] REF ORDER FI CERAMIC CFWLA0KFFA-B0 (CFWS0F) T FI CERAMIC CFWLA0KHFA-B0 (CFWS0HT) except [EXP-] T FI MONOLITH FL- (. MHz) T FI MONOLITH FL- (. MHz) T IC 0000 S.IC LV0V-TLM B IC 000 S.IC CD09BPWR T IC S.IC TAFN (D,EL) B IC S.IC MFP-0C B IC S.IC NJM0AV-TE B IC 0000 S.IC TA0F (TEL) B IC S.IC ANL0M-(E) B IC IC TAAP T IC S.IC S-AV (I) T IC S.IC NJM0AV-TE T IC 000 S.IC SNAHCGHDCTR T Q 0000 S.TRANSISTOR SC-BL (TER) B Q S.TRANSISTOR XP0 (TX) B Q 0000 S.TRANSISTOR SC-BL (TER) B Q 0000 S.TRANSISTOR SC-BL (TER) B Q 0000 S.TRANSISTOR SC-BL (TER) B Q S.TRANSISTOR SC-T R T Q S.TRANSISTOR SC-T R T Q S.TRANSISTOR DTAZU T0 B Q S.TRANSISTOR SC-T R T Q S.FET SK09--TL T Q S.TRANSISTOR SC-T R T Q S.TRANSISTOR SC-T R T Q S.TRANSISTOR DTAEUA T0 except [EXP-] T Q S.TRANSISTOR SA-Y (TEL) T Q 0000 S.TRANSISTOR SC-BL (TER) T Q 0000 S.TRANSISTOR SC0--TL B Q S.TRANSISTOR SC-TB B Q S.FET SK99-T U B Q S.TRANSISTOR DTBZK T T Q S.TRANSISTOR DTCEUA T0 T Q S.TRANSISTOR DTBZK T T Q S.TRANSISTOR DTAEUA T0 B Q S.FET SK99-T U B Q S.TRANSISTOR SC (TER) B Q S.TRANSISTOR SC-B (TER) B Q S.TRANSISTOR DTATU T0 T Q S.TRANSISTOR DTCZUA T0 T Q 0000 S.TRANSISTOR SC-BL (TER) B Q 0000 S.TRANSISTOR SC9-T B Q S.TRANSISTOR DTAZU T0 T Q S.TRANSISTOR XP0-(TX).AB T Q S.TRANSISTOR XP0-(TX).AB T Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR DTCEUA T0 B Q 0000 S.TRANSISTOR SC TLS B D S.DIODE MAS-(TX) B D S.VARICAP HVCBTRF T D S.VARICAP HVCBTRF T D S.VARICAP MAS000L T D S.VARICAP MAS000L T D S.DIODE MA (TX) B D S.DIODE MA (TX) B D S.VARICAP HVC0BTRF B D S.VARICAP HVC0BTRF B D S.VARICAP HVC0BTRF B D DIODE XBA0 T D S.VARICAP HVC0BTRF B D S.DIODE MA (TX) T D S.DIODE SS TE- T D S.DIODE HVUTRF T D S.DIODE MA (TX) T D S.DIODE MAS-(TX) B D DIODE XBA0 T D ZENER RD0E B T D DIODE DSAA T D S.DIODE MAS-(TX) except [EXP-] B D S.DIODE MAS-(TX) except [EXP-] T D S.DIODE MAS-(TX) except [EXP-] T D S.DIODE MAS-(TX) except [EXP-] B D DIODE XBA0 T D S.DIODE DA TL B M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) X 0000 S.XTAL CR-9 (.0 MHz) T X DISCRIMINATOR CDBLA0KCAY-B0 (CDB0C) T L S.COIL ELJRE RG-F T L S.COIL MLF0E 00K-T T L S.COIL ELJFC R0K-F B L S.COIL C0C-R0G T L S.COIL CA-RJ-A T L S.COIL ELJFC RK-F T L S.COIL ELJFC RK-F T L S.COIL ELJFC R0K-F B L S.COIL ELJRE RG-F T L S.COIL ELJRE RG-F T L S.COIL ELJRE R0G-F T L S.COIL ELJRE NG-F B L S.COIL ELJRE NG-F T L S.COIL ELJRE 9NG-F B L S.COIL MLF0A RK-T B L S.COIL ELJRE NG-F B L S.COIL ELJRE NG-F B L S.COIL ELJRE NG-F B L S.COIL NL 0T-RJ B L S.COIL NL 0T-RJ B L S.COIL C0C-NG T L S.COIL C0C-NG T L S.COIL AS00-N T L S.COIL C0C-NG T L S.COIL AS00-N T L S.COIL FHW0HC R0JGT T L S.COIL ELJFC RK-F B L S.COIL TL N T L S.COIL 0.-.-TL N T L S.COIL AS00-N T L S.COIL AS00-N T L S.COIL AS00-N T L S.COIL NL 0T-RJ B L S.COIL ELJRE NG-F B L S.COIL ZBFS0-PT T L S.COIL ZBFS0-PT T L S.COIL ZBFS0-PT T L S.COIL ZBFS0-PT T L S.COIL MLF0E 00K-T T L S.COIL MLF0E 00K-T T R S.RESISTOR ERJGEYJ V ( kω) T R S.RESISTOR ERJGEYJ 0 V ( kω) T R S.RESISTOR ERJGEYJ V (0 kω) T R S.RESISTOR ERJGEYJ 0 V ( Ω) [EXP] T S.RESISTOR ERJGEYJ 0 V ( Ω) [other] T R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R 0000 S.THRMISTOR NTCG LH KT T R S.RESISTOR ERJGEYJ 0 V (00 kω) T R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V ( kω) T R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ 0 V (00 Ω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ 0 V ( MΩ) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ 9 V (90 Ω) B R S.RESISTOR ERJGEYJ V (. kω) T R S.RESISTOR ERJGEYJ V (. kω) T R S.RESISTOR ERJGEYJ 0 V (00 Ω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) T R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) T R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (. kω) T R S.RESISTOR ERJGEYJ 0 V ( kω) T R S.RESISTOR ERJGEYJ 0 V (0 kω) B S.=Surface mount -

26 [MAIN UNIT] REF NO. ORDER NO. R S.RESISTOR ERJGEYJ V (. kω) T R S.RESISTOR ERJGEYJ 0 V ( kω) T R S.RESISTOR ERJGEYJ 00 V (0 Ω) T R S.RESISTOR ERJGEYJ 00 V (0 Ω) T R S.RESISTOR ERJGEYJ 0 V (00 kω) T R S.RESISTOR ERJGEYJ V (0 Ω) T R S.RESISTOR ERJGEYJ 0 V ( kω) T R S.RESISTOR ERJGEYJ V ( kω) T R S.RESISTOR ERJGEYJ 0 V (00 kω) T R S.RESISTOR ERJGEYJ 0 V (00 kω) T R S.RESISTOR ERJGEYJ V (0 Ω) T R S.RESISTOR ERJGEYJ V (0 Ω) T R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ 0 V (00 Ω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) T R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V (. kω) T R S.RESISTOR ERJGEYJ V (. kω) T R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ 0 V ( Ω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ 0 V ( Ω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ 0 V (00 Ω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ V (0 Ω) T R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR MCR0EZHJ Ω (0) T R S.RESISTOR MCR0EZHJ. kω T R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ 9 V (.9 kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V (00 Ω) B R S.RESISTOR ERJGEYJ V ( kω) T R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) T R S.RESISTOR MCR0EZHJ 00 Ω (0) T R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (. kω) T R S.RESISTOR ERJGEYJ 0 V ( Ω) T R S.RESISTOR ERJGEYJ V (. kω) T R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) except [EXP-] T R S.RESISTOR ERJGEYJ V ( kω) except [EXP-] T R S.RESISTOR ERJGEYJ V ( kω) except [EXP-] B R S.RESISTOR ERJGEYJ V ( kω) except [EXP-] B R S.RESISTOR ERJGEYJ V ( kω) except [EXP-] B R S.RESISTOR ERJGEYJ V ( kω) except [EXP-] T R S.RESISTOR ERJYJ0U (00 Ω) T R S.RESISTOR ERJGEYJ 0 V ( Ω) B R S.RESISTOR ERJGEYJ V (0 Ω) B M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) [MAIN UNIT] REF ORDER R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ 0 V ( Ω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ 0 V ( kω) except [EXP-] B R S.RESISTOR ERJGEYJ 0 V (00 kω) except [EXP-] T R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ 0 V (00 Ω) B R S.RESISTOR ERJGEYJ V ( kω) T R S.RESISTOR ERJGEYJ 0 V ( kω) T R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ 90 V (9 Ω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ 0 V ( Ω) B R S.RESISTOR ERJGEYJ 0 V ( Ω) B R S.RESISTOR ERJGEYJ 0 V ( Ω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( Ω) B R S.RESISTOR ERAYKD V (0 kω) T R S.RESISTOR ERAYKD V (0 kω) T R S.RESISTOR ERJGEYJ 0 V (00 kω) T R S.RESISTOR ERAYED V T R S.RESISTOR ERAYED V T R S.RESISTOR ERJGEYJ V (0 kω) T R S.RESISTOR ERJGEYJ V (0 kω) T R S.RESISTOR ERJGEYJ V (0 kω) T R S.RESISTOR ERJGEYJ 0 V (00 kω) T R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ V (0 Ω) T R S.RESISTOR ERJGEYJ 0 V ( kω) T R S.RESISTOR ERJGEYJ V (0 kω) T R S.RESISTOR ERJGEYJ 0 V (00 kω) T R S.RESISTOR ERJGEYJ V (0 kω) T R S.RESISTOR ERJGEYJ V (0 kω) T R S.RESISTOR ERJGEYJ V (0 kω) T R S.RESISTOR ERJGEYJ 0 V (00 Ω) T R S.RESISTOR ERJGEYJ V ( kω) T R S.RESISTOR ERJGEYJ 00 V (0 Ω) T R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (0 kω) T R S.RESISTOR ERJGEYJ V (0 kω) T R S.RESISTOR ERJGEYJ V ( kω) T R S.RESISTOR ERJGE JPW V [EXP-] only B R S.RESISTOR ERJGE JPW V [EXP-] only T R S.RESISTOR ERJGE JPW V B R POSISTOR PTFM0BCQNB0 T R S.RESISTOR ERJGE JPW V B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGE JPW V T R S.RESISTOR ERJGEYJ 0 V (00 kω) T R S.RESISTOR ERJGE JPW V B R 0000 RESISTOR ERJGEYJ JPW T R S.RESISTOR ERJGE JPW V B R S.RESISTOR ERJGEYJ V ( kω) T R S.RESISTOR ERJGEYJ V ( kω) T C 0000 S.TANTALUM ECSTCYR B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB E 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 CH H 0J-T T C S.ELECTROLYTIC ECEVCA0SP T C 0000 S.TANTALUM TEESVA A 0ML B C S.TANTALUM ECSTIAXR B C S.CERAMIC C0 CH H 0J-T T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T T C S.CERAMIC C0 CH H 0J-T T C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T B C 0000 S.TANTALUM TEESVA A 0ML B C S.CERAMIC C0 CH H 00B-T T C S.CERAMIC C0 CH H 00D-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 CH H 00D-T T C S.CERAMIC C0 CH H 00C-T B S.=Surface mount -

27 [MAIN UNIT] REF ORDER C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 CH H 0J-T T C S.CERAMIC C0 CH H 0RB-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 CH H 0RB-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 CH H 00D-T T C S.CERAMIC C0 CH H 00C-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 090D-T T C S.CERAMIC C0 CH H 0J-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB E 0K-T T C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 090D-T T C S.ELECTROLYTIC ECEVCA00SR T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 00D-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 CH H 90J-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C 0000 S.ELECTROLYTIC ECEVCA00SR T C S.CERAMIC C0 JB A 0M-T B C S.CERAMIC C0 CH H J-T B C S.CERAMIC C0 CH H J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0RC-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 00C-T B C S.CERAMIC C0 JB H K-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 00J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C 0000 S.ELECTROLYTIC ECEVCA0SP T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 CH H 00C-T B C 0000 S.ELECTROLYTIC ECEVCA00SR T C S.CERAMIC C0 CH H 00C-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 00C-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H RB-T B C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 00C-T B C S.CERAMIC C0 CH H 00C-T B C S.CERAMIC C0 JB H 0K-T B M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) [MAIN UNIT] REF ORDER C S.CERAMIC C0 CH H J-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 CH H 00B-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 JB H 0K-T B C 0000 S.ELECTROLYTIC ECEVCAUP T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 CH H RB-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C 0000 S.ELECTROLYTIC ECEVCA0UP T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T T C 0000 S.ELECTROLYTIC ECEVCAUP T C S.CERAMIC GRMMCHR0CYL T C 0000 S.ELECTROLYTIC ECEVCA00SR T C S.CERAMIC C0 CH H 00C-T B C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T B C 0000 S.ELECTROLYTIC ECEVHA00SR T C S.CERAMIC C0 CH H J-T B C S.CERAMIC C0 CH H 00C-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C 0000 S.ELECTROLYTIC ECEVHA00SR T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC GRMMCHR0CYL T C S.CERAMIC C0 CH H 0J-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T B C S.ELECTROLYTIC ECEVCA0UP T C S.ELECTROLYTIC ECEVCA0SP T C S.CERAMIC GRMMCHR0CYL T C S.CERAMIC C0 CH H 0J-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 CH H 0J-T T C S.ELECTROLYTIC ECEVAAUP T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC GRMMCH9R0DV0L T C ELECTROLYTIC MV 00 HC T C S.CERAMIC GRMMCH0JV0L T C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC GRMMCH0JV0 T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB E 0K-T T C S.CERAMIC C0 JB E 0K-T T C 0000 S.CERAMIC GRMMCH90JV0L T C S.CERAMIC GRMMCH0JV0L T C S.CERAMIC C0 CH H RC-T T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC GRMBRJ0KY0L T C 0000 S.CERAMIC GRMMCH0JV0L T C S.CERAMIC C0 JB H 0K-T T C S.ELECTROLYTIC ECEVCA00SR except [EXP-] T C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 JB H 0K-T B C 0000 S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 JF C 0Z-T B C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T B C S.TANTALUM TEESVB C 0ML B C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T S.=Surface mount -

28 [MAIN UNIT] REF ORDER C 0000 S.TANTALUM ECSTEYR T C S.CERAMIC C0 JB E 0K-T T C 0000 S.TANTALUM TEESVA C ML T C 0000 S.ELECTROLYTIC ECEV0JA0SR T C S.ELECTROLYTIC ECEVHA00SR T C S.TANTALUM ECSTVYR B C 0000 S.ELECTROLYTIC ECEVHAN00R T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H K-T B C S.CERAMIC C0 JB H K-T except [EXP-] T C S.CERAMIC C0 JB H 0K-T B C 0000 S.CERAMIC C0 CH H 0J-T B C 0000 S.CERAMIC C0 JB A K-T B C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB A 0M-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T C S.CERAMIC C0 JB H 0K-T T J 0000 CONNECTOR PJ-000P- <KUO> B J 0090 S.CONNECTOR BB-ZR-SM-TF T J 0000 CONNECTOR HSJ-0-00 B J 000 S.CONNECTOR T W CABLE OPC-0 (P=0. N= L=0) W JUMPER ERDST0 W CABLE OPC- <CMI> - HM-V [MAIN UNIT] REF ORDER IC 0000 S.IC µpdag--e B IC 0000 S.IC MC0BF-EL B IC S.IC S-0CLUA-B-T B Q S.TRANSISTOR SC-BL (TER) B Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR DTAEUA T0 B Q S.TRANSISTOR SA-GR (TER) B Q S.TRANSISTOR SA-GR (TER) B Q S.TRANSISTOR SA-GR (TER) B Q S.TRANSISTOR SA-GR (TER) B Q S.TRANSISTOR SC-BL (TER) B Q S.TRANSISTOR DTBZK T B D S.ZENER MA0-M (TX) B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D S.DIODE SS TE- B D 0000 S.ZENER MA09-M (TX) B D 0000 S.ZENER MA09-M (TX) B D 0000 S.ZENER MA09-M (TX) B D S.DIODE SS TE- B X CERAMIC CSBLB00KJT-B0 (CSB00J00T) B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT T EP 9000 S.BEAD MMZ0Y 0BT T EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT T EP 9000 S.BEAD MMZ0Y 0BT B EP TUBE IRRAX 0. (d) L= mm EP PCB B 0C EP BEAD FSRH0900RN000B [USA], [EUR], [EUR-] only EP BEAD FSRH0900RN000B [USA], [EUR], [EUR-] only L S.COIL MLF0D RK-T B L S.COIL MLF0D RK-T B R S.RESISTOR MCR0EZHJ. kω B R S.RESISTOR MCR0EZHJ. kω B R S.RESISTOR MCR0EZHJ. kω B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( MΩ) B R S.RESISTOR ERJGEYJ 0 V (00 Ω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR MCR0EZHJ. kω B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B C S.CERAMIC C0 JB H K-T B C 0000 S.ELECTROLYTIC ECEVCA0UP B C S.CERAMIC C0 CH H 0J-T B M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) S.=Surface mount -

29 [MAIN UNIT] REF ORDER C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.ELECTROLYTIC ECEVCA00SR B C S.CERAMIC C0 JB E 0K-T B C 0000 S.ELECTROLYTIC ECEVCA00SR B J 000 CONNECTOR 00L-PC <KIN> B DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LTEPA T DS S.LED LTEPA T MC MICROPHONE EM-0 T S SWITCH SKHHLP0A B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 0900 PCB B B [MAIN-A UNIT] REF ORDER D 0000 S.ZENER MA09-M (TX) B D 0000 S.ZENER MA09-M (TX) B D 0000 S.ZENER MA09-M (TX) B X S.CERAMIC EFOS9E B L S.COIL MLF0D RK-T B L S.COIL MLF0D RK-T B R S.RESISTOR MCR0EZHJ. kω B R S.RESISTOR MCR0EZHJ. kω B R S.RESISTOR MCR0EZHJ. kω B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ V (0 Ω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR MCR0EZHJ. kω B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (0 kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ V (. kω) B R S.RESISTOR ERJGEYJ 0 V (0 kω) B R S.RESISTOR ERJGE JPW V B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B [MAIN-A BOARD] REF ORDER IC 0090 S.IC µpd90mc-0-a-e B IC 0000 S.IC BDG-TR B IC 0000 S.IC BRL0FV-WE B Q S.TRANSISTOR SC-BL (TER) B Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR DTAEUA T0 B Q S.TRANSISTOR SA-GR (TER) B Q S.TRANSISTOR SA-GR (TER) B Q S.TRANSISTOR SA-GR (TER) B Q S.TRANSISTOR SA-GR (TER) B Q S.TRANSISTOR SC-BL (TER) B Q S.TRANSISTOR DTBZK T B D S.ZENER MA0-M (TX) B D S.DIODE ISS00 TE B D S.DIODE ISS00 TE B D S.DIODE ISS00 TE B D S.DIODE ISS00 TE B D S.DIODE ISS00 TE B D S.DIODE ISS00 TE B D S.DIODE ISS00 TE B D S.DIODE ISS00 TE B D S.DIODE ISS00 TE B M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) C S.CERAMIC C0 JB H K-T B C 0000 S.ELECTROLYTIC ECEVCA0UP B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 JB H 0K-T B C S.ELECTROLYTIC ECEVCA00SR B C S.CERAMIC C0 JB E 0K-T B C 0000 S.ELECTROLYTIC ECEVCA00SR B J 000 CONNECTOR 00L-PC <KIN> B DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T S.=Surface mount -

30 [MAIN-A UNIT] REF ORDER DS S.LED LNG-(TR) T DS S.LED LNG-(TR) T DS S.LED LTEPA T DS S.LED LTEPA T - UT-0 (OPTIONAL UNIT) [MAIN UNIT] REF NO. ORDER NO. IC 0000 S.IC LCM-TLM B IC S.IC TCWFU (TEL) B MC MICROPHONE EM-0 T X XTAL CR- (.90 MHz) T S SWITCH SKHHLP0A B L S.COIL MLF0A RM-T B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 9000 S.BEAD MMZ0Y 0BT B EP 0900 PCB B 09A R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V ( kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ 0 V (00 kω) B R S.RESISTOR ERJGEYJ V ( kω) B R S.RESISTOR ERJGEYJ 9 V (.9 kω) B C S.TANTALUM ECSTAYR B C S.CERAMIC C0 JB H 0K-T B C S.CERAMIC C0 CH H 0J-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 JB E 0K-T B C S.CERAMIC C0 JB E 0K-T B J 000 S.CONNECTOR AXN0C0P B EP PCB B 9A M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) S.=Surface mount -

31 - UT- (OPTIONAL UNIT) [MAIN UNIT] REF ORDER IC S.REG S-CAMC-CN-T T IC 0000 S.REG RNB-TR T IC0 000 S.IC ADARS T IC S.IC TCSHU0FU (TEL) B IC S.IC TCS0FU (TER) T IC S.IC AMBE-00 T IC S.IC TCSH0FU (TEL) B IC S.IC S-09CNMC-GY-T B IC S.IC HDFFP B IC S.IC NJMV-TE B IC 0000 S.IC CMX9AD B IC S.IC NJM0V-TE B IC S.IC TCSF (TER) B IC S.IC MAXEAE-T T Q S.TRANSISTOR SA-GR (TER) T Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR DTCEUA T0 B Q S.TRANSISTOR XP (TX) B Q S.TRANSISTOR XP (TX) B Q S.TRANSISTOR SA-GR (TER) B Q S.TRANSISTOR DTCEUA T0 B D S.DIODE MAS-(TX) T D S.DIODE MAS-(TX) B X S.XTAL CR-0 (. MHz) T X S.XTAL CR-0 (9.0 MHz) T L S.COIL MLF0A R0K-T T L S.COIL MLF0A R0K-T B L S.COIL MLF0A R0K-T B L S.COIL MLF0A R0K-T T R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR MCR0EZHJ Ω (0) T R S.RESISTOR ERJGEJ X (0 Ω) T R S.RESISTOR ERJGEJ 0 X ( kω) T R S.RESISTOR ERJGEJ 0 X (00 Ω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ 0 X (00 Ω) B R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR ERJGE-JPW B R S.RESISTOR ERJGEJ 0 X (00 kω) T R S.RESISTOR ERJGEJ 0 X (0 kω) T R S.RESISTOR ERJGE-JPW T R S.RESISTOR ERJGEJ 0 X ( MΩ) B R S.RESISTOR ERJGEJ 0 X (00 Ω) B R S.RESISTOR ERJGEJ 0 X ( kω) T R S.RESISTOR ERJGEJ 0 X ( kω) T R S.RESISTOR ERJGEJ X ( kω) T R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ X (. kω) B R S.RESISTOR ERJGEJ X (. kω) B R S.RESISTOR ERJGEJ X (. kω) B R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ 0 X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGE-JPW B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (00 kω) B M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) [MAIN UNIT] REF NO. ORDER NO. R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) T R 0000 S.TRIMMER EVM-WSX0 B (0) T R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ 9 X (90 kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ X ( kω) B R S.RESISTOR ERJGEJ 0 X (00 Ω) T R S.RESISTOR ERJGEJ 0 X (00 Ω) T R S.RESISTOR ERJGEJ 0 X (00 Ω) T R S.RESISTOR ERJGEJ 0 X (00 Ω) T R S.RESISTOR ERJGEJ 0 X (00 Ω) B R S.RESISTOR ERJGEJ 0 X (00 Ω) T R S.RESISTOR ERJGEJ 0 X (00 kω) B R S.RESISTOR ERJGEJ X (. kω) B C 0000 S.TANTALUM TEESVA A 0ML T C 0000 S.TANTALUM TEESVA A 0ML T C 0000 S.CERAMIC ECJ0EBE0K B C S.TANTALUM TEESVA A ML T C S.CERAMIC ECJ0EBA0K T C S.TANTALUM TEESVA A 0ML T C S.CERAMIC ECJ0EBA0K T C 0000 S.TANTALUM TEESVA C ML T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBCK T C S.CERAMIC ECJ0EBA0K T C 0000 S.TANTALUM TEESVA A 0ML T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBAK B C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K T C S.TRIMMER TZYZ00A00 T C S.CERAMIC ECJ0ECH00C T C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0EBA0K T C S.TANTALUM TEESVA C 0ML T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K T C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0ECH00C B C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0ECH0J T C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0EBC0K B C S.TRIMMER TZYR00A00 T C S.CERAMIC ECJ0EBA0K B C S.CERAMIC C0 JB A 0K-T B C S.CERAMIC ECJ0ECH0J B C S.CERAMIC C0 JB A 0K-T B C S.CERAMIC ECJ0EBA0K B C S.CERAMIC ECJ0EBAK B C S.CERAMIC ECJ0EBAK B C S.CERAMIC ECJ0EBHK T C S.CERAMIC C0 JB A 0K-T B C S.CERAMIC ECJ0EBA0K B C S.CERAMIC C0 JB A 0K-T B C S.CERAMIC ECJ0EBA0K B C 0000 S.CERAMIC ECJ0EBE0K T C 0000 S.CERAMIC C0 JB A K-T T C 0000 S.CERAMIC C0 JB A K-T T C 0000 S.CERAMIC C0 JB A K-T T C 0000 S.CERAMIC C0 JB A K-T T C S.CERAMIC C0 JB E 0K-T T C S.TANTALUM TEESVA A 0ML B J0 000 S.CONNECTOR AXN0C0P B EP 0900 PCB B 0B S.=Surface mount - 9

32 SECTION MECHANICAL PARTS AND DISSASEMBLY - IC-00H [CHASSIS PARTS] REF. NO. [LOGIC UNIT] REF. NO. ORDER NO. DESCRIPTION QTY. J 0000 Connector 0- R 0000 Variable resistor EVU-FAF0 A R 0000 Variable resistor EVU-FAF0 B S Switch EVQ-VENF0B DS LCD IS0E00V EP 900 LCD contact SRCN-9-SP-N-W- MP front panel MP reflector MP button MP button MP LCD filter MP Screw PH BT M 0 ZK MP front plate MP 000 Knob N MP9 000 Knob N MP 9000 Sponge (HR) MP Himelon sheet (CM) [MAIN UNIT] REF. NO. ORDER NO. ORDER NO. DESCRIPTION DESCRIPTION QTY. J 0000 Connector MR-DS-E 0 SP Speaker VS--0A MP chassis MP cover MP SP rubber MP 9000 Thermally sheet (AP) MP 0000 Screw PH BT M NI-ZU MP Screw FH M. ZK MP 0000 Cap bolt M 0 ZK QTY. J 0000 Connector PJ-000P- J 0000 Connector HSJ-0-00 W DC power cable OPC- MP VCO case MP VCO cover MP Filter spacer MP M-holder [ACCESSORIES] REF. NO. - HM-V [CHASSIS PARTS] REF. NO. ORDER NO. F Fuse FGB 0A W DC power cable OPC- MC Microphone HM-V MP mobile bracket MP Flange bolt M NI MP Screw PH M (+-) MP Screw PH A M MP Flat washer M NI BS MP Spring washer M MP Nut M MP Mic hanger [USA] only MP Insulation sheet (HS) MC ORDER NO. DESCRIPTION W MP F MP MP9 DESCRIPTION MP MP MP MP MP MP QTY. QTY. W Cable OPC- MP front panel [HM-] front panel (A) [HM-S] front panel (B) [HM-V] MP rear panel MP PTT button MP LED lens MP SW rubber MP keyboard [HM-] keyboard (A) [HM-S] keyboard (B) [HM-V] MP Screw PH BT M ZK MP Screw PH BT M ZK Screw abbreviations BT, A: Self-tapping PH: Pan head FH: Flat head ZK: Black BS: Brass NI: Nickel NI-ZU: Nickel-Zinc [MAIN/MAIN-A UNIT] REF. NO. ORDER NO. DESCRIPTION QTY. J 000 Connector 00L-PC S Switch SKHHLP0A MC Microphone EM-0 -

33 MP (C) HM-V MAIN/MAIN-A UNIT S (M) MP9 (C) MP (C). ( /) 0.0 ( /).0 ( /) Unit: mm (inch) J (C) MP (C) Unit abbreviations (C):CHASSIS PARTS (M): MAIN/MAIN-A UNIT MP (C) MP (C). ( /) MC (M) MP (C) MP (C) MP (C) J (M) MP (C) MP (L) MP (L) R (L) MP (C) W (C) J (L) MAIN UNIT J (M) J (M) R (L) MP (L) A W (M) IC-00H Unit abbreviations (C):CHASSIS PARTS (L): LOGIC UNIT (M): MAIN UNIT MP (C) MP (L) MP (L) EP (L) DS (L) MP (L) MP (L) S9 (L) LOGIC UNIT A MP (M) MP (M) B MP (C) MP (M) MP9 (L) MP (L) MP (C) MP (C) MP (L). ( /) 0.0 ( /) SP (C) B MP (L).0 ( /) 0. ( /) 0.0 ( /) MP (C) 0.0 ( 9 /) Unit: mm (inch).0 ( 9 /) MP (C) -

34 SECTION SEMI-CONDUCTOR INFORMATION TRANSISTORS AND FET S DIODES SA Y SAA T0 R SA GR SB9 T DK SC BL (Symbol: AEY) (Symbol: FR) (Symbol: SG) (Symbol: DK) (Symbol: BL) SS SS SS00 DA TL DANTL (Symbol: A) (Symbol: A) (Symbol: K) (Symbol: N) B E C B E C B E C B C E B E C Yellow A C A C A A C SC9 T SC SC BL SC GR SC B (Symbol: QK) (Symbol: R) (Symbol: LL) (Symbol: LG) (Symbol: AB) DSAA HVC0B HVCB HVCB HVUTRF (Color: Green) (Symbol: B0) (Symbol: B) (Symbol: B9) (Symbol: P) B C E B E C B E C B E C B E C green A C A C A C A C SC T R SC0 SC TLS SC SK09 TL (Symbol: R) (Symbol: JT) (Symbol: BS) (Symbol: C) (Symbol: FJ) MAS0 MAS MAS000 L MA MA (Symbol: S) (Symbol: A) (Symbol: K) (Symbol: B) (Symbol: MU) B E C B E C B E C E C B B E C S D G A C A C A C A C SK99 T U DTA ZU T0 DTAEUA T0 DTATUA DTA EE TL (Symbol: U) (Symbol: ) (Symbol: ) (Symbol: 9) (Symbol: ) MA0 M MA09 M RD0E B XBA0 XBA0 (Symbol: -) (Symbol: 9-) (Symbol: 0 B) (Symbol: T) D G B C B C B C B C A C A C A C S G E E E E DTAEUA T0 DTBZK DTCEUA T0 DTCZUA DTCEUA T0 (Symbol: ) (Symbol: G) (Symbol: ) (Symbol: E) (Symbol: _) B B B B B C C C C C E E E E E DTCTU T0 UMGN XP0 XP0 AB (Symbol: 0) (Symbol: G) (Symbol: C) (Symbol: N) B B C E C E C C E B B E B E B C C E B C -

35 SECTION 9 BOARD LAYOUTS 9- LOGIC UNIT TOP VIEW PWR VOL DIAL S.MW/MW MICROPHONE SQL SET/LOCK MONI/ANM LOW/DUP TONE/T-SCAN M/CALL/PRIO V/MHz/SCAN BANK/OPT J MICUD PTT MIC MICIN V EXTMIC MICE to the microphone 9 -

36 BOTTOM VIEW (LOGIC UNIT) 09 0 J J OPV OPV OPV OPT OPT OPT SIG_OUT BUSY MIC_IN MIC_OUT PTTO PTTI OPSCK SI OPSO CCS REFMOD AFOUT DETO RX_MUTE RX TX 0 to the optional unit to the MAIN unit J 9 - TX RX CLONE POWON LVIN VOLOUT CV EXSTB SO PLLCK PLLSTB OE BSHIFT DIGI_W REF_V UNLK MODIN TEMP SCK OPV MIC MIC IDET DETO CTCSS SD NOIS

37 EP 9- MAIN UNIT TOP VIEW EP 9 - black red DC power 9 J to the LOGIC unit J TX PWRON VOLOUT SO PLLSTB BSHIFT REF_V MODIN SCK DETO SD RX CLONE LVIN CV EXSTB PLLCK OE DEGI_W UNLK TEMP OPV IDET CTCSS NOIS ANT CHASSIS unit J

38 BOTTOM VIEW (MAIN UNIT) DATA SP

39 9- HM-V TOP VIEW (MAIN UNIT) NOTE: HM-V s main unit has versions (MAIN or MAIN-A). MAIN unit employs old type CPU, MAIN-A unit employs new type one. Make sure to be used whether MAIN unit or MAIN-A unit before servicing. TOP VIEW (MAIN-A UNIT) VFO/LOCK MR/CALL BANK/OPTION VFO/LOCK MR/CALL BANK/OPTION F- F- F- F- DTMF-S FU DTMF-S FU A A B B 9 C 9 C * 0 # D * 0 # D 9 -

40 BOTTOM VIEW (MAIN-A UNIT) BOTTOM VIEW (MAIN UNIT) PTT PTT J MDATA MIC PTT MU/D E MICE MVSW MV to the IC-00H LOGIC unit J J MDATA MIC PTT MU/D E MICE MVSW MV to the IC-00H LOGIC unit J 9 -

41 9- HM-TN TOP VIEW BOTTOM VIEW (HM-TN) UP DN 0 UP DOWN LOCK PTT 0 J V MICE U/D PTT MIC HANG to the IC-00H LOGIC unit J 9 -

42 SECTION 0 BLOCK DIAGRAMS 0- IC-00H IC NJM0V REF OSC IC LV0V CP PLL IC OUT (LOOP-SW) Q XP0 LOOP FIL SHIFT VCO REG Q SC Q SC Q SC Q DTAZU D MAS Q SC D HVCB D MAS0 MOD LO AMP Q9 SC BUFF Q SC Rx MHz Tx MHz D MA D MA TX/RX SW T PRE DRIVE Q SC T DRIVE AMP Q SC9 D0 SS 0-00mW IC0 S-AV PWR AMP CURRENT DET for CPU HV D XBA0 D9 XBA0 D HVUTRF ANT SW LPF ANTENNA Tx* MHz Rx* MHz *Depended on versions Q SC D HVCB X CR-9 (.MHz) Q DTAZU AM MODE REG Q0 SK09 DC AMP LPF IC SNAHCGHDCT IC TAFN Q SC D,D MAS0 RV IF DET-IC (nd-mix,if-amp, NOISE-AMP,FMDET, RSSI,SQLSW) X CDB0C BUFF Q SC RV Q SC0 AGC IF AMP D9 DA LIMIT FI FL- FI FL- XTAL BPF.MHz LPF Q9 SK99 D9 HVC0B D0 HVC0B D HVC0B BPF RV D MAS Q SK99 RF AMP D HVC0B BPF APC CTRL ICa NJM0AV Q DTAEU IC NJM0V Q9,Q0 DTCEU ICa NJM0AV D MAS T T T AGC T SQLATT ATT D SS LIMIT PWR DET D MA D MA MAIN BSHIFT AM/FM SELECT DETO Q,Q XP0 AM DET AGC AGC CERAMIC BPF FI CFWS0F W/N SW CERAMIC BPF FI CFWS0HT Q DTAEU Q SC D-D MAS *ONLY W/N Ver. SQLIN DETO DTC/FC MODIN D/A CTCSS IC MFP RV R REG RXC Q DTBZK TXC T T REG Q SA Q SC SWHV + REG Q DTBZK Q DTCEU + REG IC TA0F CV CV REG IC TAL0F HV W LOGIC DETOUT(DIGI_AFI) IC CD0BPER AN DI_SEC ANALOG SEL ICc NJM90V HPF MOD_I IC CD0BPWR DI/AN SW IC CD0BPWR DI/AN SW EXP PORT IC CD09BPWR PWRON HVSW Q SC Q0 DTATUA Q DTCZU REVERSE & OVER VOLTAGE PROTECT D0 RD0E D DSAA EXT MIC MIC JACK MIC SW IC TCSF D DAN IC TAS9F D MA09 MICDATA BUFF Q SC D MAS PTT SW ICA NJM90V MIC AMP IC0 CD0BPWR ALC SW ALC THROUGH SW IC0 CD0BPWR ALC AMP Q DTAEE IC0 CD0BPWR IC ANMS ALC PS THROUGH ALC SW Q SA THROUGH IC CD0BPWR SECRET SW SECRET SECRET SW SECRET IC CD0BPWR Q XP0 ICd NJM90V HPF CUTOFF SHIFT DIGI,AN TXAF Q UMGN RXAF ANALOG SW IC CD0BPWR DS IS0E LCD DIGI,AN MIC_OUT DIGITAL MOD OUT ANALOGUE MOD IN/MIC_IN AFOUT(DIGI_AFOUT) VOLIN ICb NJM90V T/R AFOUT CTCSS/ LPF TONE DIMMER CUTOFF SHIFT Q SA Q,Q,Q SC DS-DS SECC Q DTCEU SIG_OUT TX_DIGI LPF D-D9,D DAN INT/KEY D SS MATRIX D-D,D,D, D, SS00 CTCSS SW IC SNAHCGHDCT Q DTCEU DIGI VOL VOLOUT SQL AF MUTE Q9 SC DIAL Q SC EMPHASIS SW AF AMP SWHV IC9 TAAP AF OUT SP CLONE J EXT SP-JACK J RS-C TX/RX/ LPF CTCIN X CR-9 D MAS0 CLOCK SHIFT SD/NOIS LVIN DETO CPU IC M00 RESET IC BDFVE EEPROM IC HNXTI CLONE BUFF CV Q DTCTU D DA D MAS Q SC Q SB9 OPTION REG OPTION CONNECT Q SA REFMOD AMP REG AMP AN IC TCSF Explanatory notes VOLTAGE LINE TX RX COMMON SP DATA/CONTROL/BUS,ets OP_PS 0 -

43 0- HM-V Q SC Q9 DTBZK Q SC D MA0 V (MAIN) IC S-0CLUA D SS (MAIN-A) IC BDG MV REG CTRL V REG RESET DS-DS LNG D,D MA09 BACK LIGHT PROTECTO MIC MIC MDATA Q DTCEU Q DTAEU DATA BUFF PROTECTO D MA09 DATA RESET CPU LED/ DRIVER Q,Q SA DS LTEPA (MAIN only) IC MC0BF MATRIX DRIVER IC µpdag (MAIN) µpd90 (MAIN-A) LED/ DRIVER Q,Q SA DS0 LTEPA D,D SS (MAIN only) KEY MATRIX EE-PROM IC BRL0FV (MAIN -A only) Explanatory notes D-D,D9-D SS (MAIN) SS00 (MAIN-A) DATA BAS COMMON TX VOLTAGE LINE 0 -

44 VOLTAGE LINE Explanatory notes TX LINE RX LINE DIGITAL LINE COMMON LINE P9/AN P9/AN P9/AN P9/AN P9/AN P9/AN P90/AN0 P/TAIN P/TAOUT P/TAIN P/TAOUT P/TAIN P/TAOUT P/TAIN/INT P0/TAOUT/INT CNVSS XCIN XCOUT RESET XOUT VSS XIN VCC P/NMI P/INT P/INT P/INT0 P/CTS/RTS P/CLK P/RXD/SCL P0/TXD/SDA P/TXD P/RXD P/CLK P/CTS/RTS/C P/TXD0 P/RXD0 P/CLK0 P0/CTS0/RTS0 P/CKOUT P/INT P/TBIN P/TBIN P/TBIN P/TBIN P/TBIN P0/TB0IN P/TAIN/INT P/TAOUT/INT P/TAIN P/TAOUT P/TAIN P/TAOUT P/TA0IN P0/TA0OUT P P P/KI9 P/KI P/KI P0/KI P/KI P/KI P/KI P/KI P/KI P/KI0 P/KI9 P0/KI P/KI P/KI P/KI P/KI P/KI P/KI P/KI P0/KI0 SEG/P0 SEG/P0 SEG/P0 SEG/P0 SEG/P0 SEG/P0 SEG/P0 SEG0/P00 SEG9/P SEG/P SEG/P SEG/P SEG/P VCC SEG/P VSS SEG/P SEG/P0 SEG/P SEG0/P SEG9/P SEG/P SEG/P SEG/P SEG/P SEG/P0 SEG/P0 SEG/P0 SEG/P0 SEG0/P0 SEG9/P0 SEG/P0 SEG/P0 SEG/P00 SEG SEG SEG SEG SEG SEG0 SEG9 SEG SEG SEG SEG SEG SEG SEG SEG SEG0 C C VL VL VL VSS P/DA P/DA AVSS COM COM COM COM0 P0/ADTRG/DAO VREF AVCC P9/AN IC M00MA-RP to the MAIN unit J J NOIS SD CTCSS DETO IDET MIC MIC OPV SCK TEMP MODIN UNLK REF_V DIGI_W BSHIFT OE PLLSTB PLLCK SO EXSTB CV VOLOUT LVIN POWON CLONE RX TX J PTTI PTTO MIC_OUT MIC_IN BUSY SIG_OUT OPT OPT OPT OPV OPV OPV TX RX RX_MUTE DETO AFOUT REFMOD CCS OPSO SI OPSCK J to the microphone MICIN MIC MICE PTT EXTMIC MICUD V EP EP EP EP EP EP EP EP C D MA09 C C0 C C C p R k R 0k D MA09 R 0k R 0k IC TAS9F R 00k R.k R 00k R9 k R0 0k D MAS Q SC R 0k R 0k R0 0k R 00k R0 00k R9 00k R k C9 0.0 C9 0. R k Q SC Q SB9 D MAS C0 0 R0 0 R9 C0 0 R R 0k D DAN EXTM R0 k MICUD R0.k OPV OPV EXSTB OPSCK SI OPSO OPT OPT OPT CCS AFOUT R 00 SIG_OUT DETO RX_MUTE BUSY RX TX EP9 EP0 PTTO PTTI R k R k OP_PS NOIS SD IDET OPV SCK TEMP UNLK REF_V DIGI_W BSHIFT OE PLLSTB PLLCK SO EXSTB CV CV RX TX C C p C C C0 C9 C C C C0 p REMO PTT R k R 0k C 0 R k IC TCSF R 00k C IC NJM90V C 0.0 R0 00k R09 k CP R0 k [USA] k [OTHER] C9 0p R0 0k IC0 CD0BPWR 9 0 I/O O/I O/I CONT CONT VSS I/O I/O O/I O/I CONT CONT VDD I/O ALC C9 C 0. R 00k IC CD0BPWR 9 0 I/O I/O I/O I/O O/I O/I CONT CONT VSS O/I O/I CONT CONT VDD Q DTAEE C 0.0 R0 k C 0.00 R 00k C9 - + IC NJM90V R9 0k R9 0 R.k C C 0. Q UMGN AN DIGI DETO IC NJM90V R9 k C 0. C 0.0 C 0.00 R.M C 0.00 R9 k R.9k IC CD0BPWR 9 0 I/O I/O I/O I/O O/I O/I CONT CONT VSS O/I O/I CONT CONT VDD R SECRET THROUGH MMUT MICS IC ANMS INPUT OUTPUT VCC DET C 0. R 0 C 0 R M C 0 Q SA R 00 R k R k C9 THROUGH IC CD0BPWR 9 0 I/O I/O I/O I/O O/I O/I CONT CONT VSS O/I O/I CONT CONT VDD DIGI R k R k R 0k C99 0. R 0 C00 C9 MOD_I C 0. R 00 AN R k + - IC TCSF R0 k R M C9 R 0k R0 k Q SA R k IC SNAHCGHDCT COM INH VCC Y0 Y A DIGI R 0k R k C0 SQLV SQLV R EVU-FAF0A R EVU-FAF0B CV C 0.0 R k R 0k C 0.0 C 0.00 R k Q XP0 R k C R.k R k C 0.0 CTCIN CTCIN R 00k C 0.00 CT SUB VOUT VDD IC BDFVE-TR C9 0. C 0.0 RESET R0 0k IC HNXTI A0 A A VSS VCC WP SCL SDA C R 00k R k ESCK ESDA R0 k C p S PWR D DA PWRSW Q DTCTU R9 k C 0.0 CLIN MICUD SD C9 LVIN TEMP COLOR C 0.0 MOD_I VOLIN AFON RMUT C9 0. R M R 0k R0 9k R9 0k C 0.0 C. C 0.0 R k R 0k R 0k R 0k C 0.00 Q DTCEU R 0k R k C 0p + - IC NJM90V C 0.0 R9 k R9 0k R9 9k C. R k R9 k S9 EVQ-VENF0 DIAL A B COM DS IS0E S S S S S S S S S9 S0 S S S S S S S S S9 S0 S S S S S S S S S9 S0 S S S S S S S S S9 S0 IDET R 9k R k C 0.0 R 0k R k R0 k R k SEG SEG9 SEG0 SEG SEG SEG SEG SEG SEG SEG SEG SEG9 SEG0 SEG SEG SEG SEG SEG SEG COM COM COM COM SEG SEG SEG SEG SEG SEG SEG SEG SEG9 SEG0 SEG SEG SEG SEG SEG SEG SEG SEG SEG9 SEG0 SEG SEG SEG SEG SEG SEG SEG SEG SEG9 SEG0 SEG SEG SEG SEG SEG SEG COM COM COM COM DIM0 DIM DIM OE R k R 0 X CR-9 R M C p C9 p C p R k R k C0 0.0 D MAS0 R k C 0.0 C 0p C 0.0 Q DTCEU DUSE C 0 C 0. R k R 0k RESET PWRSW R 00k TX_DIGI DICK DIUD SIG_OUT DICK DIUD CLIN CLOUT BUSY PWRON DIGI_W BSHIFT PLLSTB PLLCK EXSTB UNLK REMO CCS MICS MMUT AFON RMUT IS0 IS IS KS KS KR KR KR KR0 PTT SECRET DI_SEC TX_DIGI SO OPSCK OPV OPV PTTI PTTO RX_MUTE R k[exp/-] only R M R M R M EXTMIC R 00k R k EXTMIC DUSE ESCK ESDA OP_PS AN DIGI THROUGH ALC OPT OPT OPT SEG SEG SEG SEG SEG SEG SEG SEG SEG9 SEG0 SEG SEG SEG SEG SEG SEG SEG R G DS SECC G R DS SECC G R DS0 SECC G R DS SECC G R DS SECC G R DS9 SECC G R DS SECC G R DS SECC G R DS SECC G R DS SECC G R DS SECC G R DS SECC Q SA R R 0 R9 90 R9 R9 0 R00 0 Q SC Q SC Q SC R9.k R0 k R k R.k R 0k R.k DIM0 DIM DIM COLOR KS D DAN S SKQDPA M-CALL/PRIO V-MHz/SCAN S SKQDPA D9 DAN SET/LOCK S SKQDPA MONI/ANM S SKQDPA KS D DAN LOW/DUP S SKQDPA TONE/T-SCAN S SKQDPA D DAN BANK/OPT S0 SKQDPA S-MW/MW S SKQDPA IS IS IS0 D COMEXP D TXFREF D SCRAM D D BAND BAND D D BAND BAND D D ANI W/N R k D D D D D D D D D SS SS00 SS00 SS00 SS00 SS00 SS00 SS00 SS00 [TPE], [KOR], [EUR-] except [EXP/-] [EXP/-] [EUR/-], [EXP/-] [TPE], [KOR], [EXP/-] [TPE], [EXP/-] [TPE], [KOR] except [EXP-] [EXP/-] C 0.0 CV CV CV CV CV CV CV CV CV CV CV CV CV V+ IC NJM90V C 0.0 C 0.0 LVIN CLOUT PWRON R9 k BIAS BIAS BIAS DI_SEC C9 VOLIN R k R 00k R9 0k R0 M R k REF_V R 00k R.k C0 0.0 CV CV CV CV CV CV CV OPSO SI SCK NOIS R k R k EXTM MIC MIC_IN/ANALOGUE_MOD_IN MIC_OUT/DIGI_MOD_OUT AF OUT AFOUT DETO MODIN REFMOD SQLV VOLIN CTCSS VOLOUT MODIN CV POWON CLONE VOLOUT DETO/DIGI_AFI MIC_IN/ANALOGUE_MOD_IN MIC_OUT/DIGI_MOD_OUT DETO CV CV CV XIN CSHIFT DETO KR0 KS IS IS IS0 KR0 KR KR KR KS KS IS IS KR KR CV to the optional unit 0 KR LOGIC UNIT DETO CV MIC_IN/ANALOGUE_MOD_IN MIC_OUT/DIGI_MOD_OUT AF OUT IDET CV REF_V KS IS IS IS0 KR0 TX:.0V RX: 0V TX: 0V RX:.V.V.0V 0.V.V 0.V DIGITAL:.0V at ALC ON: 0.9V at ALC ON:.V at ALC ON:.9V.9V.9V.9V.9V.9V DIMMER DIM0 DIM DIM DIM- DIM- DIM- DIM- 0V 0V.0V 0V.0V.0V.0V 0V.0V.0V.0V.0V SECTION VOLTAGE DIAGRAMS - LOGIC UNIT -

45 - MAIN UNIT VOLTAGE LINE Explanatory notes TX LINE RX LINE COMMON LINE J SD DETO SCK MODIN REF_V BSHIFT PLLSTB SO VOLOUT PWRON TX NOIS CTCSS IDET OPV TEMP UNLK DEGI_W OE PLLCK EXSTB CV LVIN CLONE RX C 0.0 C C90 C C0 C9 EP EP J EP EP C R.k D MAS Q SC C0 C IC CD09BPWR 9 0 STR D CLK Q Q Q Q QS Q'S Q Q Q Q OE V+ SHIFT SHIFT C R k Q SC Q DTAZU R k R C D HVCB D MAS0 L 0µ L C0C- R0G C0 p R k Q SC R9.k C p R k C9 p Q SC L.µ R k C 0.p R 0 C C R.k R0.k D MAS0 C p C 0p R 0k C p Q SC L9.µ R k C 0.p R 0 C R0.k C L 0n D MAS0 C9 p C 0.0 L 0.µ R 00k L 0.µ C C R 0 Q9 SC C9 0p R9 00k C L 0.µ R 0 Q SC C0 p R0 00k C L 0.µ Q SC R 0 C TXC TXC C9 R 00k C 0. C R.k R.k Q SA Q SC C9 0 T C p L n C p C R9.k D MA R0.k C C R 0 R R 0 C C p L 9n R Q SC C9 R k L n R0 C90 p C p R D0 SS R k C R.k Q SC9 L n C C 0 C0 p R0 R9 0 R 9 R 0 IN VGG VDD OUT IC0 S-AV C R9 R9.k C R9 0 C R 0 C 0 C C C IC NJM0AV C C R9 0k L 0µ R9 k C00 L ZBFS0-PT L9 ZBFS0-PT L ZBFS0-PT L0 ZBFS0-PT C0 C 0. R0 00 C L0 µ D XBA0 D XBA0 C C p L n C p C90 p C9 p D MA D MA C9 p C9 p R.k R.k L 0.µ C9 C 9p L n L n C0 p C0 p R k R 00k C C R90 k R9 0k R0 0k R 0k R9 0k R9 00k C9 R 0k C0 L 0µ J J CHASSIS UNIT C9 Q9 DTCEU R 0R0 k Q0 DTCEU Q DTAEU R09.9k - + IC NJM0AV C9 C9 C 0. R0 k C R PTH9M0 R0 0k C9 TXC IDET IDET REF_V C 0.0 L9.µ C0 p R 0 R 0 Q SC0 R 0k R 00k C 0. D9 DA C9 0.p FI FL- C9 p FI FL- C R.k C0 C 0p R k L.µ Q9 SK99 R9 0 C R.k C0 R 0 R9 R0 0 C9 9p L0 n C p C p L n D MA R 0k L.µ C p C p L n D9 HVC0B C p C D0 HVC0B C9 p R9 0k C C 0.p C p R 0 C p L n C p D HVC0B R0 0k C C p C 0p C R 00 R0 k C.p L n C0 C R9 00k R k Q SK99 C 0.0 R 00 C C C0 R k R 0k C p L 0.µ D HVC0B R9 0k C0 C 0p L n C p R.k C.p D SS D HVUTRF D9 XBA0 L n C0 p C0 9p L n C C9 D MAS - + R 0k R9 00k C09 0. R 00k R0 k C T SQLATT T T T LVIN LVIN C. R 0 R 00 C 0 C C 0 R 90 R9 0k R9 0 Q0 SK09 R k R 00 R k C C TEMP Q XP0 R.k R M R 0k L µ C L0 µ DTC FC TEMP R k C 0. R 00k C R k R 0k C R0 k D HVCB C p C p X CR-9 C p C p R.k C0 p Q SC C 0. R 0k R 0k IC LV0V 9 0 XIN CL DI CE VCCR PI R TEST XOUT OUT PE VCCD D PDN PDP CP PLLCK PLLDATA PLLSTB C9 EP EP C9 0. C9 PLLCK PLLDATA PLLSTB C p R 00 C p C 9p C0 L n UNLK UNLK 9 0 OSCIN OSCOUT MIXOUT VCC IFIN DEC FILOUT FILIN MIXIN N-REC N-DET RSSI IFOUT QUAD AFOUT IC TAFN C 0.0 C C 0. R.k C C p EP C p EP C p R 0 R.k C C 0p C 0p R k R9.k C 0. C 0. R 0 (only W version) D MAS R k O I R k R 0 (only W version) D MAS FI CFWS0F D MAS O I D MAS FI CFWS0HT R9 k R k R k R 00k C 0.0 C0 0 Q DTAEU C 0 C C9 R 0 C0 C0 R 00k R k C 0. R k Q SC C 0. R.k C9 R 00k X CDB0C R.k C00 p C IC SNAHCGHDCT COM INH VCC Y0 Y A R 0 C Q DTAZU DETO DETO C 0.0 Q XP0 R k R0 0k R0 0k C R0 00k R0 0k C. Q XP0 C9 0.0 R0 0k R0 k R0 0 C 0. R09 00 C 0. W/N W/N BSHIFT BSHIFT SD NOIS DEGI_W SD NOIS IC MFP-0C VIN VOUT VOUT VIN VDD LD CLK DI VIN VOUT VOUT VIN VIN VOUT VOUT VIN DO VDAREF RESET VIN VOUT VOUT VIN RXC RXC R 0 Q DTBZK T SQLATT OPV OPV SCK SCK R 0k SO SO FC SQLIN C R90 0k T C0 0.0 C 0.0 C0 0.0 T T CTCCS CTCSS DTC MOD MOD MODIN MODIN IC9 TAAP IN NF DC OUT BOOT VCC C9 C0 0. C0 0 C9 00 C9 R C C9 C R k C99 Q SC R k Q9 SC R 0k C R k R k C VOLOUT VOLOUT FILC J R k CLONE CLONE J DEGI_W Q DTBZK Q DTCEU FILC SQLIN R 0 V+ IC NJM0AV C C 0 I O IC TA0F G C 00 C C Q SC C 0 C9 R0 0k R 00 Q0 DTATUA Q DTCZU PWRON PWRON C9 0p C0 C0 00 D DSAA C C 0 I O IC ANL0M G D0 RD0E C9 CP C CP R k OE OE R 0k TXC W CV CV CV SCK EXSTB SCK SCK EXSTB CV CV CV CV T T HV HV HV HV HV HV CP only W/N version CV CV MAIN UNIT R9 0k LV LV LV LV C 9p C0 RV R R R 00k R0 0k C 0. R0 k C R0.k C C9 C9 0. C p L9 n W R 0k IC NJM0AV TXC TXC REF_V C 0. C R 0 AFMUTE SO R0 k C R k C9 0.0 AFMUTE R k C00 C 0.0 C D MAS RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV AGC AGC AGC AGC AGC AGC AGC AGC AGC TX RX DATA HV HV HV POWER SP TI TI R 00 C9 0.0 R k TI HV ANT to the LOGIC unit J MOD SCK EXSTB CV AGC RV TX: 0V RX:.0V TX:.V RX: 0V TX:.V RX: 0V TX: 0V RX:.V TX: 0V RX:.V TX:.V RX: 0V.V.9V.9V TX:.9V RX: 0V TX:.V RX: 0V TX: 0.V RX:.V TX: 0V RX:.9V TX: 0V RX:.V.V RX FM-Wide:.V RX FM-Narrow: 0V TX: 0V RX:.0V.V.9V.0V.V RX FM[W/N]: 0V RX AM:.V RX FM[W/N]:.V RX AM: 0.V -

46 - HM-V MAIN UNIT MAIN UNIT Q SC C:.0V V V V J C R 0 L 0.µ MV MV EP MICE MICE MIC EP MIC Q9 DTBZK Q SC R 0k MDATA EP MDATA C 00 Q DTCEU Q DTAEU L 0.µ D MA0 Explanatory notes VOLTAGE LINE TX LINE Q SA Q SA Q SA Q SA D SS UP S D SS D SS D SS D SS D SS D9 SS D0 SS D SS IC MC0BF Q Q Q0 Q Q9 Q Q VSS VDD Q Q Q B C D A 9 0 D SS 0 9 IC µpdag- P00/INTO0 P0/SCK P0/SO P0/SI P0 P P CL CL VDD IC S-0CLUA-B-T I O G VSS P P P P0 P0 P0 P0 P00 RESET 0 9 D SS X CSB00J00T D SS D SS D MA09 D MA09 D MA09 R.k R.k R.k R k R k R k R 0 R 0 R 0 R0 0 R 0k R 0k R 0k R9 0k R 0k R9 0k R0 0k R 0k D9 SS R 00k R 00k R 00k R 00k R0.k R M R k R9 00 R k R k R k R k R.k R.k R 0k C 0p R0.k R9.k C 00p C 00p C C C p C0 p C9 p C p C 0.0 C C C C C C9 C C C C C DS LNG DS LNG DS LNG DS LNG DS LNG DS LNG DS LNG DS LNG C0 0. MC S S R G R G EP R 0k C9 0 to the IC-00H LOGIC unit J MU/D MVSW PTT E C:.V MV R:.V T:.V C:.V C:.V C:.V C:.V V PTT F- F- VFO MR BAND S SKHHLP0A S S S C 0 V DS0 LTEPA DS LTEPA V DN S V V V A B C D S9 S0 S S 9 S S S S S S S9 S0 S S S S # V V MICE MICE R:.V T:.0V NOTE F: FU acting D: DTMF acting P: PTT-M acting C: COMMON R: RX T: TX MICE F:.9V F:.9V D:.9V T:.9V P:.9V 0 DTMF FU S S V C:.0V MAIN-A UNIT D MA0 J MAIN-A UNIT MICE EP MICE MIC EP MIC Q9 DTBZK MDATA EP MDATA DS LNG DS LNG DS LNG DS LNG DS LNG DS LNG DS LNG DS LNG Q DTCEU Q DTAEU Q SA Q SA Q SA Q SA R G D MA09 D MA09 D MA09 MC Explanatory notes VOLTAGE LINE TX LINE DS LTEPA S9 S0 S S S S S S S S S S S S S S S S9 S0 S S S S S IC BRL0FV-W A0 A A VSS S SKHHLP0A C VCC WP SCL SDA C C C C EP C9 C C C C C C C C 0p C p C0 p C9 p C p C9 0 C 00 R 0 R 0k C0 0. C 0 C S X EFOS9E IC BDG OUT VDD CD C 0.0 R 0k R.k R.k R.k R.k to the IC-00H LOGIC unit J L 0.µ MV MV MU/D MVSW PTT E C:.V MV Q SC V V V R:.V T:.V C:.0V Q SC R k C:.V C:.V C:.V R k R k C:.V V R 0k R.k R0.k R9.k R 0k R 0k R 0k R9 0k R 0 R 0 R 0 R0 0 R 0k R9 k R 0 D SS00 D SS00 D SS00 D SS00 D0 SS00 D9 SS00 D SS00 D SS00 D SS00 P0 P/BZO90 VPP RESET X X VSS 9 VDD 0 P0/TO90 P/TI0/TO0 P/INTP/CPT90 P/INTP P/INTP0 P/SS0 P0/SCK0/ASCK0 P/SI0/RXD0 P P P P P P00 P0 P0 P0 P0 P0 P0 P0 P/SO0/TXD0 R k R0 k R9 k R k R k R k R k R k R k R G L 0.µ V DS0 LTEPA MODE-R(LED-M) MODE-G(LEDM) MKEY-0 MKEY-0 MKEY-0 MKEY-0 MKEY-0 MKEY-0 MKEY-0 MKEY-0 MKEY-00 V R.k MKEY-I0 IC µpd90mc-0-a V V MICE V MICE R:.V T:.V MICE F:.9V F:.9V D:.9V T:.9V P:.9V LED-S SEND LED-M LED-M V A B C D UP BAND 9 # DN PTT F- MR 0 DTMF R.k MKEY-I MASK 0 FLASH 0k V V V F- VFO FU R.k R.k MKEY-I MKEY-I NOTE F: FU acting D: DTMF acting P: PTT-M acting C: COMMON R: RX T: TX V R 0k C:.0V VSS -

47 SECTION HM-/N (OPTIONAL UNIT) - INSIDE VIEW (HM-/N) - BOARD LAYOUTS TOP VIEW (MAIN UNIT) UP swtich (S: SKHHLM) DOWN switch (S: SKHHLM) UP DOWN LOCK switch (S: SSSS0A) PTT switch (S: JPM990-0R) Microphone (MC: KUC-00) TOP VIEW (MAIN-A UNIT) -