COMMUNICATIONS RECEIVERS. ic-r1500 ic-r2500

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1 COMMUNICATIONS RECEIVERS ic-r ic-r S-MZ-C Jun.

2 INTRODUCTION This service manual describes the latest service information for the IC-R and IC-R COMMUNICATIONS RECEIVERS at the time of publication. MODEL VERSION SYMBOL Europe EUR U.K. UK U.S.A. USA IC-R Canada CAN IC-R France FRA South East Asia SEA Export EXP EXP- IC-R* U.S.A. USA- *UT- is already installed as DIGITAL UNIT. To upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation. CAUTION NEVER connect the receiver to an AC outlet or to a DC power supply that uses more than V. Such a connection could cause a fire hazard and/or electric shock. DO NOT expose the receiver to rain, snow or any liquids. DO NOT reverse the polarities of the power supply when connecting the receiver. DO NOT apply an RF signal of more than dbm ( mw) to the antenna connector. This could damage the receiver s front end. (IC-R) (IC-R) ORDERING PARTS Be sure to include the following four points when ordering replacement parts:. -digit Icom parts numbers. Component name and informations. Equipment model name and unit name. Quantity required <SLE ORDER> S.IC TASF IC-R Main-A unit pieces 9 Screw FH M. IC-R Chassis pieces Addresses are provided on the inside back cover for your convenience. REPAIR NOTES. Make sure a problem is internal before disassembling the receiver.. DO NOT open the transceiver until the receiver is disconnected from its power source.. DO NOT force any of the variable components. Turn them slowly and smoothly.. DO NOT short any circuits or electronic parts. An insulated turning tool MUST be used for all adjustments.. DO NOT keep power ON for a long time when the receiver is defective.. READ the instructions of test equipment thoroughly before connecting equipment to the receiver. Icom, Icom Inc. and logo are registered trademarks of Icom Incorporated (Japan) in the United States, the United Kingdom, Germany, France, Spain, Russia and/or other countries.

3 TABLE OF CONTENTS SECTION SPECIFICATIONS SECTION INSIDE VIEWS SECTION DISASSEMBLY INSTRUCTIONS SECTION CIRCUIT DESCRIPITON - RECEIVER CIRCUITS PLL CIRCUITS DIGITAL MODE OPERATION WITH UT POWER SUPPLY CIRCUITS CPU PORT ALLOCATION SECTION ADJUSTMENT PROCEDURES - PREPARATION MAIN-A UNIT ADJUSTMENT MAIN-B UNIT ADJUSTMENT (R only) SECTION PARTS LIST SECTION MECHANICAL PARTS AND DISASSEMBLY SECTION SEMICONDUCTOR INFORMATION SECTION 9 BOARD LAYOUTS 9- LOGIC UNIT MAIN-A UNIT MAIN-B UNIT (R only) CONTROL UNITS UT- (Optional product; DIGITAL UNIT for [R; USA-]) SECTION SECTION BLOCK DIAGRAM VOLTAGE DIAGRAM

4 SECTION SPECIFICATIONS M GENERAL Frequency coverage U.S.A. France Other than above :, * * * * * * *, *, *, * * * * * * * :, :, * : For IC-R. Available on Main band only. Sub band does not cover outside of frequency range; to. MHz. * : Guaranteed:.9. MHz range only Mode : FM, AM, WFM, USB*, LSB*, CW, DV*, *, P*, * * : For R. Available on Main band only. * : For R. Available when optional UT- is installed. * : For R. Available when optional UT- is installed, and depending on versions. Number of memory channels : Tuning steps : Hz, Hz, Hz, Hz, Hz, Hz, khz,. khz, khz,. khz,. khz, 9 khz, khz,. khz, khz, khz, khz, khz, khz, khz, khz, khz, khz, khz, MHz, MHz, USER TS Operating temperature range : C to + C; + F to + F Current drain (at. V DC: approx.) [] POWER ON Standby ma Max. audio Less than. A *While using controller (R): plus ma with above current value. [/] POWER OFF PC (USB VBAS-ON) ma typ. PC (VBAS-OFF) ma typ. Controller (R) ma [] single band operation Standby ma Max. audio Less than. A Dualwatch operation Standby ma Max. audio Less than. A *While using controller (R): plus ma with above current value. Frequency stability : ± ppm ( C to + C) Power supply requirement : V DC ±% (Negative ground) Current drain (At V DC ; approx.) Dimensions (projections not included) : (W) (H) (D) mm; (W) (H) (D) in (W) (H).(D) mm; (W) 9 (H) (D) in (W) (H).(D) mm; (W) (H) (D) in Weight (approx.) : MAIN UNIT. kg; lb oz (). kg; lb oz () CONTROLLER. kg; lb oz (). kg; lb oz () Antenna connector : BNC ( Ω) -

5 M RECEIVER Receive system : Triple-conversion superheterodyne and down converter Intermediate frequencies : st:. MHz, nd:. MHz, rd: khz (except for WFM mode) Sensitivity : F M ( khz/. khz Dev.; db SINAD) MHz : Less than. µv MHz : Less than. µv MHz : Less than. µv MHz : Less than. µv MHz : Less than. µv MHz : Less than. µv.. MHz : Less than. µv MHz: Less than. µ V.. MHz : Less than µv W FM ( khz/. khz Dev.; db SINAD) MHz : Less than. µv.. MHz : Less than. µv MHz: Less than µ V.. MHz : Less than µv A M ( khz/% MOD.; db S/N).9.99 MHz : Less than µv..999 MHz : Less than. µv MHz : Less than. µv MHz : Less than µv MHz : Less than µv.. MHz : Less than. µv S SB/CW ( db S/N).9.99 MHz : Less than µv..999 MHz : Less than. µv MHz : Less than. µv MHz : Less than. µv.. MHz : Less than. µv Selectivity : y SSB/CW/AM More than. khz/ db (typical) SSB/CW/AM/FM More than. khz/ db (typical) AM/FM More than khz/ db (typical) AM/FM/WFM More than khz/ db (typical) WFM More than khz/ db (typical) Audio output power : More than. W (at % distortion with an Ω load) Ext. speaker connector : -conductor. (d) mm ( )/ Ω Packet connector : -conductor. (d) mm ( ) Data connector : -conductor. (d) mm ( ) IF shift variable range : More than ±. khz All stated specifications are subject to change without notice or obligation. -

6 SECTION INSIDE VIEWS LOGIC UNIT TOP VIEW USB HUB (IC: USB) ( ) USB +.V regulator IC: S-C Q: SB9 Q: SC LV regulator (IC9: ANL) CPUV regulator (IC: XCPPR) VCC line controller Q: SJ Q: DTCEU ( ) AF amplifier (IC: LAA) AF +V regulator (Q: SB, Q: XP) +V regulator IC: BAF D: SS ( ) VSC/TONE filter (IC: LM9) IC-R only USB audio IC (IC: PCM9M) VSC/TONE filter (IC: LM9) AF selecter (IC: SNAHC) V regulator ( IC: µpc D: SS D: MA ) AF selecter (IC: SNAHC) IC-R only Electric VR (IC: SMB) AF amplifier (Q: SC) IC-R only AF amplifier (Q: SC) BOTTOM VIEW SP mute switch (Q: SC) Clock oscillator (X: CR-.9 MHz) A+V regulator (IC: TA) A+V regulator (IC: AN) B+V regulator (IC: TAF) IC-R only B+V regulator (IC: TASP) IC-R only CPU reset IC (IC: S-9) CPU (IC: MFGPGP) DTMF decoder (IC9: BUFS) -

7 MAIN-A UNIT RF circuits TOP VIEW Down converter circuit st VCO circuit nd VCO circuit DDS REF V regulator (Q9: XP) DDS circuit Buffer (Q: SC) Noise blanker amplifier (Q: SK) APCOV regulator (Q: SA) BOTTOM VIEW D.V regulator (Q: UNR9) ATT circuits DVCO +V regulator (Q: UNR9) DPLL.V regulator (IC: S-CAMC) st mixer (IC: SPM) +V regulator (Q: UNR9) st IF amplifier (Q: SK) nd mixer (IC9: TAF) IF IC (Band scope) (IC: TA) nd IF amplifier (Q: SK) AGC amplifier (Q: SC) HF band RF amplifier (Q: SC) HF V regulator (Q: XP) PLL.V regulator (IC9: S-CAMC) DDSREF V regulator (D: DAN) RSSI meter amplifier (IC: NJM9V, D: SS) SSB decoder (IC: TAF) AM detecter circuit WFM IF IC (IC: LAM) IF IC (FM) (IC: TA) -

8 MAIN-B UNIT (IC-R only) TOP VIEW BOTTOM VIEW HF filters ATT circuit st VCO circuit st VCO circuit Buffer (Q: SC) Noise blanker (Q: SK) BAPCOV regulator (Q: SA) st mixer (IC: SPM) +V regulator (Q: UNR9) st IF amplifier (Q: SK) PLL.V regulator (IC9: S-CAMC) nd mixer (IC9: TAF) RSSI meter amplifier (IC: NJM9V D: SS) nd IF amplifier (Q: SK) AGC amplifier (Q: SC) IF IC (WFM) (IC: LAM) AM detecter circuit IF IC (FM) (IC: TA) UT- (Optinal product; DIGTAL UNIT for [IC-R: USA-]) TOP VIEW rd IF filter (FI: CFWKA) BOTTOM VIEW Clock oscillator (X: CR-9) Liner codec (IC9: AKVT) EEPROM (IC: HNXTI) CPU (IC: HDF9TE) -

9 CONTROL UNIT (R) Color controller (Q,Q: Q: SC) +V regurator regulator Q: SC Q: SA D: MA +V regurator regulator IC: TALF D: MA Control unit CPU (IC: HDRBH) Reset IC (IC: S-9CLMC-GF) CONTROL UNIT (R) Dimmer LED drivers (Q-Q: SC) Sub Control CPUunit CPU (IC: HDRH) +V regurator (IC: TALF) Data comparator (IC: TASF) TASF, D: MA) +V regurator (Q: SC) Q: SA D: MA9 Reset IC (IC: S-9CLMC)

10 SECTION DISASSEMBLY INSTRUCTIONS Removing the top cover and shield covers q Unscrew screws, A. w Unplug the connectors B and C from the LOGIC unit. e Remove the top cover in the direction of the arrow. r Remove the shield covers D and E* in the direction of the arrow. E * A Top cover A D B C LOGIC Unit * IC-R only Removing the LOGIC unit, MAIN-A unit and MAIN-B* unit q Unscrew nut F*, G. w Unscrew screws H from the LOGIC unit and remove the LOGIC plate. e Unscrew screws I from the MAIN-A unit and screws J* from the MAIN-B unit*. r Remove the units in the direction of the arrows. H LOGIC Plate J* F* LOGIC UNIT G MAIN-B UNIT MAIN-A UNIT I * IC-R only Chassis -

11 CONTROL unit disassembly (R) q Remove knobs A. CONTROL unit disassembly (R) q Remove knobs A. w Unscrew screws B, and remove the cover. w Unscrew screws B, and remove the cover. e Remove the plate C, and remove CONTROL unit. e Unscrew screws C, and remove the LCD plate. r Remove the CONTROL unit. CONTROL UNIT CONTROL UNIT -

12 SECTION CIRCUIT DESCRIPTION - RECEIVE CIRCUITS --RF CIRCUITS (MAIN-A/-B UNITS) The MAIN-A UNIT has eight RF circuits and one down converter circuit to provide wide receiving range. The received signals from the antenna connector (CHASSIS; J) are applied to RF circuits or down converter circuit according to the received frequency, and amplified within the frequency coverage. IC-R contains MAIN-B UNIT which has RF circuits to provide dulalwatch or diversity capability. The MHz signals from the antenna are passed through the attenuator (D, D), band switch (D9) and lowpass fi lter (LPF; L, L, C, C, C, C, C, C), then applied to one of the RF circuit.. MHz* The. MHz signals are passed through the band switch (D9), LPF (L, L, C, C, C, C) and another band switch (D), then applied to the st mixer (IC, pins, ). < MHz> D LPF D9 From the LPF.. MHz* The.. MHz signals are passed through the band switch (D), LPF (L, L, L, C, C, C, C, C, C), high-pass filter (HPF; L, L, L, C, C, C, C, C, C, C9) and another band switch (D9), and then applied to the RF amplifier (Q). The amplified signals are then applied to the st mixer (IC, pins, ) via the band switch (D). <. MHz> D To the Q RF amp. st mixer (IC, pins, ) D9 HPF LPF D From the LPF. MHz* The. MHz signals are passed through the band switch (D), LPF (L, L9, C, C, C, C, C), HPF (L, L, C9, C9, C, C, C) and another band switch (D), and then applied to the RF amplifi er (Q). The amplifi ed signals are then applied to the st mixer (IC, pins, ) via the band switch (D). < MHz> To the D Q RF st mixer amp. (IC, pins, ) D HPF LPF D From the LPF MHz* The MHz signals are passed through the band switch (D), HPF (L, L, C, C, C, C, C) and another band switch (D), and then applied to the RF amplifi er (Q). The amplifi ed signals are then applied to the st mixer (IC, pins, ) via the band switch (D). < MHz> To the D st mixer (IC, pins, ) Q RF amp. D HPF D From the LPF The MHz signals from the antenna are passed through the anttenuator (D, D), band switch (D) and LPF (L, C, C), then applied to one of the RF circuit. MHz The received signals MHz are passed through the band switch (D) and the tunable bandpass fi lter (; D, D D, D, D, L9, L, L, L, L, C9, C, C, C9, C), and then applied to the RF amplifi er (Q). The amplified signals are passed through another tunable (D, D, L, L, L9, L, C, C, C99) and another band switch (D), and then applied to the st mixer (IC, pins, ). < MHz> D, D D To the D st mixer (IC, pins, ) D, D Q RF amp. D, D D From the HPF MHz The received signals MHz are passed through the band switch (D) and (D, L, L, L, L, L9, C, C, C, C, C, C, C), and applied to the RF amplifier (Q). The amplified signals are passed through another (D, L, L, L, C, C, C, C9) and another band switch (D), and then applied to the st mixer (IC, pins, ). < MHz> To the D st mixer (IC, pins, ) D Q RF amp. D D From the HPF MHz The received signals MHz are passed through the band switch (D) and (D, D, L, L, L, C, C, C, C), then applied to the RF amplifier (Q). The amplified signals are passed through another (D, D9, L, L, L, L, C, C, C) and another band switch (D), and then applied to the st mixer (IC, pins, ). < MHz> To the D st mixer (IC, pins, ) D, D9 Q RF amp. D, D D From the HPF MHz The received signals MHz are passed through the band switch (D) and (D9, D, D, D, L, L, L, L, L, L, C, C, C9), then applied to the RF amplifier (Q). The amplified signals are passed through another (D, D, L, L9, L, L, C, C, C) and the band switch (D), and then applied to the st mixer (IC, pins, ). < MHz> To the D st mixer (IC, pins, ) D, D Q RF amp. D9, D D From the HPF *MAIN-A UNIT only -

13 MHz* The MHz signals from the antenna are applied to the down converter circuit where those signals are converted into the lower frequencies. <DOWN CONVERTER> LO signals from VCO (Q9, D) D To the RF circuits ( MHz) LPF IC RF amp. HPF Q Buff amp. D From the antenna The received signals are applied to the buffer amplifier (Q) via the band switch (D). The buffer-amplifi ed signals are applied to the RF amplifi er (IC, pin ) via HPF (L, L, C9, C9, C9, C, C). The amplified signals are output from pin, and applied to the mixer (IC, pin ) and down-converted. The down converted signals are output from pin, then applied to the RF circuits via LPF (L, C9, C9) and band switch (D). The LO frequencies and convered frequencies are shown as below. RX frequency LO frequency Convered frequency MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz -- st IF CIRCUITS The st IF circuits contain a st mixer, st IF amplifi er and st IF fi lter. The st IF mixer converts the received signals into a fi xed frequency of the st Intermediate Frequency (IF) signal. The converted st IF signal is filtered at the st IF filters, then amplified at the st IF amplifier. The converted signals from the RF circuits are applied to the st IF mixer (IC, pins, ) and converted into the. MHz st IF signal by being mixed with the st LO (Local Oscillator) signals from the st-vco s. The converted IF signal is passed through the st IF filter (FI) to filter out the unwanted signals, then applied to the st IF amplifier (Q). The amplified st IF signal is then applied to the nd mixer (IC9, pin ) via attenuator (R, R). -- nd IF CIRCUITS (MAIN UNIT) The nd IF circuits contain the st mixer, nd IF amplifier and the nd IF fi lters. The st IF signal from the st IF circuits is converted into the. MHz nd IF signal by being mixed with the nd LO signals from the nd-vco. The converted nd IF signal is applied to the nd IF amplifi er (Q). The amplified nd IF signal is passed through the nd IF fi lter to fi lter out the unwanted signals. In FM or AM mode, the nd IF signal is passed through the FI (band width= khz) via mode switches (D, D), In WFM mode, the nd IF signal is passed through the FI (band width= khz) via mode switches (D, D). The fi ltered nd IF signal is applied to the nd IF amplifi er (Q). The amplifi ed nd IF signals are then applied to the rd IF and demodulation circuits. -- NOISE BLANKER CIRCUIT The noise blanker (NB) circuit reduces pulse type noises in the received signals. When the received signals contain pulse type noise components, the NB circuit reduces the noisy AF signals by cutting off the nd IF line. In AM, SSB or CW mode and the NB function is activated, a portion of the nd IF signal from the band switch (D, D) is amplifi ed at NB amplifi er (Q) and applied to the IF IC (IC, pin ). When the nd IF signal contains a pulse noise, the RSSI signal corresponding to the pulse noise level is output from pin. The output RSSI signal turns Q9 ON and Q turns OFF, thus the Q is inactivated and the nd IF signal is cut off. -- rd IF AND DEMODULATOR CIRCUITS (MAIN-A/B UNIT) The nd IF signal is converted into the rd IF signal (except WFM mode) and demodulated in the IF IC. The IF IC contains a rd mixer, limiter amplifi er, quadrature detector, etc. in its package. In FM mode, the nd IF signal from the nd IF amplifier (Q) is applied to the IF IC (IC, pin ) via mode switch (D) and IF gain control circuit (D9). The applied nd IF signal is converted into the rd IF signal by being mixed with rd LO signal from the TCXO (X), at the rd mixer in the IF IC (IC). The converted rd IF signal is output from pin and applied to the rd IF amplifier (Q). The amplifi ed rd IF signal is passed through one of the rd IF fi lter according to the receiving mode. The filtered rd IF signal is applied to the limiter amplifier (IC, pin ), then applied to the demodulator circuit (pin, X) and FM-demodulated. The FM-demodulated AF signals are output from pin 9, then applied to the AF circuits. In AM and CW mode, the rd IF signal from the rd IF fi lter is applied to the rd IF amplifier (Q). The amplified rd IF is applied to the AM demodulator circuit (D) via the buffer amplifi er (Q). The AM-demodulated AF signals are applied to AF circuits via the AF selector (IC, pins, ). In SSB mode, the rd IF signal from the buffer amplifier (Q) are applied to the AF mixer (IC, pin ) and converted into the AF signal by being mixed with the.. khz BFO signal from the DDS circuits. The converted audio signals are applied to the AF selector (IC, pin ) after being fi ltered at the HPF (IC, pins, ). In WFM mode, the nd IF signal is applied to the IF IC (IC, pin ) via the nd IF amplifi er (Q) and mode switch (D9, D9). The nd IF signal is amplified at the limiter amplifier, then applied to the demodulator circuit (pins,, X) and FM-demodulated. The FM-demodulated AF signals are output from pin, then applied to the AF circuits via the AF selector (IC, pins, 9). - *MAIN-A UNIT only

14 <rd IF AND DEMODULATOR CIRCUITS (FM)> D9 D9 rd IF signal to the AM demodulator circuits D FI9 D9 D9 FI D9 Q rd IF amp. D FI D. MHz rd LO signal REF amp. Q REF amp. Q TCXO X D/A converter FM-demodulated signals to the AF circuits IC Quodrature Detector 9 X Noise Amp. Limit r Amp. +V RSSI Noise Detector IF IC (IC) nd IF signal from the nd IF circuits NOISE signal to the CPU (IC, pin ) RSSI signal to theagc amplifier (Q) Q <nd IF AND DEMODULATOR CIRCUITS (WFM)> FM-demodulated signals to the AF circuits Quodrature Detector 9 X Limit r Amp. Limit r Amp. RSSI Limit r Amp. IF IC (IC) nd IF signal from the nd IF circuits RSSI signal to the NB circuits -- AF CIRCUITS (LOGIC UNIT) The demodulated AF signals from the demodulator circuits are amplified and filtered in the AF circuits. In FM mode, the demodulated AF signals from the demodulator circuits are passed through the AF select switch (IC, pins, ) and (IC, pins, and, ), then applied to the AF amplifi er (Q). In the USB (Universal Serial Bus) audio output mode, the AF signals from the AF amplifier (Q) are applied to another AF amplifier (Q). The amplified AF signals are passed through the USB audio selector (IC, pins, ), then applied to the USB audio IC (IC, pin ) then converted into the USB audio data. The converted audio data is applied to the connected PC via the USB HUB (IC, pins, and, ). In other than FM mode, the demodulated AF signals from the demodulator circuits are passed through the AF select switch (MAIN-A/B; UNIT ;IC, pins, 9; WFM, pins, ; AM, pins, ; SSB), then applied to the AF amplifi er (Q). The amplified AF signal are applied to the electric volume (IC, pins, ) for level adjustment. The level adjusted AF signals are passed through the speaker mute switch (Q) and applied to the AF power amplifier (IC, pin ). The power-amplified AF signals are applied to the internal speaker via J (J) or an external speaker/ear phone via the phone switch (S), attenuator (R9, R) and J (J). AF CIRCUITS FM IF IC 9 (IC) WFM IF IC (IC) AM AM demodulator (D) From the BFO IC AF selector AF mixer (IC)* IC IC 9 SSB AF selector Q AF Amp. MAIN-A/B UNIT LOGIC UNIT IC Q, D IC Power Amp. Ele. VR SP mute sw. Q IC IC D+ AF USB USB Amp. audio D HUB - -- SQUELCH CIRCUIT NOISE SQUELCH (MAIN-A/B UNITS) The noise squelch mutes the AF output signals when no RF signals are received. By detecting noise components in the demodulated AF signals, the squelch circuit toggles the AF power amplifi er ON and OFF. A portion of the demodulated signals from the IF IC (IC, pin 9) are applied to the D/A converter (IC, pin ) for level adjustment. The level-adjusted AF signals are output from pin, and passed through the noise filter (R, R, C, C). The fi ltered noise signals are then applied to the noise amplifier (IC, pins, ) to be amplified noise components only. The amplified noise components are converted into the Phone switch (S) ATT D+ To the PC D USB connector (J) (CHASSIS; J) Speaker (CHASSIS; SP) *MAIN-A UNIT only

15 pulse-type signal at the noise detector section, and output from pin as the NOIS signal. The NOIS signal is applied to the CPU (IC, pin ). And the CPU outputs control signals LSTB, VDAT, VCK from pins,,, to the expander (IC) according to the NOIS signal level. Then the expander outputs SPPWR signal from pin to toggle the AF+V regulator (Q, Q) ON and OFF. The expander also outputs SPMUTE signal to the speaker switch (Q, D) at the same time, to disconnect the AF line. TONE SQUELCH (LOGIC UNIT) The tone squelch detects the tone (CTCSS/DTCS) signal in the demodulated AF signals, and opens the squelch only when the matched sub-audible tone frequency is detected in the received signal. While the tone squelch is in use, and the received signal contains no sub-audible tone or mismatched tone frequency, the tone squelch mutes the AF signals even if the noise squelch is open. A portion of the demodulated AF signals from the IF IC (MAIN-A/B; IC, pin 9) are passed though the tone filter (IC/IC, pins, ) to suppress unwanted voice signals. The fi ltered tone signals are applied to the CPU (IC, pin 9/). The CPU decodes the CTCSS/DTCS signal, and outputs control signals LSTB, VDAT, VCK from pins,,, to the expander (IC) according to the applied CTCSS/DTCS signal. Then the expander outputs SPPWR signal from pin to toggle the AF+V regulator (Q, Q) ON and OFF. The expander also outputs SPMUTE signal to the speaker switch (Q, D) at the same time, to disconnect the AF line. -- BANDSCOPE CIRCUITS* (MAIN-A UNIT) A portion of the nd IF signal from the nd mixer (IC9, pin ) is applied to the IF IC (IC, pin ) via the nd IF fi lter (FI). The nd IF signal is converted into the rd IF signal by being mixed with rd LO signal from the DDS circuits, at the rd mixer in the IF IC (IC). The converted rd IF signal is output from pin and passed through the rd IF fi lter FI. The fi ltered signal is amplifi ed at the limiter amplifi er in the IC to produce the RSSI signal which corresponding to the received signal level. The RSSI signal SCAD is output from pin, and applied to the CPU (IC, pin 9). The CPU converts the RSSI signal into the digital signal, and outputs to connected PC via USB HUB (IC, pins 9, and, ) to indicate the received signal level for bandscope function on the PC screen. - PLL CIRCUITS -- VCO CIRCUITS (MAIN-A/B UNITS) DOWN CONVERTER VCO* The down converter VCO (Q9, D) generates the MHz LO signals for down conversion. The VCO output signals are buffer amplified by Q, and applied to the mixer (IC, pin ) for frequency downconversion, via the band switches (D, D, D, D). When the recceiving MHz and above, the VCO outputs are doubled by being passed through the HPF (L, C, C9, C), and applied to the mixer (IC, pin ) as the MHz LO signals via the band switches (D, D). st VCO s The st VCO is composed by two VCO s; as the st LO signal generator for.9 MHz and. MHz reception range. [When receiving.999 MHz signals] -st VCO (Q, D)- Generates. 9.9 MHz LO signals. The VCO output signal is buffer-amplified by Q. The buffer amplified signals are passed through the LO siwtch (D) and buffer amplifi er (IC, pins, ). -st VCO (Q, D)- Generates. MHz LO signals. The VCO output signal is buffer-amplified by Q9. The buffer amplified signals are passed through the LO siwtch (D9) and buffer amplifi er (IC, pins, ). The buffer amplifi ed VCO output signals from pin of IC are passed through the attenuator (R, R, R), LO switch (D) and another attenuator (R, R, R), and applied to the / frequency divider (IC, pin ). The divided LO signals are buffer-amplified by Q, and then passed through the HPF (L, C, C), LPF (L, L, C, C), LO switch (D) and attenuator (R, R, R), before being applied to the st mixer (IC, pins, ). [When receiving. MHz signals] -st VCO (Q, D)- Generates. 9.9 MHz LO signals. The VCO output signal is buffer-amplified by Q. The buffer amplified signals are passed through the LO siwtch (D) and buffer amplifi er (IC, pins, ). -st VCO (Q, D)- Generates. MHz LO signals. The VCO output signal is buffer-amplified by Q9. The buffer amplified signals are passed through the LO siwtch (D9) and buffer amplifier (IC, pins, ). The buffer amplifi ed VCO output signals from pin of IC are passed through the attenuator (R, R, R) and LO switches (D, D) and (L, L, C, C, C, C9, C9), before being applied to the st mixer (IC, pins, ). nd VCO The nd VCO (Q, D, D) generates the LO signals for producing nd IF signal. The oscillated signals are buffer amplifi ed by Q, and applied to the nd mixer (IC9, pin ) via LPF (L, C, C9, C) and attenuator (R). -- PLL CIRCUITS (MAIN-A/B UNIT) The PLL circuits provide stable oscillation of the receive LO frequencies. The PLL circuit compares the phase of the divided VCO frequency with the reference frequency. The PLL output frequency is controlled by the divided ratio (N-data) from the CPU. DOWN CONVERTER PLL* A portion of the VCO output signals are amplified at the buffer amplifi er (Q) and then applied to the PLL IC (IC, pin ). The applied signals are divided at the prescaler and programmable counter according to the N-data DAT from the expnader (IC, pin ) controlled by the CPU (LOGIC UNIT; IC). The divided signal is phase compared with the reference frequency from the reference amplifi er (Q) at the phase comparator. - *MAIN-A UNIT only

16 The phase difference is output from pin as a pulse type signal after being passed through the internal charge pump. The output signal is applied to the VCO (Q9, D) after being converted into the DC voltage (lock voltage) at the loop filter (R, R, R, C, C, C, C, C). st PLL -st VCO (Q, D)- A portion of the VCO output signals from the buffer amplifi er (IC, pin ) are applied to the PLL IC (IC, pin ) via the buffer amplifier (Q9). The applied signals are divided at the prescaler and programmable counter according to the N-data DAT from the expnader (IC, pin ) controlled by the CPU (IC). The divided signal is phase compared with the reference frequency at the phase comparator. The phase difference is output from pin as a pulse type signal after being passed through the internal charge pump. The output signal is applied to the VCO (Q, Q, D, D) after being converted into the DC voltage (lock voltage) at the loop fi lter (Q, Q). -st VCO (Q, D)- A portion of the VCO output signals from the buffer amplifi er (IC, pin ) are applied to the PLL IC (IC, pin ) via the buffer amplifier (Q9). The applied signals are divided at the prescaler and programmable counter according to the N-data DAT from the expnader (IC, pin ) controlled by the CPU (IC). The divided signal is phase compared with the reference frequency at the phase comparator. The phase difference is output from pin as a pulse type signal after being passed through the internal charge pump. The output signal is applied to the VCO (Q, Q, D, D) after being converted into the DC voltage (lock voltage) at the loop fi lter (Q, Q). nd PLL A portion of the VCO (Q, D, D) output signals from the buffer (Q) are applied to the PLL IC (IC, pin ) via the buffer (Q). The applied signals are divided at the prescaler and programmable counter according to the N-data DAT from the expnader (IC, pin ) controlled by the CPU (IC). The divided signal is phase compared with the reference frequency from the reference amplifi er (Q) at the phase comparator. The phase difference is output from pin as a pulse type signal after being passed through the internal charge pump. The output signal is applied to the VCO (Q, D, D) after being converted into the DC voltage (lock voltage) at the loop fi lter (R, R, C, C, C). If the oscillated signal drifts, its phase changes from that of the reference frequency, causing a lock voltage change to compensate for the drift in the oscillated frequency. <THE CONCEPT OF PLL CIRCUITS> PLL IC PLL unlock detect signal Prescaler Buffer amp. Buffer amp. to a mixer PLL strobe signal PLL crock signal PLL serial data (N-data) DATA interface Programmable counter VCO Reference frequency signal Reference counter Phase detector Charge pump Loop filter - DIGITAL MODE OPERATION WITH UT- A portion of the khz rd IF signal from IF IC (MAIN-A UNIT; IC, pin ) is applied to the LOGIC UNIT via the IF amplifier (MAIN-A UNIT; Q, Q). The applied rd IF signal is passed through the IF switch (LOGIC UNIT; IC, pins, ) and buffer amplifier (LOGIC UNIT; Q), then applied to the attached UT- via J (pin ). The applied rd IF signal is passed through the IF filter (UT-; FI) to remove unwanted signals, and applied to the A/D converter (UT-; IC, pin ) to be converted into the digital signal via. The converted digital signal is then applied to the DSP (Digital Signal Proccesor; IC) and demodulated. The demodulated signal is then applied to the liner codec (UT-; IC9) to be converted in to the analog audio signals. The converted audio signals are applied to the same AF circuits as analog receiving from the AF switch (IC, pin ). Optional product (DIGITAL UNIT for R; [USA-]) -

17 - POWER SUPPLY CIRCUITS VOLTAGE LINE DESTINATION VOLTAGE LINE DESTINATION HV Same voltage as the connected power supply. APV Optional UT-. AF+V AF power amplifi er (IC). OPV Optional UT-/UT-. LV Electric volume (IC), tone filter (IC), AF switch A+V (IC, IC), etc. MAIN-A UNIT. +V Loop fi lter (MAIN-A/B UNITS; Q, Q). A+V USB.V USB HUB (IC, IC), USB audio IC (IC). V AGC amplifi er (MAIN UNIT; IC). VOLTAGE LINE DESTINATION BPLL.V st and nd PLL circuits; PLL IC (IC, IC). B/ V Divider (IC). *R only VOLTAGE LINE DPLL.V D.V PLL.V V DVCOV DESTINATION Down converter circuit; PLL IC (IC). Down converter circuit; mixer (IC), RF amplifi er (IC), etc. st and nd PLL circuits; PLL IC (IC, IC). Divider (IC), reference oscillator (X), etc. Down converter circuit; VCO (Q9, D), buffer (Q), etc. -

18 - CPU PORT ALLOCATION -- CPU (LOGIC UNIT; IC) Pin No. PORT NAME DESCRIPTION BMST Outputs strobe signal to the expander (MAIN-B UNIT; IC, pin). BCK Outputs clock signal to the expander (MAIN-B UNIT; IC, pin ). BMST Outputs strobe signal to the expander (MAIN-B UNIT; IC, pin). 9 CSHIFT Outputs clock frequency shift signal to the clock shift circuit (D). NOIS Input port for NOIS signal from the IF IC (MAIN-A UNIT; IC, pin ). BNOIS Input port for BNOISE signal from the IF IC (MAIN-B UNIT; IC, pin ). PWR Input port for power witch (CHASSIS; S). Low =While the power switch is turned. 9 BMST* Outputs strobe signal to the expander (MAIN-B UNIT; IC, pin ). CCS Outputs optional unit select signal to the attached optional unit via the pin of J. High =While the optional unit is attached. BPSTB* Outputs PLL strobe signla to the st PLL IC (MAIN-B UNIT; IC, pin ). BPSTB* Outputs PLL strobe signla to the nd PLL IC (MAIN-B UNIT; IC, pin ). BDSTB* Outputs strobe signal to the D/A converter (MAIN-B; IC, pin ). PDIN Input port for USB data. PDOUT Outputs USB data. SCL Outputs clock signal to the EEPROM (IC, pin ). OPSO Output serial data to the attached optional unit via the pin of J. OPSI Input port for serial data from the attached optional unit via the pin of J. OPSCK Outputs clock signal to the Attached optional unit via the pin of J. AIRQ Input port for data request signal from the attached UT- via the pin 9 of the J. ASTB Outputs strobe signal to the attached UT- via the pin of the J. ASI Input port for serial data from the attached UT- via the pin of the J. 9 ASO Outputs serial data to the attached UT- via the pin of the J. ACK Outputs clock signal to the attached UT- via the pin of the J. DSPS Outputs DSP select signal to the attached DSP unit via pin of J. IMST Outputs DSP strobe signal to the attached DSP unit via pin of J. BUSY Outputs busy signal to the attached optional unit via pin of J. SDL I/O port for EEPROM (IC, pin ). OPAFSEL Outputs control signal to the AF switch (IC, pin ). High =While the optional unit is activated. Outputs control signal to the AF switch (IC, pin ). OPAFINH High =The AF line for the optional unit is disconnected. Outputs control signal to the AF switch BOPAFSEL* (IC, pin ). High =While the optional unit is activated. Outputs control signal to the AF switch BOPAFINH* (IC, pin ). High =The AF line for the optional unit is disconnected. Pin No. PORT NAME DESCRIPTION 9 RXMUTE Input port for mute signal from the attached optional unit via the pin of J. High =While the audio output is muted. APAFSEL Outputs control signal to the AF switch (IC, pin ). High =While the UT- is in use. APAFINH Outputs control signal to the AF switch (IC, pin ). High =While the attached UT- is inactivated. VDAT Outputs serial data to the electric volume (IC, pin ). VCK Outputs clock signal to the electric volume (IC, pin ). 9 VSTB Outputs strobe signal to the electric volume (IC, pin ). LSTB Outputs strobe signal to the expander (IC, pin ). PWR Outputs control signal to the power controller (Q, Q). High =While the receivers power is ON. DTMSTD Input port for detecting signal from the DTMF decoder (IC9, pin ). High =When the DTMF signal is detected. DTMSD Input port for DTMF signal from the DTMF decoder (IC9, pin 9). DTMCK Outputs clock signal from the DTMF decoder (IC9, pin ). PDSTB Outputs strobe signal to the DDS IC (MAIN-A UNIT; IC, pin ). VBUS Input port for USB connection detecting signal from the VBUS line. High =While a PC is connected through [USB] connector on the receiver's main unit. DSTB Outputs strobe signal to the D/A converter (MAIN-A; IC, pin ). PSTB Outputs strobe signal to the nd PLL IC (MAIN-A UNIT; IC, pin ). PSTB Outputs strobe signal to the st PLL IC (MAIN-A UNIT; IC, pin ). DPSTB Outputs strobe signal to the down converter PLL IC (MAIN-A UNIT; IC, pin ). 9 MST Outputs strobe signal to the expander (MAIN-A; IC, pin ). MST Outputs strobe signal to the expander (MAIN-A; IC, pin ). MST Outputs strobe signal to the expander (MAIN-A; IC, pin ). BCMAD* Input port for RSSI signal from the RSSI signal selector (MAIN-A; IC, pin ). BVSCAF* Input port for VSC signal from the tone filter (IC, pin ). BRTONE* Input port for CTCSS signals from the tone fi lter (MAIN-B UNIT; IC, pin ). BSMAD* Inputport for RSSI signal from the IF IC (MAIN-A/B UNITS; IC, pin ). TEMP Input port for internal temperature detection. 9 SCAD Input port for RSSI signal from the IF IC (MAIN-A/ B UNITS; IC, pin ) for band scope function. 9 CMAD Input port for RSSI signal from the IF IC (MAIN-A UNIT; IC, pin ) for AFC function. 9 VSCAF Input port for VSC signal from the tone filter (IC, pin ). 9 RTONE Input port for CTCSS signals from the tone fi lter (MAIN-A UNIT; IC, pin ). 9 USBPOW Outputs voltage line control signal to the.v regulator (IC, Q, Q, Q). High =During in the USB audio mode. *R only -

19 SECTION ADJUSTMENT PROCEDURES - PREPARATION When adjusting IC-R/R, controller for the R/R and JIG cable (see the illust below) are required. REQUIRED TEST EQUIPMENTS EQUIPMENT GRADE AND RANGE EQUIPMENT GRADE AND RANGE Frequency range : MHz Standard signal Output level : µv to mv AC milliwattmeter Measuring range : µw to mw generator (SSG) ( to dbm) Frequency counter Frequency range : MHz Frequency accuracy : ± ppm or better Sensitivity : mv or better External speaker Input impedance : Ω Capacity : More than W CAUTION!: BACK UP the originally programmed memory data in the receiver before starting the adjustment. There is possiblity of losing original memory data when the adjustment is finished. Before starting adjustment: Remove the top cover and sheild cover on the MAIN-A UNIT. (Refer to the SECTION for details) Set the AF switch to PHONES. (Refer to the instruction manual for details) CONNECTION <FOR IC-R ADJUSTMENT> <FOR IC-R ADJUSTMENT> -

20 <FOR IC-R ADJUSTMENT> ENTERING ADJUSTMENT MODE q Set the direction of the [VOL] to o'clock ( o'clock). w Push and hold [TS MODE]+[ATT PRIO]+[NB AGC] +[MONI T/T-SCAN] key, and turn the power switch (MAIN UNIT) ON. KEY ASSIGNMENTS FOR THE ADJUSTMENT MODE CONTROLLER [SET LOCK] [TS MODE] [VOL] [SET LOCK] [S.MW MW] [DIAL] : Selects the next adjustment item. : Selects the previous adjustment item. : Adjusts the value for the item manually. [TS MODE] : Adjusts the value for the item automatically. Stores the set value. [V/MHz SCAN] : Verify the adjustment value for the item. [VOL] : Adjust the audio output level. [S.MW MW] [DIAL] [V/MHz SCAN] DISPLAY EXLE [ATT PRIO] [NB AGC] [MONI T/T-SCAN] Adjustment frequency Adjustment item <FOR IC-R ADJUSTMENT> ENTERING ADJUSTMENT MODE q Set the direction of the [VOL] (Right) to o'clock ( o'clock). w Push and hold [MAIN NB]+[MAIN AGC]+[ATT PRIO] +[MODE SCAN] key, and turn the power switch (MAIN UNIT) ON. KEY ASSIGNMENTS FOR THE ADJUSTMENT MODE [MAIN NB] : Selects the next adjustment item. CONTROLLER [MAIN AGC] MAIN AGC VFO/MR S.MW MHz TS DIAL PWR VOL SQL MONI T/T-SCAN MODE SCAN ATT PRIO SQL [SET SKIP] SET SKIP VOL DIAL MAIN NB VFO/MR S.MW MHz TS [MAIN NB] [VFO/MR] [VOL] [DIAL] [VFO/MR S.MW] (Right band) : Selects the previous adjustment item. [DIAL] (Right band) : Adjusts the value for the item manually. [SET SKIP] : Adjusts the value for the item automatically. Stores the set value. [ATT PRIO] : Verify the adjustment value for the item. [VOL] (Right band) : Adjust the audio output level. [MODE SCAN] DISPLAY EXLE MAIN-A UNIT adjustment [ATT PRIO] MAIN-B UNIT adjustment -

21 - MAIN-A UNIT ADJUSTMENT ADJUSTMENT OPERATION VALUE REFERENCE Connect a frequency counter to the J connector on the MAIN-A. MHz FREQUENCY [REF] UNIT (see the illust below). Push [TS MODE]/[SET SKIP] to store the set value. Preset the adjustment items as below before the adjustment. Automatic adjustment [LT] [HTF] [AGA] : A [IFA] : Connect an SSG to the antenna connector ANT and set as; Frequency : Specifi ed frequency* Modulation : none Level : Specifi ed level Push [TS MODE]/[SET SKIP] to store the adjustment value. Repeat for each specifi ed frequency and level for [LT] to [HTF]. AGC GAIN Connect an SSG to the antenna connector and set as; mw (FM) Frequency : Specifi ed frequency* [AGF] Mode : FM Modulation : khz Deviation :. khz Level : + dbµ ( dbm) Connect a speaker and milliwatt meter then set the audio output level to mw with [VOL]. Push [SET LOCK]/[MAIN NB] to select next adjustment item. (AM) Set the SSG as; mw [AGA] Frequency : Specifi ed frequency* Mode : AM Modulation : khz Deviation : % Level : + dbµ ( dbm) Set the audio output level to mw with [DIAL]. Verify that the demodulated audio signals are not distorted badly. Push [TS MODE]/[SET SKIP] to store the adjustment value. IF GAIN Set the SSG as; mw (FM) Level : OFF [IFF] Connect a speaker and milliwatt meter then set the audio output level to mw with [VOL]. Push [SET LOCK]/[MAIN NB] to select next adjustment item. (AM) Set the audio output level to µw with [DIAL]. µw [IFA] Push [TS MODE]/[SET SKIP] to store the adjustment value. Refer to the ADJUSTMENT ITEM LIST on page -. The output level of the standard signal generator (SSG) is indicated as the SSG's open circuit. *Displayed on the controller's display. J -

22 - MAIN-A UNIT ADJUSTMENT (coninued) ADJUSTMENT OPERATION VALUE S-METER Set the SSG as; Automatic adjustment [NS] [WS] Frequency : Specifi ed frequency* Modulation : None Level : Specifi ed level Push [TS MODE]/[SET SKIP] to store the adjustment value. Repeat for each specified frequency and value for [NS] to [WS]. S-METER FLATNESS Set the SSG as; Automatic adjustment [L] [LEH] Frequency : Specifi ed frequency* Modulation : None Level : Specifi ed level Push [TS MODE]/[SET SKIP] to store the adjustment value. Repeat - for each specifi ed frequency and value for [L] to [LEH]. BAND SCOPE Set the SSG as; Automatic adjustment [SC] [SC] Frequency : Specifi ed frequency * Modulation : None Level : Specifi ed level Push [TS MODE]/[SET SKIP] to store the adjustment value. Repeat for each specified frequency and value for [SC] to [SC]. CENTER METER Set the SSG as; Automatic adjustment [CML] (LOW) Frequency : khz lower than specifi ed frequency* Modulation : None Level : + dbµ ( dbm) Push [TS MODE]/[SET SKIP] to store the adjustment value. [CMH] (HIGH) Set the SSG as; Frequency : khz higher than specifi ed frequency* Modulation : None Level : + dbµ ( dbm) Push [TS MODE]/[SET SKIP] to store the adjustment value. SQUELCH Set the SSG as; Automatic adjustment [SQL] Frequency : Specifi ed frequency* Mode : FM Modulation : khz Deviation :. khz Level : dbµ ( dbm) Set the [SQL] value to close the squelch with [DIAL]. Then set the [SQL] value at the point where the audio signals just appear. Turn the SSG output OFF, and verify that the squelch is closed. Push [TS MODE]/[SET SKIP] to store the adjustment value. RSSI Set the SSG as; Automatic adjustment [RS] [RS] Frequency : Specifi ed frequency* Modulation : None Level : Specifi ed level Push [TS MODE]/[SET SKIP] to store the adjustment value. Repeat for each specified frequency and value for [RS] to [RS]. RSSI FLATNESS Set the SSG as; Automatic adjustment [RL] [RH] Frequency : Specifi ed frequency* Modulation : None Level : Specifi ed level Push [TS MODE]/[SET SKIP] to store the adjustment value. Repeat for each specifi ed frequency and value for [RL] to [RH]. Refer to the ADJUSTMENT ITEM LIST on page -. The output level of the standard signal generator (SSG) is indicated as the SSG's open circuit. *Displayed on the controller's display. -

23 - MAIN-B UNIT ADJUSTMENT (R only) ADJUSTMENT OPERATION VALUE Set the adjustment items as below before the adjustment. Automatic adjustment [LT] [HTF] [AGA] : A [IFA] : Connect an SSG to the antenna connector ANT and set as; Frequency : Specifi ed frequency* Modulation : none Level : Specifi ed level Push [SET SKIP] to store the set value. Repeat for each specifi ed frequency then level for [LT] to [HTF]. AGC GAIN Connect an SSG to the antenna connector and set as; mw (FM) Frequency : Specifi ed frequency* [AGF] Mode : FM Deviation :. khz Level : + dbµ ( dbm) Modulation : khz Connect a speaker and milliwatt meter and set the audio output level to mw with [VOL]. Push [MAIN NB] to select next adjustment item. (AM) Set the SSG as; mw [AGA] Frequency : Specifi ed frequency* Mode : AM Deviation : % Level : + dbµ ( dbm) Modulation : khz Set the audio output level to mw with [DIAL]. Verify that the demodulated audio signals are not distorted badly. Push [SET SKIP] to store the adjustment value. IF GAIN Set the SSG as; mw (FM) Level : OFF [IFF] Connect a speaker and milliwatt meter then set the audio output level to mw with [VOL]. Push [SET LOCK]/[MAIN NB] to select next adjustment item. (AM) Set the audio output level to µw with [DIAL]. µw [IFA] Push [TS MODE]/[SET SKIP] to store the adjustment value. The output level of the standard signal generator (SSG) is indicated as the SSG's open circuit. *Displayed on the controller's display. -

24 - MAIN-B UNIT ADJUSTMENT (R only; continued) ADJUSTMENT OPERATION VALUE S-METER Set the SSG as; Automatic adjustment [NS] [WS] Frequency : Specifi ed frequency* Modulation : None Level : Specifi ed level Push [SET SKIP] to store the adjustment value. Repeat for each specified frequency and value for [NS] to [WS]. S-METER FLATNESS Set the SSG as; Automatic adjustment [LL] [LH] Frequency : Specifi ed frequency* Modulation : None Level : Specifi ed level Push [SET SKIP] to store the adjustment value. Repeat - for each specifi ed frequency and value for [LL] to [LH]. CENTER METER Set the SSG as; Automatic adjustment [CML] (LOW) Frequency : khz lower than specifi ed frequency* Modulation : None Level : + dbµ ( dbm) Push [SET SKIP] to store the adjustment value. [CMH] (HIGH) Set the SSG as; Frequency : khz higher than specifi ed frequency* Modulation : None Level : + dbµ ( dbm) Push [SET SKIP] to store the adjustment value. SQUELCH Set the SSG as; Automatic adjustment [SQL] Frequency : Specifi ed frequency* Mode : FM Modulation : khz Deviation :. khz Level : dbµ ( dbm) Set the [SQL] value to close the squelch with [DIAL]. Then set the [SQL] value at the point where the audio signals just appear. Turn the SSG output OFF, and verify that the squelch is closed. Push [SET SKIP] to store the adjustment value. RSSI Set the SSG as; Automatic adjustment [RS] [RS] Frequency : Specifi ed frequency* Modulation : None Level : Specifi ed level Push [SET SKIP] to store the adjustment value. Repeat for each specified frequency and value for [RS] to [RS]. RSSI FLATNESS Set the SSG as; Automatic adjustment [RL] [RH] Frequency : Specifi ed frequency* Modulation : None Level : Specifi ed level Push [SET SKIP] to store the adjustment value. Repeat for each specifi ed frequency and value for [RL] to [RH]. Refer to the ADJUSTMENT ITEM LIST on page -. The output level of the standard signal generator (SSG) is indicated as the SSG's open circuit. *Displayed on the controller's display. -

25 ADJUSTMENT ITEM LIST ADJUSTMENT ITEM Disp. RF Level (dbµ/dbm) REFERENCE FREQUENCY REF* LT / MT / HT / LT / MT / HT / LT / MT / HT / LT / HT / LT / MT / HT / LT / MT / HT / LT / HT / LT / MT / HT / LT9 / MT9 / HT9 / LTA / HTA / LTB / MTB / HTB / LTC / HTC / LTD / HTD / LTE / THE / LTF / MTF / HTF / AGC gain AGF / AGA / IF gain IFF off IFA off NS / NS / NS / 9 NS / NS9 / NS 9/ NS / NS 9/ S-METER WS / WS / WS / 9 WS / WS9 / WS 9/ WS / WS 9/ NS / ADJUSTMENT ITEM S-METER S-METER FLATNESS RF Disp. Level (dbµ/dbm) NS / 9 NS / 9 NS / NS9 / NS / NS / NS / WS 9/ 9 WS / 9 WS / WS / 9 WS9 / WS / WS / WS / L-* / L-* / L-* / L-* / LL / L / L / L / L / L / L / L / LH / LL / L / L / L / L / L / L / LH / LL / L / L / L / L / L / L / L / L / LH / LL / L / L / L / L / L / L / L / L / L9 / LA / LH / L9L* / L9H* / LAL* / LA* / ADJUSTMENT ITEM S-METER FLATNESS BAND SCOPE CENTER METER RF Disp. Level (dbµ/dbm) LA* / LA* / LA* / LA* / LA* / LA* / LA* / LAH* / LBL* / LB* / LB* / LB* / LB* / LB* / LB* / LB* / LB* / LB9* / LBA* / LBH* / LCL* / LCH* / LDL* 9/ LD* 9/ LD* 9/ LD* 9/ LD* 9/ LD* 9/ LD* 9/ LD* 9/ LD* 9/ LDH* 9/ LEL* 9/ LE* 9/ LE* 9/ LE* 9/ LE* 9/ LE* 9/ LE* 9/ LE* 9/ LE* 9/ LE9* 9/ LEA* / LEH* / SC* / SC* / 9 SC* / SC* / SC9* / SC* / SC* / SC* / CML / CMH / SQUELCH SQL / RSSI *: Not necessary for MAIN-B adjustment. The output level of the standard signal generator (SSG) is indicated as the SSG's open circuit. RS / RS / RS / RS / 9 RS9 / 9 RS / ADJUSTMENT ITEM RSSI FLATNESS RF Disp. Level (dbµ/dbm) RS / RS / RL / R / R / R / R / R / R / R / RH / RL / R / R / R / R / R / R / RH / RL / R / R / R / R / R / R / R / R / RH / RL / R / R / R / R / R / R / R / R / R9 / RA / RH / -

26 SECTION PARTS LIST IC-R IC-R [REPLACEMENT UNITS] ORDER NO. UNIT NAME U R CONTROL 9 U R CONTROL [LOGIC UNIT] NO. NO. LOCATION IC 9 S.REG S-CAMC-CN-G T./ IC S.IC BAF T./. IC 9 S.IC XCPPR T 9./. IC S.IC SNAHCGHDCT T 9./. IC S.IC TAF (TEL Q) B./. IC 9 S.REG ANSP-E B./. IC S.IC µpcg-e-a T /. IC9 9 S.IC ANLM-(E) T 9./ IC 9 IC LAA-E IC 9 S.IC LCT-I/SM B./ IC 99 S.IC SNLVCGDCKR T.9/. IC 9 S.IC PCM9E/K T./. IC S.IC SMBT-G-E T./. IC S.IC MFGPGP (RX9A) [EUR], [UK], [CAN], [EXP-] B.9/. S.IC MFGPGP RX9A- [SEA] B.9/. S.IC MFGPGP (RX9A-) [FRA], [EXP] B.9/. 9 S.IC MFGPGP (RX-9B) [USA], [USA-] B.9/. IC9 9 S.IC BUFS-E B 9./9. IC 9 S.IC CP-GM T./9. IC S.IC LM9PWR T 9/.9 IC S.IC SNAHCGHDCT T./. IC S.IC LM9PWR T./9. IC 9 S.IC USB-AEZG T./. IC S.IC CD9BPWR T 9/. IC S.IC S-9CNMC-G9CTG B 9./. IC S.IC CD9BPWR T 9./. IC 99 S.IC SNLVCGDCKR B./. IC S.IC SNAHCGHDCT T./ IC S.IC SNAHCGHDCT T./ IC* S.IC TAF (TEL Q) B./. IC* 9 S.REG ANSP-E B./. IC* S.IC LM9PWR T./ IC* S.IC SNAHCGHDCT T.9/. IC* S.IC LM9PWR T./. IC* S.IC SNAHCGHDCT T 9./9. IC9* S.IC SNAHCGHDCT T 9./. IC* S.IC SNAHCGHDCT T./. IC* S.IC SNAHCGHDBV T./. IC9* S.IC SNAHCGHDCT T./. Q S.FET SJ (TEL NQ) T./. Q S.TR SBS-TL-E T./. Q 9 S.TR DTCEUA T T./. Q 9 S.TR XP-(TX) AB T /. Q9 S.TR SC TLS T./. Q 9 S.TR SC-B (TER F) B /. Q S.TR SA-GR (TER) T./. Q S.TR SC TLS T 9./. Q 9 S.TR UNR9J-(TX) T./. Q 9 S.TR UNR9J-(TX) T./ Q S.TR SB9-T-AZ DK T./. Q 9 S.TR SC-GR (TER F) T./9. Q 9 S.TR UNR9J-(TX) T./. Q* 9 S.TR DTCEUA T T /. Q* S.TR SB T-TD-E T / Q* S.TR SA-GR (TER) T.9/. Q* S.TR SC TLS T./.9 Q9* S.TR SB9-T-AZ DK T./. Q* S.TR SB9-T-AZ DK T.9/ Q* S.TR SC-BL (TER F) T 9./. Q* S.TR SC-BL (TER F) T./.9 Q* S.TR SA-GR (TER) T./. Q* S.TR SA-GR (TER) T 9./. Q9* 9 S.TR UNR9J-(TX) T./9. D S.DIO SR- TE T./. *IC-R only [LOGIC UNIT] NO. NO. LOCATION D S.DIO SS TE- T 9./. D S.DIO SS (TER F) T 99./. D S.ZEN MA-M (TX) T./. D 9 S.DIO MAS-(TX) Except [EUR], [UK], [USA], [USA-] only T./. D 9 S.DIO MAS-(TX) [USA], [FRA], [CAN] only T./. D 9 S.DIO MAS-(TX) [UK], [USA], [CAN] only T./. D 9 S.DIO MAS-(TX) [EUR], [FRA] only T./. D 9 S.DIO MAS-(TX) T 9./. D 9 S.DIO MAS-(TX) [EUR], [FRA] only T./. D 9 S.DIO MAS-(TX) T /. D 9 S.DIO MAS-(TX) T /. D 9 S.DIO MAS-(TX) [EUR], [FRA] only T./. D S.VCP HVCBTRF-E B./. D 9 S.DIO MAS-(TX) T./. D 9 S.DIO ISS TE T 9./. D 9 S.DIO ISS TE T./. D 9 S.DIO ISS TE T./. D 9 S.DIO ISS TE T.9/. D 9 S.DIO ISS TE T./. D 9 S.DIO ISS TE T 9./. D 9 S.DIO MAS-(TX) T./. D 9 S.DIO MAS-(TX) B.9/. D 9 S.DIO MAS-(TX) B 9./ D* 9 S.DIO MAS-(TX) T./. D* 9 S.DIO MAS-(TX) T./. D9* 9 S.DIO ISS TE T./. X S.XTL CR- (. MHz) B./. X S.XTL CR- (.9 MHz) B /.9 X S.XTL CR- (. MHz) B./. X S.XTL CR- (. MHz) B./ L COL RCRDNP-K L S.COL ELJFC K-F T 99.9/.9 L S.COL ELJFB K-F T./.9 L S.COL ELJFC K-F T./. R S.RES ERJGEYJ V (. k) T./9 R S.RES ERJGEYJ V ( k) T /9 R S.RES ERJGEJ X ( k) T./. R S.RES ERJGEJ-JPW T./. R S.RES ERJGEJ-JPW T./. R S.RES ERJGEJ X () T /.9 R 9 S.RES ERJGEJ X (. k) T./ R S.RES ERJGEJ 9 X (.9 k) T./ R S.RES ERJGEJ X (. k) T./. R S.RES ERJGEJ X () T./. R S.RES ERJGEYJ V (. k) T./. R 9 S.RES ERAYED V ( k) T 9./. R9 S.RES ERJGEJ X ( k) T./. R S.RES MCREZHJ k T.9/ R S.RES ERJGEYJ V () T./9. R S.RES ERJGEYJ V () T./9 R S.RES ERJGEJ X ( M) B /. R S.RES ERJGEYJ V ( k) T 9./ R9 S.RES MCREZHJ. (R) B /9. R S.RES ERJGEYJ V () T./. R S.RES ERJGEYJ 9 V (9 k) T./. R S.RES ERJGEJ X () T./. R 9 S.RES ERJGEJ X ( k) T./. R S.RES ERJGEJ X ( k) B./9. R S.RES ERJGEJ X ( k) B./. R S.RES ERJGEJ X ( k) T./. R S.RES ERJGEJ X ( k) B./. R S.RES ERJGEJ X (. k) T /. R S.RES ERJGEJ X () T./. R S.RES ERJGEJ X ( k) T./. R S.RES ERJGEJ X ( k) B./9. R S.RES ERJGEJ X () T./. R S.RES ERJGEJ X ( M) T./. R 9 S.RES ERJGEJ X ( k) B 9./. R 9 S.RES ERJGEJ X () T /. R S.RES ERJGEJ X (. k) T./9. R S.RES ERJGEJ X ( k) B 9.9/. R S.RES ERJGEJ 9 X (.9 k) B 9.9/. R S.RES ERJGEJ X ( k) T.9/. M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side) S.=Surface mount -