SERVICE MANUAL. VHF AIR BAND TRANSCEIVER ia110

Transcript

1 SRVI MANUAL VHF AIR AND TRANSIVR ia0

2 INTRODUTION This service manual describes the latest service information for the I-A0 VHF AIR AND TRANSIVR at the time of publication. L VRSION SYMOL General GN I-A0 General- GN- U.S.A. USA U.S.A.- USA- To upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation. DANGR NVR connect the transceiver to an A outlet or to a D power supply that uses more than V. This will ruin the transceiver. DO NOT expose the transceiver to rain, snow or any liquids. DO NOT reverse the polarities of the power supply when connecting the transceiver. DO NOT apply an RF signal of more than 0 dm (00 mw) to the antenna connector. This could damage the transceiver s front end. ORDRING PARTS e sure to include the following four points when ordering replacement parts:. 0-digit order numbers. omponent part number and name. quipment model name and unit name. Quantity required <SL ORDR> 0000 S.I T0AFN I-A0 MAIN UNIT pieces 0000 Screw T Mx NI-ZU I-A0 ottom cover 0 pieces Addresses are provided on the inside back cover for your convenience. RPAIR NOTS. Make sure a problem is internal before disassembling the transceiver.. DO NOT open the transceiver until the transceiver is disconnected from its power source.. DO NOT force any of the variable components. Turn them slowly and smoothly.. DO NOT short any circuits or electronic parts. An insulated tuning tool MUST be used for all adjustments.. DO NOT keep power ON for a long time when the transceiver is defective.. DO NOT transmit power into a signal generator or a sweep generator.. ALWAYS connect a 0 d to 0 d attenuator between the transceiver and a deviation meter or spectrum analyzer when using such test equipment.. RAD the instructions of test equipment thoroughly before connecting equipment to the transceiver.

3 TAL OF ONTNTS STION SPIFIATIONS STION INSID VIWS STION IRUIT DSRIPTION - RIVR IRUITS TRANSMITTR IRUITS PLL IRUITS POWR SUPPLY IRUITS PORT ALLOATIONS... - STION ADJUSTMNT PRODURS - PRPARATION PLL ADJUSTMNT TRANSMITTR ADJUSTMNT RIVR ADJUSTMNT... - STION PARTS LIST STION MHANIAL PARTS AND DISSASMLY STION SMI-ONDUTOR INFORMATION STION OARD LAYOUTS - FRONT UNIT MAIN UNIT... - STION LOK DIAGRAM STION 0 VOLTAG DIAGRAM 0 - FRONT UNIT MAIN UNIT...0 -

4 STION SPIFIATIONS GNRAL Frequency coverage :.000. MHz hannel spacing : khz [GN], [GN-] khz/. khz [USA], [USA-] Type of emission : AM (K00A) Number of memory channels : 0 channels Antenna connector : - (0 Ω) Power supply requirement :. V D or. V D (negative ground) urrent drain (at. V D) : Transmit.0 A Receive max. audio output.0 A stand-by 00 ma Frequency stability : ± ppm Usable temperature range : 0 to 0 ; F to 0 F Dimensions (projections not included) : 0(W) 0(H) 0(D) mm; (W) (H) (D) in Weight (with ant., P-0) :. g; lb oz TRANSMITTR RF output power (at. V D) :.0 W (typical) Modulation system : Last stage modulation Input impedance : 00 Ω Modulation limitting : 0 00 % Audio harmonic distortion : Less than 0 % (at % modulation) Ham and noise ratio : More than 0 d Spurious emissions : dm or less (except ±. khz of operating frequency) Antenna requirements : Standard 0 Ω antenna with a VSWR < : RIVR Receive system : Double conversion superheterodyne system Intermediate frequencies : st. MHz nd 0 khz Sensitivity : Less than µv at d S/N Squelch sensitivity : Less than 0. µv at threshold Selectivity : At khz channel spacing At. khz channel spacing ± khz Less than d ±. khz Less than d ± khz Less than 0 d ±. khz Less than 0 d ± khz Less than 0 d Spurious response rejection ratio : More than dµ Hum and noise : More than d Audio output power (at. V D) : xt SP More than 0.0 W at 0 % distortion with an Ω load Side tone More than 00 mw at 0 % distortion with an 00 Ω load Audio output impedance : xt SP Ω Side tone 00 Ω Specifications are measured in accordance with F Part and RTA DO-a. (RTA DO-a: lass /, lass /) All stated specifications are subject to change without notice or obligation. -

5 STION INSID VIWS MAIN UNIT <TOP VIW> Power complifier (Q: MRF) AP amplifier (Q: S0) VO circuit Low-pass filter Antenna switching circuit rystal band pass filter (FI: FL-0 [USA/-] only) rystal band pass filter (FI: FL-0) TXO (X: R-) eramic band pass filter (FI: FWM0D) eramic band pass filter (FI: FG0H [USA/-] only) <OTTOM VIW> Low-pass filter Antenna switching circuit RX st mixer (Q: SK) AF amplifier (I: TDAD) nd IF I (I0: TAFN) PROM (I: A0F) PLL I (I: T0AFN) PWM modulator (I: µp) AF power amplifier (Q,: SK) -

6 STION IRUIT DSRIPTION - RIVR IRUITS -- ANTNNA SWITHING IRUIT The antenna switching circuit functions as a low-pass filter while receiving. However, its impedance becomes very high while D and D are turned ON. Thus transmit signals are blocked from entering the receiver circuits. The antenna switching circuit employs a λ type diode switching system. The passed signals are then applied to the RF amplifier circuit. Received signals are passed through the low-pass filter (L, L, L,, 0, ). The filtered signals are applied to the λ type antenna switching circuit (D, D). -- RF IRUIT The RF circuit amplifies signals within the range of frequency coverage and filters out-of-band signals. The signals from the antenna switching circuit are amplified at the RF amplifier (Q) after passing through the RX attenuator (D, L, R), bandpass filter (L, L, 0,,, ) and two-stage tunable bandpass filters (the first filter is consisted of D, L,, 0 and the second filter is consisted of D, L,, 0). The amplified signals are applied to the st mixer circuit (Q, gate ) after out-of-band signals are suppressed at the another two-stage tunable bandpass filters (D, L0,, 0 and D, L,, ). The tunable bandpass filters (D D, D) which employ varactor diodes, track the filters and are controlled by the PLL I (I) via the tune buffer amplifier (Q) using TUN signal. These diodes tune the center frequency of an RF passband for wide bandwidth receiving and good image response rejection. -- ST MIXR AND ST IF IRUITS The st mixer circuit converts the received signal into a fixed frequency of the st IF signal with a PLL output frequency. y changing the PLL frequency, only the desired frequency will pass through a crystal filter at the next stage of the st mixer. The filtered signals from the RF circuit are mixed at the st mixer (Q) with a st LO signal coming from the VO circuit to produce a. MHz st IF signal. The st IF signal is applied to a pair of crystal filter [Wide mode: FI, Narrow mode: FI] to suppress out-of-band signals. The filtered st IF signal is applied to the IF amplifier (Q), then applied to the nd mixer circuit (I0, pin ). -- ND MIXR AND ND IF IRUITS The nd mixer circuit converts the st IF signal into a nd IF signal. A double conversion superheterodyne system (which converts receive signals twice) improves the image rejection ratio and obtains stable receiver gain. The st IF signal from the IF amplifier is applied to the nd mixer section of the IF I (I, pin ), and is mixed with the. MHz nd LO signal to be converted into a 0 khz nd IF signal. A nd LO signal (. MHz) is produced at the PLL circuit by tripling it s reference frequency (. MHz). The nd IF signal from the nd mixer (I, pin ) passes through a ceramic filter [Wide mode: FL, Narrow mode: FI] to remove unwanted heterodyned frequencies. It is then amplified at the nd IF amplifiers (Q Q). Receiver construction.000. MHz LPF FI [Wide], D, D, FI [Narrow] st mixer D D D D Q D Q. MHz Tuned RF Tuned XTAL Ant SW ATT PF PF PF PF Q IF st LO signal.. MHz from VO circuit. MHz signal from TXO (X) to AF circuit AM DT "TUN" signal IF Q IF Q, Q Tripler Q, Q 0 khz XTAL PF FI [Wide], FI [Narrow] nd IF I nd LO signal. MHz -

7 -- AM DTTOR IRUIT (MAIN UNIT) The AM detector circuit converts the nd IF signal into AF signals. The amplified nd IF signal from the nd IF amplifier (Q) is applied to the AM detector circuit (Q). It is then detected for conversioin to AF signals. The AF signals are applied to the AF circuit. -- AF IRUIT (MAIN UNIT) The AF circuit amplifies the demodulated AF signals to drive a speaker. The AF signals are passed through the low pass filter (I, pin ), and then applied to the /AF select swtich (I, pin ). The AF signals are amplified at the AF amplifier (I, pin ), and are then passed through the RMUT swtich (I) and electric-volume switch (I, pins, ) to control AF level. The level controlled signals are then applied to the mute switch (I0, pin ). While in using the internal speaker or connecting outer speaker jack, the AF signals are applied to the /AF swtich (I, pin ) via the AF mute swtich (I). The applied AF signals are compared at the PWM I (I) with the reference signal from the triangular wave oscillator (I), and are then converted to the PWM wave form. The AF signals are amplified at the FT driver (I) and AF power amplifiers (Q, Q). The amplified AF signals are applied to the SP mute switch (D, Q0, Q00) via the line filter (L L, L,,,, ). The filtered AF signals are applied to the internal speaker via the [XT SP] jack (J). While in connecting the head set, the AF signals are amplified at the AF power amplifier (I, pin ), and then applied to the A connector (J, pin ) via the impedance convertor (T). -- SQULH IRUIT (MAIN AND FRONT UNITS) The squelch circuit cuts out AF signals when receiving no modulated signal. When no voice modulation is included in the signal, the squelch circuit cuts out the AF signal by comparing voice audio and noise audio components in the AF detected signals. The nd IF signal from the IF I (MAIN unit; I0, pin ) passes through the 0 khz ceramic filter (Wide mode: FI, Narrow mode: FI) to remove out-of-band signals, and then applied to the IF amplifier. A portion of the amplified nd IF signal from the IF amplifier (MAIN unit; Q) is applied to the IF amplifier section on the IF I (MAIN unit; I0, pin ). The amplified signal passes through the RSSI section, and are then applied to the squelch amplifier (MAIN unit; I, pin ) as RSSI signal. The amplified RSSI signal at I is output from pin as SQLI signal, and is then applied to the PU (FRONT unit; I, pin ). The PU analyzes the noise condition and outputs the AFMUT signal via the output expander I (FRONT unit; I) to switch the SP mute switch (Q00, Q0), etc. When connecting the head set, RMUT signal from the PU via the output expander I (FRONT unit; I) is applied to the RMUT circuit (MAIN unit; I, Q0, Q). ven when the squelch is closed, the mute switch (I0) opens at the moment of emitting beep tones. -- AG IRUIT (MAIN UNIT) The AG (Automatic Gain ontrol) circuit reduces signal fading and keeps the audio output level constant. AF signal from the AM detector circuit (Q) is amplified at AG amplifiers (Q, Q). The amplified signal from Q is applied to the IF amplifier (Q, Q). The other amplified signal from Q is applied to the RF amplifier (Q), and the RX attenuator (D) via the buffer amplifier (Q). These amplifiers reduce the amplifier gain of IF amplifiers (Q, Q) and the RF amplifier (Q) while receiving a strong signal. AG circuit From the ant. D RX ATT Q RF st mixer Q XTAL PF Q IF nd mixer I0 PF Q, Q IF Q IF D AM DTTOR Q uffer "IF AG" signal Q AG "RF AG" signal Q AG to AF circuit -

8 - TRANSMITTR IRUITS -- MIROPHON LIFIR IRUIT (MAIN UNIT) The microphone amplifier circuit amplifies audio signals from the microphone, within d/octave pre-emphasis characteristics (00 Hz khz), to a level needed for the modulation circuit. The AF signals from the microphone are applied to the IN/XT MI switch (I, pin ) via the MI signal. When using a headset, XTMI signal are applied to the external switch (I, pin ) via R to adjust the external microphone level. The output signal from I (pin ) are applied to the AL amplifier (I, pin ) via R0 to adjust the microphone sensitivity. The output signal from I (pin ) are amplified at the AF amplifier (I), and then applied to the /AF switch via the high-pass filter (I) and low-pass filter (I) to filter out RF components. The filtered signals are applied to the modulation circuit. -- ULATION IRUIT (MAIN UNIT) The modulation circuit modulates the VO oscillating signal (RF signal) using the microphone AF signal. The audio signals are passed through the /AF switch (I, pin ) via the modulation depth adjustment pot R. The signals are converted to the PWM wave form at the PWM (Pulse-Width-Modulation) I (I, pin ), and power amplified at the FT driver (I, pin ) and power MOS FT (Q, Q). The power-amplified signals are passed through the line filter (L L, L,,,,, ), and then applied to the drain of power amplifier (Q) for the last stage modulation. -- DRIV/POWR LIFIR IRUITS (MAIN UNIT) The amplifier circuit amplifies the VO oscillating signal to the output power level. The signal from the buffer amplifiers (Q, Q) is passed through the TX/RX switch (D), and is amplified at the preamplifier (Q), pre-drivers (Q0, Q) and the power amplifier (Q) to obtain W of RF power. The amplified signal is passed through the antenna swtiching circuit (D) and low-pass filter, and is then applied to the antenna connector. -- AP IRUIT (MAIN UNIT) The AP (Automatic Power ontrol) circuit protects the drive and power amplifiers from mismatched output loads. The AP detector circuit (D, D) detects forward and refrected signals respectively. The combined voltage is at a minimum level when the antenna is matched at 0 Ω and is increased when it is mismatched. The detected voltage is applied to one of the AP controller inputs (I0, pin ) and a power setting voltage is applied to the other input (pin ). When the antenna impedance is mismatched, the detected voltage exceeds the reference voltage. Thus the bias voltage of the pre-drivers is decreased. AP control circuit Pre-amplified signal (from MAIN unit; Q) Q0 PR DRIV " V" signal from the AF power amplifiers (MAIN unit; Q, Q) Q Power detector circuit Q L PR DRIV PWR to the Antenna D R L R D Q PWR NT Q AP Q I0 AP NT R R "TMUT" signal from the expander I (Front unit; I; pin ) R R R0 (Power adjustment) T -

9 - PLL IRUIT -- GNRAL (MAIN UNIT) A PLL circuit provides stable oscillation of the transmit frequency and receive st LO frequency. The PLL output compares the phase of the divided VO frequency to the reference frequency. The PLL output frequency is controlled by the divided ratio (N-data) of a programmable divider. The PLL circuit contains of the TX-VO and RX-VO circuits. The oscillated signals are applied to the buffer amplifiers (Q, Q) then applied to the PLL I (I, pin ). I is a dual PLL I which controls VO circuits for TX and RX. The PLL circuit, using a one chip PLL I (I), directly generates the transmit frequency and receive st IF frequency with VOs. The PLL sets the divided ratio based on serial data from the PU on the FRONT unit and compares the phases of VO signals with the reference oscillator frequency. The PLL I detects the out-of-step phase and output from pin for TX and RX, respectively. The reference frequency (. MHz) is oscillated at X. -- TX LOOP The generated signal at the TX-VO (Q, D) enters the PLL I (I, pin ), and is divided at the programmable divider section and is then applied to the phase detector section. The phase detector compares the input signal with a reference frequency, and then outputs the out-of-phase signal (pulse-type signal) from pin. -- RX LOOP The generated signal at the RX-VO (Q, D) enters the PLL I (I, pin ), and is divided at the programmable divider section. The divided signal is then applied to the phase detector section. The phase detector compares the input signal with a reference frequency, and then outputs the out-of-phase signal (pulse-type signal) from pin. The pulse-type signal is converted into D voltage (lock voltage) at the loop filter (R, R,, 0), and then applied to the varactor diode (D) of the RX-VO to stabilize the oscillated frequency. The lock voltage is also used for the receiver circuit for the bandpass filter center frequency. The lock voltage from the PLL I (I, pin ) passes through the low-pass filter, and is applied to the tune buffer amplifier (Q). The amplified signal is applied to the RF bandpass filters (D, D and D, D) via the tune adjustment pot (R). -- VO IRUIT The VO outputs from Q (TX) and Q (RX) are buffer amplified at Q, and are applied to the buffer amplifiers (Q, Q). The amplified signal is applied to the T/R switch (D0, D). The receive LO signal is applied to the st mixer circuit (Q), and the transmit signal is applied to the preamplifier (Q). A portion of the VO signal is amplified at the buffer amplifier (Q), and then fed back to the PLL I (I, pin ). The pulse-type signal is converted into D voltage (lock voltage) at the loop filter (R, R,, 0), and then applied to the varactor diode (D) of the TX-VO to stabilize the oscillated frequency. PLL circuit Loop filter TX VO Q, D RX VO Q, D uff. I (PLL I) Q Q uff. Q uff. Q uff. D D0 TX/RX switch to transmitter circuit to st mixer circuit (Q) Phase detector Programmable counter Prescaler TXO (X). MHz Programmable divider Shift register SK PLST Q, Q LPF Q Tune buff. R (RF PF adjustment). MHz nd LO signal to the nd IF I (I0, pin ) to the RF PF (D and D, D and D) -

10 - POWR SUPPLY IRUITS VOLTAG LINS (MAIN UNIT) LIN V PUV T R DSRIPTION The voltage from the external D power connector which is controlled by the power switch ([VOL] control). ommon V converted from the line by the V regulator circuit (I). The output voltage is applied to the V regulator circuit (I), the ripple filter (Q), and etc. ommon V converted from the line by the V regulator (I) and V current amplifier (Q, Q, D) circuits. The output voltage is applied to the electric volume I (I), buffer amplifiers (Q, Q), and etc. ommon V converted from the line by V regulator (Q, D) and V regulator circuits (I). The output V voltage is applied to the PU (FRONT unit; I). V for transmitter circuits regulated by the V regulator circuit (I). V for receiver circuits regulated by the V regulator circuit (I). - PORT ALLOATIONS -- OUTPUT XPANDR I (FRONT unit: I) Pin number, Port name LD, LD TR R/T SMUT AFMUT RMUT TMUT Description Outputs backlight control signals. LD LD acklight condition Low Low Light OFF High Low No establishment Low High Light ON, Dimmer ON High High Light ON, Dimmer OFF Outputs control signal to the /AF swtich (MAIN unit: I, pin ) and etc. High: While transmitting. Outputs control signal to the TX/RX switch (MAIN unit: Q, pin ) for VO. Low: While transmitting. Outputs AF mute swtich (MAIN unit: I0, Q, Q, Q, D) control signal. Low: While squelched. Outputs control signal to the mute switch (MAIN unit; Q00, Q0, D) for speaker amplifier, and etc. Low: While the speaker output is muted. Outputs RMUT switch (I) control signal. Low: While squelched. Outputs T regulator control signal. Low: When TX is muted. -

11 -- PU (FRONT unit; I) Pin number Port name Description Pin number Port name Description,,,,, 0 KR RST PSW Input ports for the key matrix. Input port for the PU reset signal. Outputs control signal for the power supply circuit. High: Power is ON. 0 HANG PTT KR KR Input port for the microphone hanger detection signal. Low: Microphone on hook. Input port for the PTT switch. High: While PTT switch is pushed. Input ports for the key matrix. P Outputs beep audio signals. K Outputs clock signal to the PROM (FRONT unit; I, pin ). Outputs data signal to the PROM (FRONT unit; I, pin ). S Outputs chip select signal to the P- ROM (FRONT unit; I, pin )., DLA, DL Input port for the [DIAL] control signal. O Outputs control signal to the expander I (FRONT unit; I, pin ). XST Outputs strobe signals to the expander I (FRONT unit; I, pin ). 0 VS Outputs chip select signal to the electric volume (MAIN unit; I). Low: While volume is controlled. SK Outputs serial clock to the PLL I (MAIN unit; I, pin ), the expander I (FRONT unit; I, pin ) and the electric volume (MAIN unit; I, pin ). SI Input port for the data signal from the PROM (FRONT unit; I, pin ). Outputs serial data to the PLL I (MAIN unit; I, pin ), the expander I (FRONT unit; I, pin ) and the electric volume (MAIN unit; I, pin ). PLST Outputs strobe signals to the PLL I (MAIN unit; I, pin ). Outputs nd IF filter s select signal. High: While wide is selected. UNLK Input port for the unlock signal from the PLL I (MAIN unit; I, pin ). Low: PLL is unlocked. 0 LIN Input port for the cloning signal. LO Output port for the cloning signal. PSW Input port for the POWR switch. Low: While POWR switch is pushed SQLI Input port for the squelch signal. -

12 STION ADJUSTMNT PRODURS - PRPARATION Some versions may need the optional S-A0 LONING FTWAR and OP-, OP- LONING AL for setting the adjustment frequency. All adjustments must be performed on the [Wide] mode. RQUIRD TST QUIPMNT QUIPMNT GRAD AND RANG QUIPMNT GRAD AND RANG D power supply RF power meter (terminated type) Frequency counter Output voltage :. V D urrent capacity : 0 A or more Measuring range : 0 W Frequency range : 0 00 MHz Impedance : 0 Ω SWR : Less than. : Frequency range : MHz Frequency accuracy : ± ppm or better Sensitivity : 00 mv or better D voltmeter Digital multimeter Audio generator Standard signal generator (SSG) A millivoltmeter Input impedance Input impedance Frequency range Measuring range Frequency range Output level Measuring range : 0 kω/v D or better : 0 MΩ/V D or better : Hz : 00 mv : MHz : 0. µv mv ( to dm) : 0 mv 0 V Modulation analyzer Frequency range : D 00 MHz Measuring range : 0 to 00 % Attenuator Power attenuation apacity : 0 or 0 d : 0 W or more Distortion meter Frequency range : khz±0 % Measuring range : to 00 % Terminator Impedance apacity : 0 Ω : 0 W or more xternal speaker Impedance : Ω VFO HANNL ID LIST hannel spacing:./ khz [USA/USA-] hannel spacing: khz [GN/GN-] Operating Freq. (MHz) hannel spacing (khz) hannel ID (Displayed Freq.) Operating Freq. (MHz) hannel spacing (khz) hannel ID (Displayed Freq.) etc etc -

13 ONNTION Modulation analyzer Attenuator 0 d or 0 d RF power meter 0 Ω, 0 W Power supply D. V, 0 A Standard signal generator (SSG) MHz to dm (0. µv to mv) AUTION! DO NOT transmit while an SSG is connected to the antenna connector. Frequency counter to the antenna connector to the external speaker jack Distortion meter A millivoltmeter Speaker ( Ω) MI JAK PIN ONNTION Pin (PTT) Pin () Pin (MI ) Audio generator A millivoltmeter Pin (MI ) A millivoltmeter to the microphone connector Audio generator 00 Hz to khz OP- loning connection OP- D female plug (incl. level converter circuit) Personal computer to an RS- port -

14 - PLL ADJUSTMNT ADJUSTMNT Vdd VOLTAG PLL LOK VOLTAG TUN VOLTAG RFRN FRQUNY ADJUSTMNT ONDITION Operating frequency :.000 MHz Receiving Operating frequency :.000 MHz Receiving Transmitting Operating frequency :.000 MHz Receiving Operating frequency :.0 MHz onnect an RF power meter or a 0 Ω dummy load to the antenna connector. Transmitting ADJUSTMNT MASURMNT VALU POINT UNIT LOATION UNIT ADJUST MAIN MAIN MAIN Rear panel onnect a digital multi-meter to drain terminal of Q. onnect a digital multi-meter to the check point P. onnect a digital multi-meter to the check point P. Loosely couple the frequency counter to the antenna connector.. V 0. V 0. V 0. V.00 MHz MAIN MAIN MAIN MAIN R L L0 R X - TRANSMITTR ADJUSTMNT ADJUSTMNT OUTPUT POWR ULATION DPTH HAD ST ULATION ADJUSTMNT ONDITION Operating frequency :.000 MHz No audio applied to the [MI] jack. Transmitting Operating frequecy :.000 MHz onnect an audio generator to the [MI] jack and set as : khz/0 mvrms Set a modulation analyzer as : HPF : OFF LPF : OFF De-emphasis : OFF Detector : (P P)/ Pre-set R0 and R on the MAIN unit to the center position. Transmitting Set an audio generator as: khz/ mvrms Transmitting Operating frequency :.000 MHz onnect an audio generator to the [XT MI] jack and set as : khz/ mvrms Transmitting ADJUSTMNT MASURMNT VALU POINT UNIT LOATION UNIT ADJUST Rear panel Rear panel Rear panel onnect an RF power meter to the antenna connector. onnect a modulation analyzer to the antenna connector through an attenuator. onnect a modulation analyzer to the antenna connector through an attenuator..0 W 0 % 0 % 0 % MAIN MAIN MAIN R0 R R0 R -

15 pin ( ) pin ( pin ( MI) MI) Audio generator pin ( PTT) J, pin Audio input point D power supply. V/0 A R Head set modulation adjustment Q Vdd voltage check point R TUN voltage adjustment P TUN voltage check point R0 Output power adjustment L0 PLL lock voltage adjustment for TX P PLL lock voltage check point R Vdd voltage adjustment R R0 Modulation depth adjustment L PLL lock voltage adjustment for RX X Reference frequency adjustment -

16 - RIVR ADJUSTMNT SQULH ADJUSTMNT must be performed at SQULH ADJUSTMNT. ADJUSTMNT RX SNSITIVITY SQULH ADJUSTMNT ONDITION Operating frequency :.000 MHz Pre-set L, L0, L, L on the MAIN unit to max. W. onnect an SSG to the antenna connector and set an SSG as : Level :.0 µv* ( 0 dm) Modulation : ± khz Mod. depth : 0 % Receiving Operating frequency :. MHz Receiving nter the Squelch adjustment mode. ): Program.000 MHz into memory channel. ): Turn power OFF. ): While pushing [SQL], [TS], [SAN], turn power ON. onnect an SSG to the antenna connector and set an SSG as : Level : 0. µv* ( dm) Modulation : OFF Receiving Set an SSG as : Level :. µv* ( dm) Modulation : OFF ADJUSTMNT MASURMNT VALU POINT UNIT LOATION UNIT ADJUST Rear panel Front panel onnect an A millivoltmeter and distortion meter with Ω load to the external [SP] jack. Display Maximum AF output level Maximum AF output level MAIN L, L0, L, L R Verify the display indicates sqadj0. NOT: If the display shows other, turn [MAIN DIAL] to select sqadj0. Push the [SAN] key to set the threshold level. Verify the display indicates sqadj. Push the [SAN] key to set the tight level. Turn power OFF to cancell the Squelch adjustment mode. NOT: Until turn power OFF, Squelch adjustment mode is not cancelled, and once pushing the [SAN] key, display indicates sqadj0 (threshold level adjustment) or sqadj (tight level adjustment) repeatedly *This output level of the standard signal generator (SSG) is indicated as SSG s open circuit. -

17 D power supply. V/0 A L L0 L L R RX sensitivity adjustment -

18 STION PARTS LIST [FRONT UNIT] RF ORDR NO. NO. I 0000 S.I HDAD I 0000 S.I S-0ANMP-DD-T I 0000 S.I TW0FU (TL) I 0000 S.I L0T-I/SN I 0000 S.I U0FV- Q Q Q Q Q Q Q DSRIPTION S.TRANSISTOR DTAZUA T S.TRANSISTOR SA--TL 0000 S.TRANSISTOR S--TL 0000 S.TRANSISTOR XP (TX) S.TRANSISTOR DTAZUA T S.TRANSISTOR DTUA T S.TRANSISTOR DTUA T0 D 0000 S.DIOD MA (TX) D S.DIOD DA0U T0 X S.RAMI PR. AR L S.OIL MLF0A R0K-T L S.OIL MLF0D RK-T R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) [FRONT UNIT] RF ORDR NO. NO. DSRIPTION S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 H H 00J-T-A S.RAMI 0 H H 00J-T-A S.RAMI 0 J K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 H H 0J-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0KT-N 0000 S.TANTALUM TMSVA M-L S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N 0000 S.TANTALUM TMSVA A 0M-L S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A J 0000 S.ONNTOR FH-0S-0.SV J 0000 ONNTOR 00- DS LD HL-000 DS S.LD L-0Y-D-T DS S.LD L-0Y-D-T DS S.LD L-0Y-D-T DS S.LD L-0Y-D-T DS S.LD L-0Y-D-T DS S.LD L-0Y-D-T S NODR VQF0 SP SPAKR SM-W W JUMPR RDST0 W JUMPR RDST0 W S.JUMPR RJG JPW V W S.JUMPR RJG JPW V W AL OP- (N:0 L:) P 000 P P 000 LD ONTAT SRN-0 ZSS S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.=Surface mount -

19 [MAIN UNIT] RF ORDR NO. NO. DSRIPTION I 0000 S.I T0AFN (L) I 0000 S.I A0F-T I 0000 S.I TAS0F (TR) I S.I TSF (TR) I S.I S-0HG-KD-T I S.I NJM0F-T I 0000 S.I T0F (HR) I S.I M0AD I 0000 S.I TWFU (TL) I 0000 S.I TWFU (TL) [USA/-] only I 0000 S.I TWFU (TL) [USA/-] only I 0000 S.I NJM0V-T I 0000 S.I TWFU (TL) I S.I TAL0F (TR) I S.I TSF (TR) I S.RG A0FP- I S.I TSF (TR) I 0000 S.I TAS0F (TR) I 0000 S.I TDAD (TDAD0TR) I S.I TAFN (L) I I TA0H I 0000 S.I TAS0F (TR) I 0000 S.I HIP0AI- I 0000 S.I µpg I S.I NJM0M-T I S.I M0AD I 0000 S.I HIP0AI- I 0000 S.I TWFU (TL) I S.I TAS0F (TR) I 0000 S.I TAS0F (TR) Q S.FT SK-R (TX) Q S.FT SK-R (TX) Q S.TRANSISTOR S-O (TR) Q S.TRANSISTOR S-O (TR) Q S.TRANSISTOR S-O (TR) Q S.TRANSISTOR S-O (TR) Q 0000 S.TRANSISTOR S--TL Q 0000 S.TRANSISTOR S0 T0 S Q 0000 S.TRANSISTOR S0--TL Q 0000 S.TRANSISTOR S0--TL Q 0000 S.TRANSISTOR S (M) -T R Q 0000 S.TRANSISTOR S-L (TR) Q S.FT SK0 (TL) Q S.FT SK0 (TL) Q 0000 S.TRANSISTOR S--TL Q S.TRANSISTOR S T00 R Q 0000 S.TRANSISTOR XP (TX) Q 0000 S.TRANSISTOR S-T R Q 0000 S.TRANSISTOR S-T R Q 0000 S.TRANSISTOR S-T R Q 0000 FT MRF Q S.TRANSISTOR SA--TL Q S.TRANSISTOR DTK T Q 0000 S.TRANSISTOR XP (TX) Q 0000 S.TRANSISTOR S-T R Q 0000 S.TRANSISTOR XP (TX) Q S.TRANSISTOR DTK T Q S.TRANSISTOR DTK T Q 0000 S.TRANSISTOR DT TL Q 0000 S.TRANSISTOR XP (TX) Q S.TRANSISTOR S0 T0 R Q S.TRANSISTOR S-T DK Q S.TRANSISTOR S0 T0 R Q S.TRANSISTOR SDA (TX) R Q S.TRANSISTOR SDA (TX) R Q S.FT SK0-GR (TR) Q S.TRANSISTOR DTAUA T0 Q S.TRANSISTOR DTUA T0 Q 0000 S.TRANSISTOR S0 T0 S Q 0000 S.TRANSISTOR S-Y (TR) Q 0000 S.TRANSISTOR S-Y (TR) Q 0000 S.TRANSISTOR XP (TX) Q 0000 S.FT SK-Z- Q 0000 S.FT SK-Z- Q 0000 S.TRANSISTOR XP0-(TX).A Q TRANSISTOR SAR Q 0000 S.FT SK-Z- Q 0000 S.FT SK-Z- Q 0000 S.FT SK-Z- Q 0000 S.FT FW-TL [MAIN UNIT] RF ORDR NO. NO. DSRIPTION Q S.TRANSISTOR DTUA T0 Q S.TRANSISTOR DTUA T0 Q S.TRANSISTOR SA-GR (TR) Q 0000 S.TRANSISTOR S-L (TR) Q S.FT FW-TL Q S.TRANSISTOR DTUA T0 Q S.TRANSISTOR S0 T0 S D S.DIOD UM0F D S.DIOD UM0F D S.DIOD UM0F D 0000 S.DIOD R0F-0T0 D 0000 S.DIOD R0F-0T0 D S.VARIAP HVU0TRF D S.VARIAP HVU0TRF D S.VARIAP HVU0TRF D S.DIOD MA (TX) D S.DIOD MA (TX) D 0000 S.ZNR MA0-L (TX) D 0000 S.DIOD MA (TX) D 0000 S.DIOD DSM-0 D 0000 S.DIOD MA (TX) D S.DIOD SV0 (TPH) [USA/-] only D S.DIOD SV0 (TPH) D S.DIOD SV0 (TPH) D S.DIOD SV0 (TPH) [USA/-] only D 0000 S.ZNR MA0-M (TX) D DIOD DSAA D S.VARIAP HVU0TRF D S.DIOD SV (TPH) D S.DIOD SS (TPH) D 0000 S.ZNR MA0-M (TX) D S.DIOD SV (TPH) D S.DIOD SV (TPH) D S.DIOD SV (TPH) D 0000 S.DIOD MAS-(TX) D 0000 S.DIOD MAS-(TX) D S.DIOD S0-0-T D 0000 S.DIOD DSM-0 D S.DIOD S0-0-T D S.DIOD S0-0-T D S.VARIAP HVU0TRF D S.VARIAP HVU0TRF D S.DIOD S0-0-T FI S.MONOLITH FL-0 (.0 MHz) FI S.MONOLITH FL-0 (.0 MHz) [USA/-] only FI RAMI FWM0D FI RAMI FG0H [USA/-] only FI S.FILTR AF--T FI L NX-00-0 X S.XTAL R- (.00 MHz) L 0000 OIL LA- L 0000 OIL LA- L 0000 OIL LA- L 0000 OIL LA- L 0000 OIL LA- L OIL LW- L S.OIL LJN RK-F L S.OIL LS- L S.OIL LS- L S.OIL LS- L S.OIL LJF RK-F L S.OIL LJN R0K-F L S.OIL LJN RK-F L S.OIL LJN RK-F L S.OIL LJR NG-F L S.OIL LQN A NJ0 L S.OIL 0.-.-TL N L S.OIL LJR NG-F L S.OIL TR N L S.OIL XLU L S.OIL LJN RK-F L S.OIL LJR NG-F L S.OIL MLF0D RK-T L S.OIL TL N S.=Surface mount -

20 [MAIN UNIT] RF ORDR NO. NO. DSRIPTION L OIL LR- L S.OIL MLF0D RK-T L S.OIL M-N-000=P L S.OIL M-N-000 L S.OIL MLF0D RK-T L S.OIL MLF0D RK-T L OIL LA- L S.OIL LS- L OIL LA- L S.OIL MLF0D RK-T L OIL HK-0S00-0 L S.OIL LJR NG-F L S.OIL LJF RM-F L S.OIL LJF RM-F L S.OIL LJF RM-F L S.OIL NL 0T-00J L 0000 OIL HK-0S00-0 L OIL HK-0S00-0 L OIL HK-0S00-0 L OIL HK-0S00-0 L S.OIL NL 0T-00J L S.OIL TR 0N L S.OIL TR.N L S.OIL TL N L OIL LA- L 0000 OIL LA- L S.OIL NL 0T-0J L S.OIL NL 0T-0J L S.OIL MLF0D RK-T L S.OIL NL 0T-RJ L 0000 S.OIL ZFS0-PT L 0000 S.OIL ZFS0-PT L S.OIL ZFS0-PT L 0000 S.OIL ZFS0-PT L S.OIL LJF RM-F L S.OIL LJF RK-F L S.OIL LJF RK-F L S.OIL LJF RM-F L 0000 S.OIL ZFS0-PT L S.OIL LJR NG-F R S.RSISTOR RJYJ0U (00 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.TRIMMR VM-XSX0 (0) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (00 kω) [MAIN UNIT] RF ORDR NO. NO. DSRIPTION R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.TRIMMR VM-XSX0 (0) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V ( kω) R S.THRMISTOR NTM0 LH 0K R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R 0000 S.TRIMMR VM-XSX0 (0) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.TRIMMR VM-XSX0 (0) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR MR0ZHJ Ω (0) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR MR0ZHJ kω R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) [USA/-] only R S.RSISTOR RJGYJ V (. kω) [USA/-] only R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) S.=Surface mount -

21 [MAIN UNIT] RF ORDR NO. NO. DSRIPTION R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ R V (. Ω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 kω) R S.THRMISTOR TPSRKHQ R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ R0 V ( Ω) R 0000 S.TRIMMR VM-XSX0 (0) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (. MΩ) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJYJ00U (0 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 Ω) R 0000 S.TRIMMR VM-XSX0 (0) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) [MAIN UNIT] RF ORDR NO. NO. DSRIPTION R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYF V (0 kω) R S.RSISTOR RJGYF V (0 kω) R S.RSISTOR RJGYF V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR MR0ZHJ. kω R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (0 Ω) [USA/-] only R S.RSISTOR RJGYJ V (0 Ω) [USA/-] only R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ R V (. Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ R V (. Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJYJRU (. Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR MR0JZHJ 0 Ω () R S.RSISTOR RJGYJ R V (. Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.THRMISTOR NTM0 LH 0K R S.RSISTOR RJGYJ V (. kω) 0000 S.RAMI GRM- H 0J 00PT S.RAMI GRM- H 00 00PT 0000 S.RAMI GRM- H 0J 00PT S.RAMI GRM- K R 00PT 0000 S.RAMI GRM- H 0J 00PT 0000 S.RAMI GRM- WR 0K 00PT 0000 S.RAMI GRM- H 0J 00PT S.=Surface mount -

22 [MAIN UNIT] RF NO. ORDR NO. DSRIPTION S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A 0000 S.RAMI GRM- WR 0K 00PT 0000 S.RAMI GRM- H 0J 00PT S.RAMI GRM- K 00 00PT S.RAMI GRM- K 00 00PT 0000 S.RAMI GRM- H 0J 00PT 0000 S.RAMI GRM- H 00D 00PT 0000 S.RAMI GRM- H 00D 00PT S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI GRM- WR 0K 00PT S.RAMI 0 H H 00D-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H R-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0R-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J 0K-T-A 0000 S.TANTALUM STYR 0000 S.LTROLYTI VHA00SR 0000 S.TANTALUM STVY0R S.TANTALUM STY0R S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J A 0M-T-A 0000 S.TANTALUM TMSVA 0J M-L 0000 S.LTROLYTI VA00SR 0000 S.TANTALUM STYR S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J H K-T-A [MAIN UNIT] RF NO. ORDR NO. DSRIPTION S.RAMI 0 J H K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.TANTALUM TMSVA 0J M-L S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0K-T-A S.RAMI 0 J 0KT-N 0000 S.LTROLYTI 0 SV M S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.TANTALUM STAXR 0000 S.TANTALUM STYR 0000 S.TANTALUM STAXR S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VA00SR S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J A 0M-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J 0KT-N S.RAMI 0 H H 00D-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VHA0RSR S.RAMI 0 J A 0M-T-A 0000 S.TANTALUM STYR S.TANTALUM STAYR S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0R-T-A S.RAMI 0 H H 00D-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00J-T-A S.LTROLYTI VAP S.RAMI 0 H H 0J-T-A S.RAMI 0 J K-T-A 0000 LTROLYTI 0 YXG 0M 0000 LTROLYTI 0 YXG 0M S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0KT-N 0000 S.TANTALUM TMSVA A M-L S.RAMI 0 J 0K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI J 0M-T-A S.RAMI 0 J A 0M-T-A S.RAMI 0 J A 0M-T-A S.RAMI 0 J 0K-T-A 0000 S.RAMI GRM- H 0J 00PT S.RAMI GRH H 0J 00PT S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J K-T-A 0000 S.RAMI 0 H H J-T-A 0000 S.RAMI 0 J K-T-N S.RAMI 0 H H 0J-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00D-T-A S.RAMI 0 H H 0R-T-A S.=Surface mount -

23 [MAIN UNIT] RF NO. ORDR NO. DSRIPTION S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J K-T-A S.RAMI 0 H H J-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VHA0P S.RAMI 0 JF H 0Z-T-A S.RAMI 0 J 0KT-N S.LTROLYTI V0JA0SR S.RAMI 0 J 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J 0K-T-A 0000 S.RAMI GRM- H 0J 00PT S.RAMI 0 J 0K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J 0K-T-A [USA/-] only S.RAMI 0 J 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VA0SP S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0KT-N 0000 S.TANTALUM STYR S.RAMI 0 J 0K-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 J 0K-T-A S.RAMI GRM- H 00D 00PT 0000 S.RAMI GRM- H 0J 00PT S.RAMI 0 J 0K-T-A [USA/-] only S.RAMI 0 J 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 J H K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0K-T-A S.RAMI 0 H H 00-T-A 0000 S.LTROLYTI VA0UP S.RAMI 0 H H 0R-T-A S.RAMI 0 H H 00-T-A [USA/-] only S.RAMI 0 J 0KT-N S.RAMI 0 J 0K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0KT-N S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00-T-A [USA/-] only S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H K-T-A S.TANTALUM STAYR S.TANTALUM STY0R S.RAMI 0 J 0KT-N S.RAMI 0 J 0K-T-A 0000 S.TANTALUM TMSVA M-L S.RAMI 0 J 0KT-N S.RAMI 0 J K-T-A 0000 S.LTROLYTI VAP 0000 S.LTROLYTI VA0SP S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 H H 0R-T-A S.RAMI 0 H H 0J-T-A [USA/-] only S.RAMI 0 H H 00-T-A 0000 S.RAMI 0 J K-T-A 0000 S.RAMI 0 J K-T-A S.RAMI 0 J K-T-A 0000 S.LTROLYTI VA0UP S.LTROLYTI VA0SP S.LTROLYTI VA0SP S.RAMI 0 J K-T-A [MAIN UNIT] RF NO. ORDR NO. DSRIPTION S.RAMI 0 J A 0M-T-A S.RAMI 0 J K-T-A S.RAMI 0 H H R-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.TANTALUM STYR S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI GRM- 0K 0PT S.RAMI 0 J 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 00D-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 H H 00J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J 0K-T-A S.RAMI 0 H H R-T-A S.RAMI 0 J 0K-T-A 0000 S.LTROLYTI VA0UP 0000 S.LTROLYTI VARSR S.RAMI 0 H H 00-T-A 0000 S.LTROLYTI VA00SR 0000 S.LTROLYTI VA00SR S.RAMI 0 J 0K-T-A S.RAMI 0 H H J-T-A 0000 S.LTROLYTI VA0UP S.RAMI 0 J 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J 0K-T-A 0000 S.LTROLYTI VA0UP S.RAMI 0 H H J-T-A S.RAMI 0 J A 0M-T-A 0000 S.LTROLYTI VA0UP S.RAMI 0 J 0K-T-A S.RAMI 0 J H K-T-A 0000 LTROLYTI 0 YXG 000UF 0000 S.LTROLYTI VHARSR 0000 S.TANTALUM TMSVD D M-R S.RAMI 0 J 0K-T-A S.RAMI GRM- R K 0PT S.RAMI GRM- R K 0PT S.RAMI GRM- R K 0PT S.RAMI GRM- R K 0PT S.RAMI GRM- R K 0PT S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 00D-T-A S.RAMI 0 H H J-T-A LTROLYTI 0 YXG 0M S.LTROLYTI V0JV0SR S.RAMI 0 J 0K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VA00SR S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0KT-N S.RAMI 0 J H 0K-T-A 0000 S.RAMI GRM- R 0K 0PT 0000 S.RAMI GRM- WR K 00PT S.RAMI 0 H H J-T-A 0000 S.LTROLYTI VARSR S.RAMI 0 H H 0J-T-A S.RAMI 0 J H K-T-A S.RAMI 0 JF H Z-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J K-T-A S.RAMI 0 J H K-T-A 0000 LTROLYTI 0 YK 0M S.RAMI 0 H H 00-T-A 0000 LTROLYTI 0 MV 0 H S.RAMI 0 J 0KT-N S.RAMI 0 J H 0K-T-A S.=Surface mount -