%)#% -!.!, COMMUNICAIONS RECEIVERS ic-pcr ic-pcr S-MZ-C Jun.
INRODUCION CAUION his service manual describes the latest service information for the IC-PCR and IC-PCR COMMUNICAIONS RECEIVERS at the time of publication. NEVER connect the receiver to an AC outlet or to a DC power supply that uses more than V. Such a connection could cause a fire hazard and/or electric shock. MODEL IC-PCR IC-PCR VERSION Europe U.K. U.S.A. Canada France South East Asia Export IC-PCR* U.S.A. SYMOL EUR- UK- USA- CAN- FRA- SEA- EXP- EXP- USA- DO NO expose the receiver to rain, snow or any liquids. DO NO reverse the polarities of the power supply when connecting the receiver. DO NO apply an RF signal of more than dm ( mw) to the antenna connector. his could damage the receiver s front end. *U- is already installed as DIGIAL UNI. o upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation. (IC-PCR) ING PARS REPAIR NOES e sure to include the following four points when ordering replacement parts:. Make sure a problem is internal before disassembling the receiver.. DO NO open the transceiver until the receiver is disconnected from its power source.. DO NO force any of the variable components. urn them slowly and smoothly.. DO NO short any circuits or electronic parts. An insulated turning tool MUS be used for all adjustments.. DO NO keep power ON for a long time when the receiver is defective.. READ the instructions of test equipment thoroughly before connecting equipment to the receiver.. -digit Icom parts numbers. Component name and informations. Equipment model name and unit name. Quantity required <SLE > ASF IC-PCR Main-A unit pieces Screw FH M. IC-PCR Chassis pieces Addresses are provided on the inside back cover for your convenience. Icom, Icom Inc. and logo are registered trademarks of Icom Incorporated (Japan) in the United States, the United Kingdom, Germany, France, Spain, Russia and/or other countries.
ALE OF CONENS SECION SPECIFICAIONS SECION INSIDE VIEWS SECION DISASSEMLY INSRUCIONS CIRCUI DESCRIPION SECION SECION - RECEIVER CIRCUIS........................................................ - - PLL CIRCUIS............................................................. - - DIGIAL MODE OPERAION WIH U-....................................... - - POWER SUPPLY CIRCUIS................................................... - - CPU POR ALLOCAION..................................................... - ADJUSMEN PROCEDURES - PREPARAION............................................................. - - MAIN-A UNI ADJUSMEN.................................................. - - MAIN- UNI ADJUSMEN (PCR only)..................................... - SECION PARS LIS SECION MECHANICAL PARS AND DISASSEMLY SECION SEMICONDUCOR INFORMAION SECION OARD LAYOUS - LOGIC UNI............................................................... - - MAIN-A UNI............................................................... - - MAIN- UNI (PCR only)................................................. - - U- (Optional product; DIGIAL UNI for [PCR; USA-])...................... - SECION LOCK DIAGRAM SECION VOLAGE DIAGRAM
SECION SPECIFICAIONS M GENERAL Frequency coverage :.. *, *........ *.. *.. *.. *.. *, *.. *, *.. *, * France :.. *, *.......... Other than above :.. *, * * : For IC-PCR. Available on Main band only. U.S.A. Sub band only covers frequency range; to. MHz. * : Guaranteed:.. MHz range only : FM, AM, WFM, US*, LS*, CW, DV*,*, P*,* Mode * : For PCR. Available on Main band only. * : For PCR. Available when optional U- is installed. * : For PCR. Available when optional U- is installed, and depending on versions. Number of memory channels uning steps Operating temperature range Frequency stability Power supply requirement : : Hz, Hz, Hz, Hz, Hz, Hz, khz,. khz, khz,. khz,. khz, khz, khz,. khz, khz, khz, khz, khz, khz, khz, khz, khz, khz, khz, MHz, MHz, USER S : C to + C; + F to + F : ± ppm ( C to + C) : V DC ±% (Negative ground) [PCR] Power ON : Standby Max. audio Power OFF : PC (US VAS-ON) PC (US VAS-OFF) [PCR] single band operation : Standby Max. audio Dualwatch operation * : Standby Max. audio Power OFF : PC (US VAS ON) PC (US VAS OFF) ma (typical) Less than. A ma (typical) ma (typical) ma (typical) Less than. A ma (typical) Less than. A ma (typical) ma (typical) *: PCR only. Current drain (At V DC ; approx.) Dimensions (projections not included) Weight (approx.) Antenna connector : (W) (H) (D) mm; (W) (H) (D) in :. kg; lb oz (PCR). kg; lb oz (PCR) : NC ( Ω) -
M RECEIVER Receive system Intermediate frequencies Sensitivity : riple-conversion superheterodyne and down converter : st:. MHz, nd:. MHz, rd: khz (except for WFM mode) : y FM ( khz/. khz Dev.; d SINAD).. MHz : Less than. µ V.. MHz : Less than. µ V.. MHz : Less than. µ V.. MHz : Less than. µ V : Less than. µ V.. MHz.. MHz : Less than. µ V.. MHz : Less than. µ V.. MHz: Less than. µ V.. MHz : Less than µ V WFM ( khz/. khz Dev.; d SINAD) : Less than. µ V.. MHz.. MHz : Less than. µ V.. MHz: Less than µ V.. MHz : Less than µ V AM ( khz/% MOD.; d S/N) : Less than µ V.. MHz.. MHz : Less than. µ V : Less than. µ V.. MHz : Less than µ V.. MHz.. MHz : Less than µ V.. MHz : Less than. µ V SS/CW ( d S/N).. MHz.. MHz.. MHz.. MHz.. MHz Selectivity Audio output power Ext. speaker connector Packet connector Data connector IF shift variable range : y SS/CW/AM SS/CW/AM/FM AM/FM AM/FM/WFM WFM : Less than µ V : Less than. µ V : Less than. µ V : Less than. µ V : Less than. µ V More than. khz/ d (typical) More than. khz/ d (typical) More than khz/ d (typical) More than khz/ d (typical) More than khz/ d (typical) : More than. W (at % distortion with an Ω load) : -conductor. (d) mm ( )/ Ω : -conductor. (d) mm ( ) : -conductor. (d) mm ( ) : More than ±. khz All stated specifications are subject to change without notice or obligation. -
SECION INSIDE VIEWS LOGIC UNI US HU (IC: US) OP VIEW LV regulator (IC: ANL) US +.V regulator IC: S-C Q: S Q: SC ( ) CPUV regulator (IC: XCPPR) VCC line controller Q: SJ Q: DCEU ( ) AF amplifier (IC: LAA) AF +V regulator (Q: S, Q: XP) +V regulator IC: AF D: SS ( ) VSC/ONE filter (IC: LM) IC-PCR only VSC/ONE filter (IC: LM) US audio IC (IC: PCMM) AF selecter (IC: SNAHC) AF selecter (IC: SNAHC) IC-PCR only V regulator IC: µpc D: SS D: MA ( ) AF amplifier (Q: SC) Electric VR (IC: SM) AF amplifier (Q: SC) IC-PCR only SP mute switch (Q: SC) OOM VIEW Clock oscillator (X: CR-. MHz) A+V regulator (IC: A) A+V regulator (IC: AN) +V regulator (IC: AF) IC-PCR only +V regulator (IC: ASP) IC-PCR only CPU reset IC (IC: S-) CPU (IC: MFGPGP) DMF decoder (IC: UFS) -
RF circuits MAIN-A UNI OP VIEW Down converter circuits st VCO circuits nd VCO circuits uffer (Q: SC) DDS V regulator (Q: XP) Noise blanker amplifier (Q: SK) DDS circuits APCOV regulator (Q: SA) D.V regulator (Q: UNR) OOM VIEW A circuits DVCO +V regulator (Q: UNR) DPLL.V regulator (IC: S-CAMC) st mixer (IC: SPM) +V regulator (Q: UNR) HF band RF amplifier (Q: SC) HF V regulator (Q: XP) PLL.V regulator (IC: S-CAMC) st IF amplifier (Q: SK) DDS V regulator (D: DAN) nd mixer (IC: AF) RSSI meter amplifier (IC: NJMV, D: SS) IF IC (and scope) (IC: A) nd IF amplifier (Q: SK) AGC amplifier (Q: SC) SS decoder (IC: AF) AM detecter circuits WFM IF IC (IC: LAM) NFM, FM, IF IC (IC: A) -
MAIN- UNI (IC-PCR only) OP VIEW OOM VIEW HF filter circuits A circuits st mixer (IC: SPM) st VCO circuits +V regulator (Q: UNR) st IF amplifier (Q: SK) PLL.V regulator (IC: S-CAMC) nd mixer (IC: AF) st VCO circuits uffer (Q: SC) RSSI meter amplifier (IC: NJMV D: SS) Noise blanker (Q: SK) nd IF amplifier (Q: SK) AGC amplifier (Q: SC) APCOV regulator (Q: SA) WFM IF IC (IC: LAM) AM detecter circuits NFM, FM, IF IC (IC: A) U- (Optinal product; DIGAL UNI for [IC-PCR: USA-]) OP VIEW OOM VIEW rd IF filter (FI: CFWKA) Clock oscillator (X: CR-) EEPROM (IC: HNXI) Liner codec (IC: AKV) CPU (IC: HDFE) -
SECION DISASSEMLY INSRUCIONS Removing the top cover and shield covers r Remove the shield covers D and E* in the direction of the arrow. q Unscrew screws, A. w Unplug the connectors and C from the LOGIC unit. e Remove the top cover in the direction of the arrow. E* A A D op cover C LOGIC Unit * IC-PCR only Removing the LOGIC unit, MAIN-A unit and MAIN-* unit q w e r Unscrew nut F*, G. Unscrew screws H from the LOGIC unit and remove the LOGIC plate. Unscrew screws I from the MAIN-A unit and screws J* from the MAIN- unit*. Remove the units in the direction of the arrows. H LOGIC Plate J* F* G LOGIC UNI MAIN- UNI* MAIN-A UNI I * IC-PCR only Chassis -
SECION CIRCUI DESCRIPION he MHz signals from the antenna are passed through the anttenuator (D, D), band switch (D) and LPF (L, C, C), then applied to one of the RF circuit. - RECEIVE CIRCUIS --RF CIRCUIS (MAIN-A/- UNIS) he MAIN-A UNI has eight RF circuits and one down converter circuit to provide wide receiving range. he received signals from the antenna connector (CHASSIS; J) are applied to RF circuits or down converter circuit according to the received frequency, and amplified within the frequency coverage. MHz he received signals MHz are passed through the band switch (D) and the tunable bandpass filter (PF; D, D D, D, D, L, L, L, L, L, C, C, C, C, C), and then applied to the RF amplifier (Q). he amplified signals are passed through another tunable PF (D, D, L, L, L, L, C, C, C) and another band switch (D), and then applied to the st mixer (IC, pins, ). IC-PCR contains MAIN- UNI which has RF circuits to provide dulalwatch or diversity capability. he. MHz signals from the antenna are passed through the attenuator (D, D), band switch (D) and lowpass filter (LPF; L, L, C, C, C, C, C, C), then applied to one of the RF circuit. < MHz> D o the st mixer (IC, pins, ).. MHz* he.. MHz signals are passed through the band switch (D), LPF (L, L, C, C, C, C) and another band switch (D), then applied to the st mixer (IC, pins, ). D LPF From the LPF D o the st mixer (IC, pins, ) LPF D From the LPF D PF Q RF amp. D D PF From the HPF < MHz> D o the st mixer (IC, pins, ). MHz* he. MHz signals are passed through the band switch (D), LPF (L, L, C, C, C, C, C), HPF (L, L, C, C, C, C, C) and another band switch (D), and then applied to the RF amplifier (Q). he amplified signals are then applied to the st mixer (IC, pins, ) via the band switch (D). HPF LPF D D, D PF Q RF amp. D, D D PF From the HPF MHz he received signals MHz are passed through the band switch (D) and PF (D, D, D, D, L, L, L, L, L, L, C, C, C), then applied to the RF amplifier (Q). he amplified signals are passed through another PF (D, D, L, L, L, L, C, C, C) and the band switch (D), and then applied to the st mixer (IC, pins, ). < MHz> D Q D o the RF amp. st mixer (IC, pins, ) From the HPF MHz he received signals MHz are passed through the band switch (D) and PF (D, D, L, L, L, C, C, C, C), then applied to the RF amplifier (Q). he amplified signals are passed through another PF (D, D, L, L, L, L, C, C, C) and another band switch (D), and then applied to the st mixer (IC, pins, ). <. MHz> HPF RF amp. D, D D D, D D PF < MHz>.. MHz* he.. MHz signals are passed through the band switch (D), LPF (L, L, L, C, C, C, C, C, C), high-pass filter (HPF; L, L, L, C, C, C, C, C, C, C) and another band switch (D), and then applied to the RF amplifier (Q). he amplified signals are then applied to the st mixer (IC, pins, ) via the band switch (D). D Q D o the RF amp. st mixer (IC, pins, ) PF Q MHz he received signals MHz are passed through the band switch (D) and PF (D, L, L, L, L, L, C, C, C, C, C, C, C), and applied to the RF amplifier (Q). he amplified signals are passed through another PF (D, L, L, L, C, C, C, C) and another band switch (D), and then applied to the st mixer (IC, pins, ). <. MHz> D D, D From the LPF < MHz> MHz* he MHz signals are passed through the band switch (D), HPF (L, L, C, C, C, C, C) and another band switch (D), and then applied to the RF amplifier (Q). he amplified signals are then applied to the st mixer (IC, pins, ) via the band switch (D). D o the st mixer (IC, pins, ) < MHz> o the D Q D RF st mixer amp. (IC, pins, ) D HPF From the LPF *MAIN-A UNI only - D, D PF Q RF amp. D, D D PF From the HPF
MHz* he MHz signals from the antenna are applied to the down converter circuit where those signals are converted into the lower frequencies. In FM or AM mode, the nd IF signal is passed through the FI (band width= khz) via mode switches (D, D), In WFM mode, the nd IF signal is passed through the FI (band width= khz) via mode switches (D, D). <DOWN CONVERER> LO signals from VCO (Q, D) IC D o the RF circuits ( MHz) RF amp. LPF Q uff amp. HPF he filtered nd IF signal is applied to the nd IF amplifier (Q). he amplified nd IF signals are then applied to the rd IF and demodulation circuits. D From the antenna he received signals are applied to the buffer amplifier (Q) via the band switch (D). he buffer-amplified signals are applied to the RF amplifier (IC, pin ) via HPF (L, L, C, C, C, C, C). he amplified signals are output from pin, and applied to the mixer (IC, pin ) and down-converted. he down converted signals are output from pin, then applied to the RF circuits via LPF (L, C, C) and band switch (D). he LO frequencies and convered frequencies are shown as below. RX frequency LO frequency MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz -- NOISE LANKER CIRCUI he noise blanker (N) circuit reduces pulse type noises in the received signals. When the received signals contain pulse type noise components, the N circuit reduces the noisy AF signals by cutting off the nd IF line. In AM, SS or CW mode and the N function is activated, a portion of the nd IF signal from the band switch (D, D) is amplified at N amplifier (Q) and applied to the IF IC (IC, pin ). Convered frequency When the nd IF signal contains a pulse noise, the RSSI signal corresponding to the pulse noise level is output from pin. he output RSSI signal turns Q ON and Q turns OFF, thus the Q is inactivated and the nd IF signal is cut off. -- rd IF AND DEMODULAOR CIRCUIS (MAIN-A/ UNI) -- st IF CIRCUIS he st IF circuits contain a st mixer, st IF amplifier and st IF filter. he st IF mixer converts the received signals into a fixed frequency of the st Intermediate Frequency (IF) signal. he converted st IF signal is filtered at the st IF filters, then amplified at the st IF amplifier. he nd IF signal is converted into the rd IF signal (except WFM mode) and demodulated in the IF IC. he IF IC contains a rd mixer, limiter amplifier, quadrature detector, etc. in its package. In FM mode, the nd IF signal from the nd IF amplifier (Q) is applied to the IF IC (IC, pin ) via mode switch (D) and IF gain control circuit (D). he applied nd IF signal is converted into the rd IF signal by being mixed with rd LO signal from the CXO (X), at the rd mixer in the IF IC (IC).㩷he converted rd IF signal is output from pin and applied to the rd IF amplifier (Q). he amplified rd IF signal is passed through one of the rd IF filter according to the receiving mode. he converted signals from the RF circuits are applied to the st IF mixer (IC, pins, ) and converted into the. MHz st IF signal by being mixed with the st LO (Local Oscillator) signals from the st-vco s. he filtered rd IF signal is applied to the limiter amplifier (IC, pin ), then applied to the demodulator circuit (pin, X) and FM-demodulated. he FM-demodulated AF signals are output from pin, then applied to the AF circuits. he converted IF signal is passed through the st IF filter (FI) to filter out the unwanted signals, then applied to the st IF amplifier (Q). he amplified st IF signal is then applied to the nd mixer (IC, pin ) via attenuator (R, R). In AM and CW mode, the rd IF signal from the rd IF filter is applied to the rd IF amplifier (Q). he amplified rd IF is applied to the AM demodulator circuit (D) via the buffer amplifier (Q). he AM-demodulated AF signals are applied to AF circuits via the AF selector (IC, pins, ). -- nd IF CIRCUIS (MAIN UNI) he nd IF circuits contain the st mixer, nd IF amplifier and the nd IF filters. he st IF signal from the st IF circuits is converted into the. MHz nd IF signal by being mixed with the nd LO signals from the nd-vco. In SS mode, the rd IF signal from the buffer amplifier (Q) are applied to the AF mixer (IC, pin ) and converted into the AF signal by being mixed with the.. khz FO signal from the DDS circuits. he converted audio signals are applied to the AF selector (IC, pin ) after being filtered at the HPF (IC, pins, ). he converted nd IF signal is applied to the nd IF amplifier (Q). he amplified nd IF signal is passed through the nd IF filter to filter out the unwanted signals. In WFM mode, the nd IF signal is applied to the IF IC (IC, pin ) via the nd IF amplifier (Q) and mode switch (D, D). he nd IF signal is amplified at the limiter amplifier, then applied to the demodulator circuit (pins,, X) and FM-demodulated. he FM-demodulated AF signals are output from pin, then applied to the AF circuits via the AF selector (IC, pins, ). *MAIN-A UNI only -
<rd IF AND DEMODULAOR CIRCUIS (FM)> D PF D D FI D PF rd IF signal to the AM demodulator circuits Q D FI D PF rd IF amp.. MHz rd LO signal D FI D PF Noise Amp. IC D/A converter CXO X Noise Detector Limit r Amp. Quodrature Detector amp. amp. Q Q RSSI IF IC (IC) +V nd IF signal from the nd IF circuits FM-demodulated signals to the AF circuits NOISE signal to the CPU (IC, pin ) RSSI signal to theagc amplifier (Q) X Q <nd IF AND DEMODULAOR CIRCUIS (WFM)> Limit r Amp. Limit r Amp. Quodrature Detector Limit r Amp. RSSI IF IC (IC) nd IF signal from the nd IF circuits FM-demodulated signals to the AF circuits RSSI signal to the N circuits X In the US (Universal Serial us) audio output mode, the AF signals from the AF amplifier (Q) are applied to another AF amplifier (Q). he amplified AF signals are passed through the US audio selector (IC, pins, ), then applied to the US audio IC (IC, pin ) then converted into the US audio data. he converted audio data is applied to the connected PC via the US HU (IC, pins, and, ). -- AF CIRCUIS (LOGIC UNI) he demodulated AF signals from the demodulator circuits are amplified and filtered in the AF circuits. In FM mode, the demodulated AF signals from the demodulator circuits are passed through the AF select switch (IC, pins, ) and PF (IC, pins, and, ), then applied to the AF amplifier (Q). -- SQUELCH CIRCUI In other than FM mode, the demodulated AF signals from the demodulator circuits are passed through the AF select switch (MAIN-A/; UNI ;IC, pins, ; WFM, pins, ; AM, pins, ; SS), then applied to the AF amplifier (Q). NOISE SQUELCH (MAIN-A/ UNIS) he noise squelch mutes the AF output signals when no RF signals are received. y detecting noise components in the demodulated AF signals, the squelch circuit toggles the AF power amplifier ON and OFF. he amplified AF signal are applied to the electric volume (IC, pins, ) for level adjustment. he level adjusted AF signals are passed through the speaker mute switch (Q) and applied to the AF power amplifier (IC, pin ). he power-amplified AF signals are applied to the internal speaker via J (J) or an external speaker/ear phone via the phone switch (S), attenuator (R, R) and J (J). A portion of the demodulated signals from the IF IC (IC, pin ) are applied to the D/A converter (IC, pin ) for level adjustment. he level-adjusted AF signals are output from pin, and passed through the noise filter (R, R, C, C). he filtered noise signals are then applied to the noise amplifier (IC, pins, ) to be amplified noise components only. he amplified noise components are converted into the AF CIRCUIS FM IF IC (IC) IC WFM IF IC (IC) IC AF selector IC Q PF AF Amp. Ele. VR SP mute sw. Phone switch (S) IC Q, D Power Amp. (CHASSIS; J) A Speaker (CHASSIS; SP) IC AM AM demodulator (D) SS AF selector From the FO AF mixer (IC)* Q AF Amp. IC US audio IC US D HU D+ D+ o the PC D US connector (J) MAIN-A/ UNI LOGIC UNI *MAIN-A UNI only -
st VCO s he st VCO is composed by two VCO s; as the st LO signal generator for.. MHz and. MHz reception range. pulse-type signal at the noise detector section, and output from pin as the NOIS signal. he NOIS signal is applied to the CPU (IC, pin ). And the CPU outputs control signals LS, VDA, VCK from pins,,, to the expander (IC) according to the NOIS signal level. hen the expander outputs SPPWR signal from pin to toggle the AF+V regulator (Q, Q) ON and OFF. [When receiving.. MHz signals] -st VCO (Q, D)Generates.. MHz LO signals. he VCO output signal is buffer-amplified by Q. he buffer amplified signals are passed through the LO siwtch (D) and buffer amplifier (IC, pins, ). he expander also outputs SPMUE signal to the speaker switch (Q, D) at the same time, to disconnect the AF line. ONE SQUELCH (LOGIC UNI) he tone squelch detects the tone (CCSS/DCS) signal in the demodulated AF signals, and opens the squelch only when the matched sub-audible tone frequency is detected in the received signal. -st VCO (Q, D)Generates. MHz LO signals. he VCO output signal is buffer-amplified by Q. he buffer amplified signals are passed through the LO siwtch (D) and buffer amplifier (IC, pins, ). While the tone squelch is in use, and the received signal contains no sub-audible tone or mismatched tone frequency, the tone squelch mutes the AF signals even if the noise squelch is open. he buffer amplified VCO output signals from pin of IC are passed through the attenuator (R, R, R), LO switch (D) and another attenuator (R, R, R), and applied to the / frequency divider (IC, pin ). he divided LO signals are buffer-amplified by Q, and then passed through the HPF (L, C, C), LPF (L, L, C, C), LO switch (D) and attenuator (R, R, R), before being applied to the st mixer (IC, pins, ). A portion of the demodulated AF signals from the IF IC (MAIN-A/; IC, pin ) are passed though the tone filter (IC/IC, pins, ) to suppress unwanted voice signals. he filtered tone signals are applied to the CPU (IC, pin /). [When receiving. MHz signals] -st VCO (Q, D)Generates.. MHz LO signals. he VCO output signal is buffer-amplified by Q. he buffer amplified signals are passed through the LO siwtch (D) and buffer amplifier (IC, pins, ). he CPU decodes the CCSS/DCS signal, and outputs control signals LS, VDA, VCK from pins,,, to the expander (IC) according to the applied CCSS/DCS signal. hen the expander outputs SPPWR signal from pin to toggle the AF+V regulator (Q, Q) ON and OFF. he expander also outputs SPMUE signal to the speaker switch (Q, D) at the same time, to disconnect the AF line. -st VCO (Q, D)Generates. MHz LO signals. he VCO output signal is buffer-amplified by Q. he buffer amplified signals are passed through the LO siwtch (D) and buffer amplifier (IC, pins, ). -- ANDSCOPE CIRCUIS* (MAIN-A UNI) A portion of the nd IF signal from the nd mixer (IC, pin ) is applied to the IF IC (IC, pin ) via the nd IF filter (FI). he nd IF signal is converted into the rd IF signal by being mixed with rd LO signal from the DDS circuits, at the rd mixer in the IF IC (IC).䇭he converted rd IF signal is output from pin and passed through the rd IF filter FI. he filtered signal is amplified at the limiter amplifier in the IC to produce the RSSI signal which corresponding to the received signal level. he buffer amplified VCO output signals from pin of IC are passed through the attenuator (R, R, R) and LO switches (D, D) and PF (L, L, C, C, C, C, C), before being applied to the st mixer (IC, pins, ). nd VCO he nd VCO (Q, D, D) generates the LO signals for producing nd IF signal. he oscillated signals are buffer amplified by Q, and applied to the nd mixer (IC, pin ) via LPF (L, C, C, C) and attenuator (R). he RSSI signal SCAD is output from pin, and applied to the CPU (IC, pin ). he CPU converts the RSSI signal into the digital signal, and outputs to connected PC via US HU (IC, pins, and, ) to indicate the received signal level for bandscope function on the PC screen. -- PLL CIRCUIS (MAIN-A/ UNI) he PLL circuits provide stable oscillation of the receive LO frequencies. he PLL circuit compares the phase of the divided VCO frequency with the reference frequency. he PLL output frequency is controlled by the divided ratio (N-data) from the CPU. - PLL CIRCUIS -- VCO CIRCUIS (MAIN-A/ UNIS) DOWN CONVERER VCO* he down converter VCO (Q, D) generates the MHz LO signals for down conversion. DOWN CONVERER PLL* A portion of the VCO output signals are amplified at the buffer amplifier (Q) and then applied to the PLL IC (IC, pin ). he applied signals are divided at the prescaler and programmable counter according to the N-data DA from the expnader (IC, pin ) controlled by the CPU (LOGIC UNI; IC). he divided signal is phase compared with the reference frequency from the reference amplifier (Q) at the phase comparator. he VCO output signals are buffer amplified by Q, and applied to the mixer (IC, pin ) for frequency downconversion, via the band switches (D, D, D, D). When the recceiving MHz and above, the VCO outputs are doubled by being passed through the HPF (L, C, C, C), and applied to the mixer (IC, pin ) as the MHz LO signals via the band switches (D, D). *MAIN-A UNI only -
he phase difference is output from pin as a pulse type signal after being passed through the internal charge pump. he output signal is applied to the VCO (Q, Q, D, D) after being converted into the DC voltage (lock voltage) at the loop filter (Q, Q). he phase difference is output from pin as a pulse type signal after being passed through the internal charge pump. he output signal is applied to the VCO (Q, D) after being converted into the DC voltage (lock voltage) at the loop filter (R, R, R, C, C, C, C, C). nd PLL A portion of the VCO (Q, D, D) output signals from the buffer (Q) are applied to the PLL IC (IC, pin ) via the buffer (Q). he applied signals are divided at the prescaler and programmable counter according to the N-data DA from the expnader (IC, pin ) controlled by the CPU (IC). he divided signal is phase compared with the reference frequency from the reference amplifier (Q) at the phase comparator. st PLL -st VCO (Q, D)A portion of the VCO output signals from the buffer amplifier (IC, pin ) are applied to the PLL IC (IC, pin ) via the buffer amplifier (Q). he applied signals are divided at the prescaler and programmable counter according to the N-data DA from the expnader (IC, pin ) controlled by the CPU (IC). he divided signal is phase compared with the reference frequency at the phase comparator. he phase difference is output from pin as a pulse type signal after being passed through the internal charge pump. he output signal is applied to the VCO (Q, D, D) after being converted into the DC voltage (lock voltage) at the loop filter (R, R, C, C, C). he phase difference is output from pin as a pulse type signal after being passed through the internal charge pump. he output signal is applied to the VCO (Q, Q, D, D) after being converted into the DC voltage (lock voltage) at the loop filter (Q, Q). If the oscillated signal drifts, its phase changes from that of the reference frequency, causing a lock voltage change to compensate for the drift in the oscillated frequency. -st VCO (Q, D)A portion of the VCO output signals from the buffer amplifier (IC, pin ) are applied to the PLL IC (IC, pin ) via the buffer amplifier (Q). he applied signals are divided at the prescaler and programmable counter according to the N-data DA from the expnader (IC, pin ) controlled by the CPU (IC). he divided signal is phase compared with the reference frequency at the phase comparator. <HE CONCEP OF PLL CIRCUIS> PLL IC Prescaler PLL unlock detect signal uffer amp. uffer amp. PLL strobe signal PLL crock signal DAA interface Programmable counter VCO PLL serial data (N-data) Reference frequency signal Reference counter Phase detector - DIGIAL MODE OPERAION WIH U- A portion of the khz rd IF signal from IF IC (MAIN-A UNI; IC, pin ) is applied to the LOGIC UNI via the IF amplifier (MAIN-A UNI; Q, Q). he applied rd IF signal is passed through the IF switch (LOGIC UNI; IC, pins, ) and buffer amplifier (LOGIC UNI; Q), then applied to the attached U- via J (pin ). he applied rd IF signal is passed through the IF filter (U-; FI) to remove unwanted signals, and applied to the A/D converter (U-; IC, pin ) to be converted into the digital signal via PF. he converted digital signal is then applied to the DSP (Digital Signal Proccesor; IC) and demodulated. he demodulated signal is then applied to the liner codec (U-; IC) to be converted in to the analog audio signals. he converted audio signals are applied to the same AF circuits as analog receiving from the AF switch (IC, pin ). Optional product (DIGIAL UNI for PCR; [USA-]) - Charge pump Loop filter to a mixer
- POWER SUPPLY CIRCUIS VOLAGE LINE HV AF+V LV +V US.V DESINAION Same voltage as the connected power supply. AF power amplifier (IC). Electric volume (IC), tone filter (IC), AF switch (IC, IC), etc. Loop filter (MAIN-A/ UNIS; Q, Q). US HU (IC, IC), US audio IC (IC). VOLAGE LINE APV OPV A+V A+V V DESINAION Optional U-. Optional U-/U-. MAIN-A UNI. AGC amplifier (MAIN UNI; IC). VOLAGE LINE PLL.V / V DESINAION st and nd PLL circuits; PLL IC (IC, IC). Divider (IC). *PCR only VOLAGE LINE DPLL.V D.V PLL.V V DVCOV DESINAION Down converter circuit; PLL IC (IC). Down converter circuit; mixer (IC), RF amplifier (IC), etc. st and nd PLL circuits; PLL IC (IC, IC). Divider (IC), reference oscillator (X), etc. Down converter circuit; VCO (Q, D), buffer (Q), etc. -
- CPU POR ALLOCAION Pin No. -- CPU (LOGIC UNI; IC) Pin No. POR NAME MS CK MS CSHIF NOIS NOIS PWR MS* CCS PS* PS* DS* PDIN PDOU SCL OPSO OPSI OPSCK AIRQ AS ASI ASO ACK DSPS IMS USY SDL OPAFSEL OPAFINH OPAFSEL* OPAFINH* DESCRIPION Outputs strobe signal to the expander (MAIN- UNI; IC, pin). Outputs clock signal to the expander (MAIN- UNI; IC, pin ). Outputs strobe signal to the expander (MAIN- UNI; IC, pin). Outputs clock frequency shift signal to the clock shift circuit (D). Input port for NOIS signal from the IF IC (MAIN-A UNI; IC, pin ). Input port for NOISE signal from the IF IC (MAIN- UNI; IC, pin ). Input port for power witch (CHASSIS; S). Low =While the power switch is turned. Outputs strobe signal to the expander (MAIN- UNI; IC, pin ). Outputs optional unit select signal to the attached optional unit via the pin of J. High =While the optional unit is attached. Outputs PLL strobe signla to the st PLL IC (MAIN- UNI; IC, pin ). Outputs PLL strobe signla to the nd PLL IC (MAIN- UNI; IC, pin ). Outputs strobe signal to the D/A converter (MAIN-; IC, pin ). Input port for US data. Outputs US data. Outputs clock signal to the EEPROM (IC, pin ). Output serial data to the attached optional unit via the pin of J. Input port for serial data from the attached optional unit via the pin of J. Outputs clock signal to the Attached optional unit via the pin of J. Input port for data request signal from the attached U- via the pin of the J. Outputs strobe signal to the attached U- via the pin of the J. Input port for serial data from the attached U- via the pin of the J. Outputs serial data to the attached U- via the pin of the J. Outputs clock signal to the attached U- via the pin of the J. Outputs DSP select signal to the attached DSP unit via pin of J. Outputs DSP strobe signal to the attached DSP unit via pin of J. Outputs busy signal to the attached optional unit via pin of J. I/O port for EEPROM (IC, pin ). Outputs control signal to the AF switch (IC, pin ). High =While the optional unit is activated. Outputs control signal to the AF switch (IC, pin ). High =he AF line for the optional unit is disconnected. Outputs control signal to the AF switch (IC, pin ). High =While the optional unit is activated. Outputs control signal to the AF switch (IC, pin ). High =he AF line for the optional unit is disconnected. - POR NAME DESCRIPION Input port for mute signal from the attached optional unit via the pin of J. High =While the audio output is muted. Outputs control signal to the AF switch (IC, APAFSEL pin ). High =While the U- is in use. Outputs control signal to the AF switch (IC, pin APAFINH ). High =While the attached U- is inactivated. Outputs serial data to the electric volume VDA (IC, pin ). Outputs clock signal to the electric volume VCK (IC, pin ). Outputs strobe signal to the electric volume VS (IC, pin ). Outputs strobe signal to the expander (IC, LS pin ). Outputs control signal to the power controller PWR (Q, Q). High =While the receivers power is ON. Input port for detecting signal from the DMF DMSD decoder (IC, pin ). High =When the DMF signal is detected. Input port for DMF signal from the DMF DMSD decoder (IC, pin ). Outputs clock signal from the DMF decoder DMCK (IC, pin ). RXMUE PDS Outputs strobe signal to the DDS IC (MAIN-A UNI; IC, pin ). Input port for US connection detecting signal from the VUS line. VUS High =While a PC is connected through [US] connector on the receiver's main unit. Outputs strobe signal to the D/A converter DS (MAIN-A; IC, pin ). Outputs strobe signal to the nd PLL IC PS (MAIN-A UNI; IC, pin ). Outputs strobe signal to the st PLL IC PS (MAIN-A UNI; IC, pin ). Outputs strobe signal to the down converter DPS PLL IC (MAIN-A UNI; IC, pin ). Outputs strobe signal to the expander (MAIN-A; MS IC, pin ). Outputs strobe signal to the expander (MAIN-A; MS IC, pin ). Outputs strobe signal to the expander (MAIN-A; MS IC, pin ). Input port for RSSI signal from the RSSI signal CMAD* selector (MAIN-A; IC, pin ). Input port for VSC signal from the tone filter VSCAF* (IC, pin ). Input port for CCSS signals from the tone RONE* filter (MAIN- UNI; IC, pin ). Inputpor t for RSSI signal from the IF IC SMAD* (MAIN-A/ UNIS; IC, pin ). EMP Input port for internal temperature detection. Input port for RSSI signal from the IF IC (MAIN-A/ SCAD UNIS; IC, pin ) for band scope function. Input por t for RSSI signal from the IF IC CMAD (MAIN-A UNI; IC, pin ) for AFC function. Input port for VSC signal from the tone filter VSCAF (IC, pin ). Input port for CCSS signals from the tone RONE filter (MAIN-A UNI; IC, pin ). Outputs voltage line control signal to the.v USPOW regulator (IC, Q, Q, Q). High =During in the US audio mode. *PCR only
SECION ADJUSMEN PROCEDURES - PREPARAION When adjusting IC-PCR/PCR, controller for the R/R and JIG cable (see the illust below) are required. REQUIRED ES EQUIPMENS EQUIPMEN GRADE AND RANGE EQUIPMEN GRADE AND RANGE Standard signal generator (SSG) Frequency range :. MHz Output level :. µv to mv ( to dm) AC milliwattmeter Measuring range : µw to mw Frequency counter Frequency range :. MHz Frequency accuracy : ± ppm or better Sensitivity : mv or better External speaker Input impedance : Ω Capacity : More than W CAUION!: ACK UP the originally programmed memory data in the receiver before starting the adjustment. here is possiblity of losing original memory data when the adjustment is finished. efore starting adjustment: Remove the top cover and sheild cover on the MAIN-A UNI. (Refer to the SECION for details) Set the AF switch to PHONES. (Refer to the instruction manual for details) CONNECION <FOR IC-PCR ADJUSMEN> <FOR IC-PCR ADJUSMEN> -
<FOR IC-PCR ADJUSMEN> ENERING ADJUSMEN MODE CONROLLER q Set the direction of the [VOL] to o'clock ( o'clock). w Push and hold [S MODE]+[A PRIO]+[N AGC] +[MONI /-SCAN] key, and turn the power switch (MAIN UNI) ON. [VOL] [SE LOCK] [S MODE] KEY ASSIGNMENS FOR HE ADJUSMEN MODE [SE LOCK] : Selects the next adjustment item. [S.MW MW] : Selects the previous adjustment item. [DIAL] : Adjusts the value for the item manually. [S MODE] : Adjusts the value for the item automatically. Stores the set value. [N AGC] [V/MHz SCAN] [A PRIO] [MONI /-SCAN] [V/MHz SCAN] : Verify the adjustment value for the item. [VOL] [DIAL] [S.MW MW] DISPLAY EXLE : Adjust the audio output level. Adjustment frequency Adjustment item <FOR IC-PCR ADJUSMEN> ENERING ADJUSMEN MODE CONROLLER q Set the direction of the [VOL] (Right) to o'clock ( o'clock). w Push and hold [MAIN N]+[MAIN AGC]+[A PRIO] +[MODE SCAN] key, and turn the power switch (MAIN UNI) ON. [MAIN AGC] MAIN AGC [SE SKIP] SE PWR SKIP VFO/MR S.MW MHz S MHz S VOL KEY ASSIGNMENS FOR HE ADJUSMEN MODE DIAL SQL MONI MODE SCAN [MODE SCAN] [DIAL] (Right band) : Adjusts the value for the item manually. [VFO/MR] [VOL] SQL /-SCAN [VFO/MR S.MW] (Right band) : Selects the previous adjustment item. [MAIN N] VOL DIAL [MAIN N] : Selects the next adjustment item. MAIN N VFO/MR S.MW [DIAL] A PRIO [A PRIO] DISPLAY EXLE [SE SKIP] : Adjusts the value for the item automatically. Stores the set value. MAIN-A UNI adjustment [A PRIO] : Verify the adjustment value for the item. [VOL] (Right band) : Adjust the audio output level. MAIN- UNI adjustment -
- MAIN-A UNI ADJUSMEN ADJUSMEN OPERAION VALUE Connect a frequency counter to the J connector on the MAIN-A UNI (see the illust below). ERENCE FREQUENCY []. MHz Push [S MODE]/[SE SKIP] to store the set value. PF [L] [HF] Preset the adjustment items as below before the PF adjustment. [AGA] : A [IFA] : Automatic adjustment Connect an SSG to the antenna connector AN and set as; Frequency : Specified frequency* Modulation : none Level : Specified level Push [S MODE]/[SE SKIP] to store the adjustment value. AGC GAIN (FM) [AGF] Repeat for each specified frequency and level for [L] to [HF]. Connect an SSG to the antenna connector and set as; Frequency : Specified frequency* Mode : FM Modulation : khz Deviation :. khz Level : + dµ ( dm) mw Connect a speaker and milliwatt meter then set the audio output level to mw with [VOL]. Push [SE LOCK]/[MAIN N] to select next adjustment item. (AM) [AGA] Set the SSG as; Frequency Mode Modulation Deviation Level mw : Specified frequency* : AM : khz : % : + dµ ( dm) Set the audio output level to mw with [DIAL]. Verify that the demodulated audio signals are not distorted badly. Push [S MODE]/[SE SKIP] to store the adjustment value. IF GAIN (FM) [IFF] Set the SSG as; Level mw : OFF Connect a speaker and milliwatt meter then set the audio output level to mw with [VOL]. Push [SE LOCK]/[MAIN N] to select next adjustment item. (AM) [IFA] Set the audio output level to µw with [DIAL]. µw Push [S MODE]/[SE SKIP] to store the adjustment value. Refer to the ADJUSMEN IEM LIS on page -. he output level of the standard signal generator (SSG) is indicated as the SSG's open circuit. *Displayed on the controller's display. J -
- MAIN-A UNI ADJUSMEN (coninued) ADJUSMEN S-MEER [NS] [WS] OPERAION Set the SSG as; Frequency Modulation Level VALUE Automatic adjustment : Specified frequency* : None : Specified level Push [S MODE]/[SE SKIP] to store the adjustment value. S-MEER FLANESS [L] [LEH] Repeat for each specified frequency and value for [NS] to [WS]. Set the SSG as; Frequency Modulation Level Automatic adjustment : Specified frequency* : None : Specified level Push [S MODE]/[SE SKIP] to store the adjustment value. AND SCOPE [SC] [SC] Repeat - for each specified frequency and value for [L] to [LEH]. Set the SSG as; Frequency Modulation Level Automatic adjustment : Specified frequency * : None : Specified level Push [S MODE]/[SE SKIP] to store the adjustment value. CENER MEER [CML] (LOW) Repeat for each specified frequency and value for [SC] to [SC]. Set the SSG as; Frequency Modulation Level Automatic adjustment : khz lower than specified frequency* : None : + dµ ( dm) Push [S MODE]/[SE SKIP] to store the adjustment value. [CMH] (HIGH) Set the SSG as; Frequency Modulation Level : khz higher than specified frequency* : None : + dµ ( dm) Push [S MODE]/[SE SKIP] to store the adjustment value. SQUELCH [SQL] Set the SSG as; Frequency Mode Modulation Deviation Level Automatic adjustment : Specified frequency* : FM : khz :. khz : dµ ( dm) Set the [SQL] value to close the squelch with [DIAL]. hen set the [SQL] value at the point where the audio signals just appear. urn the SSG output OFF, and verify that the squelch is closed. Push [S MODE]/[SE SKIP] to store the adjustment value. RSSI [RS] [RS] Set the SSG as; Frequency Modulation Level Automatic adjustment : Specified frequency* : None : Specified level Push [S MODE]/[SE SKIP] to store the adjustment value. RSSI FLANESS [RL] [RH] Repeat for each specified frequency and value for [RS] to [RS]. Set the SSG as; Frequency Modulation Level Automatic adjustment : Specified frequency* : None : Specified level Push [S MODE]/[SE SKIP] to store the adjustment value. Repeat for each specified frequency and value for [RL] to [RH]. Refer to the ADJUSMEN IEM LIS on page -. he output level of the standard signal generator (SSG) is indicated as the SSG's open circuit. *Displayed on the controller's display. -
- MAIN- UNI ADJUSMEN (PCR only) ADJUSMEN PF [L] [HF] OPERAION Set the adjustment items as below before the PF adjustment. [AGA] : A [IFA] : VALUE Automatic adjustment Connect an SSG to the antenna connector AN and set as; Frequency : Specified frequency* Modulation : none Level : Specified level Push [SE SKIP] to store the set value. AGC GAIN (FM) [AGF] Repeat for each specified frequency then level for [L] to [HF]. Connect an SSG to the antenna connector and set as; Frequency : Specified frequency* Mode : FM Deviation :. khz Level : + dµ ( dm) Modulation : khz mw Connect a speaker and milliwatt meter and set the audio output level to mw with [VOL]. Push [MAIN N] to select next adjustment item. (AM) [AGA] Set the SSG as; Frequency Mode Deviation Level Modulation mw : Specified frequency* : AM : % : + dµ ( dm) : khz Set the audio output level to mw with [DIAL]. Verify that the demodulated audio signals are not distorted badly. Push [SE SKIP] to store the adjustment value. IF GAIN (FM) [IFF] Set the SSG as; Level mw : OFF Connect a speaker and milliwatt meter then set the audio output level to mw with [VOL]. Push [SE LOCK]/[MAIN N] to select next adjustment item. (AM) [IFA] Set the audio output level to µw with [DIAL]. Push [S MODE]/[SE SKIP] to store the adjustment value. he output level of the standard signal generator (SSG) is indicated as the SSG's open circuit. *Displayed on the controller's display. - µw
- MAIN- UNI ADJUSMEN (PCR only; continued) ADJUSMEN S-MEER [NS] [WS] OPERAION Set the SSG as; Frequency Modulation Level VALUE Automatic adjustment : Specified frequency* : None : Specified level Push [SE SKIP] to store the adjustment value. S-MEER FLANESS [LL] [LH] Repeat for each specified frequency and value for [NS] to [WS]. Set the SSG as; Frequency Modulation Level Automatic adjustment : Specified frequency* : None : Specified level Push [SE SKIP] to store the adjustment value. Repeat - for each specified frequency and value for [LL] to [LH]. CENER MEER [CML] (LOW) Set the SSG as; Frequency Modulation Level [CMH] (HIGH) Set the SSG as; Frequency Modulation Level Automatic adjustment : khz lower than specified frequency* : None : + dµ ( dm) Push [SE SKIP] to store the adjustment value. : khz higher than specified frequency* : None : + dµ ( dm) Push [SE SKIP] to store the adjustment value. SQUELCH [SQL] Set the SSG as; Frequency Mode Modulation Deviation Level Automatic adjustment : Specified frequency* : FM : khz :. khz : dµ ( dm) Set the [SQL] value to close the squelch with [DIAL]. hen set the [SQL] value at the point where the audio signals just appear. urn the SSG output OFF, and verify that the squelch is closed. Push [SE SKIP] to store the adjustment value. RSSI [RS] [RS] Set the SSG as; Frequency Modulation Level Automatic adjustment : Specified frequency* : None : Specified level Push [SE SKIP] to store the adjustment value. RSSI FLANESS [RL] [RH] Repeat for each specified frequency and value for [RS] to [RS]. Set the SSG as; Frequency Modulation Level Automatic adjustment : Specified frequency* : None : Specified level Push [SE SKIP] to store the adjustment value. Repeat for each specified frequency and value for [RL] to [RH]. Refer to the ADJUSMEN IEM LIS on page -. he output level of the standard signal generator (SSG) is indicated as the SSG's open circuit. *Displayed on the controller's display. -
ADJUSMEN IEM LIS RF RF RF RF ADJUSMEN ADJUSMEN ADJUSMEN Level Disp. Level Disp. Level Disp. Level IEM IEM IEM (dµ/dm) (dµ/dm) (dµ/dm) (dµ/dm) ERENCE NS / LA* / RS / * FREQUENCY NS / LA* / RS / L / NS / LA* / RL / M / NS / LA* / R / H / NS / LA* / R / L / NS / LA* / M / R / NS / LA* / H / S-MEER WS / LAH* / R / L / WS / LL* / R / M / WS / L* / R / H / WS / L* / R / L / WS / L* / H / RH / WS / L* / L / WS / L* / RL / M / WS / L* / R / H / L* / L-* / R / L / L* / L-* / R / M / L* / L-* / R / H / LA* / L-* / L / R / LH* / LL / H / LCL* / L / R / PF L / LCH* / L / S-MEER RH / M / LDL* / L / FLANESS RL / H / LD* / RSSI L / R / L / LD* / FLANESS L / M / R / LD* / L / H / LD* / L / R / LA / LD* / LH / R / HA / LD* / LL / R / L / LD* / L / R / M / LD* / L / R / H / LDH* / L / LC / R / LEL* / L / HC / LE* / L / RH / LD / LE* / L / RL / HD / LE* / LH / R / LE / LE* / LL / R / HE / LE* / L / LF / S-MEER R / LE* / L / FLANESS MF / LE* / L / R / HF / LE* / L / R / AGF / LE* / L / AGC gain R / AGA / LEA* / L / R / IFF off LEH* / L / IF gain R / IFA off SC* / L / NS / R / SC* / LH / NS / LL / SC* / RA / NS / L / SC* / RH / AND SCOPE NS / L / SC* / NS / L / SC* / NS / L / SC* / NS / L / SC* / NS / L / CENER CML / WS / S-MEER L / MEER CMH / WS / L / SQUELCH SQL / WS / L / RS / WS / LA / RS / WS / LH / RS / WS / LL* / RSSI RS / WS / LH* / RS / LAL* / WS / RS / LA* / NS / *: Not necessary for MAIN- adjustment. he output level of the standard signal generator (SSG) is indicated as the SSG's open circuit. ADJUSMEN Disp. IEM -
SECION PARS LIS [LOGIC UNI] IC-PCR IC-PCR [LOGIC UNI] IC IC IC IC IC IC IC IC IC IC IC IC IC IC DESCRIPION S.REG S.REG IC M. LOCAION S-CAMC-CN-G AF XCPPR SNAHCGHDC AF (EL Q) ANSP-E µpcg-e-a ANLM-(E) LAA-E LC-I/SM SNLVCGDCKR PCME/K SM-G-E MFGPGP (RXA) [EUR-], [UK-], [CAN-], [EXP-] MFGPGP RXA- [SEA-] MFGPGP (RXA-) [FRA-], [EXP-] MFGPGP (RX-) [USA-], [USA-] IC UFS-E IC CP-GM IC LMPWR IC SNAHCGHDC IC LMPWR IC US-AEZG IC CDPWR IC S-CNMC-GCG IC CDPWR IC SNLVCGDCKR IC SNAHCGHDC IC SNAHCGHDC IC* AF (EL Q) IC* S.REG ANSP-E IC* LMPWR IC* SNAHCGHDC IC* LMPWR IC* SNAHCGHDC IC* SNAHCGHDC IC* SNAHCGHDC IC* SNAHCGHDV IC* SNAHCGHDC./../../../../../. /../.././../../../../../../../../../../../../. /../../../../././../.././../../../../../../. Q Q Q Q Q Q Q Q Q Q Q Q Q Q* Q* Q* Q* Q* Q* Q* Q* Q* Q* Q*./../../. /../. /../../../.././../../. /. /./../../.././../../../../. D D D D D./../../../../. S.FE S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R S.R SJ (EL NQ) SS-L-E DCEUA XP-(X) A SC LS SC- (ER F) SA-GR (ER) SC LS UNRJ-(X) UNRJ-(X) S--AZ DK SC-GR (ER F) UNRJ-(X) DCEUA S -D-E SA-GR (ER) SC LS S--AZ DK S--AZ DK SC-L (ER F) SC-L (ER F) SA-GR (ER) SA-GR (ER) UNRJ-(X) SR- E SS E- SS (ER F) S.ZEN MA-M (X) MAS-(X) Except [EUR-], [UK-], [USA-], [USA-] only D MAS-(X) [USA-], [FRA-], [CAN-] only D MAS-(X) [UK-], [USA-], [CAN-] only D MAS-(X) [EUR-], [FRA-] only *IC-PCR only./../../. DESCRIPION D D M. LOCAION./. MAS-(X) MAS-(X) [EUR-], [FRA-] only D MAS-(X) D MAS-(X) D MAS-(X) [EUR-], [FRA-] only D HVCRF-E D MAS-(X) D ISS E D ISS E D ISS E D ISS E D ISS E D ISS E D MAS-(X) D MAS-(X) D MAS-(X) D* MAS-(X) D* MAS-(X) D* ISS E./. /. /../../../../../../../../../../../.././../../. X X X X S.XL S.XL S.XL S.XL CR- (. MHz) CR- (. MHz) CR- (. MHz) CR- (. MHz)./../../../ L L L L COL RCRDNP-K ELJFC K-F ELJF K-F ELJFC K-F./../../. R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R ERJGEYJ V (. k) ERJGEYJ V ( k) ERJGEJ X ( k) ERJGEJ-JPW ERJGEJ-JPW ERJGEJ X () ERJGEJ X (. k) ERJGEJ X (. k) ERJGEJ X (. k) ERJGEJ X () ERJGEYJ V (. k) ERAYED V ( k) ERJGEJ X ( k) MCREZHJ k ERJGEYJ V () ERJGEYJ V () ERJGEJ X ( M) ERJGEYJ V ( k) MCREZHJ. (R) ERJGEYJ V () ERJGEYJ V ( k) ERJGEJ X () ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X (. k) ERJGEJ X () ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X () ERJGEJ X ( M) ERJGEJ X ( k) ERJGEJ X () ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X () ERJGEJ X (. k)./ /./../../. /../././../../../../.././../ /../. /../../../../../../../../. /../../../../../../. /../../../../../../../../../../../../../../../ M.=Mounted side (: Mounted on the op side, : Mounted on the ottom side) S.=Surface mount -
[LOGIC UNI] R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R [LOGIC UNI] *IC-PCR only DESCRIPION S.MR ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( M) ERJGEJ X ( M) ERJGEJ X ( M) ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X () ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEYJ V () ERJGEYJ V () ERJGEJ X ( k) ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( M) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ-JPW ERJGEJ X ( k) ERJGEJ X (. M) ERJGEJ X ( k) NCG LH J ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( M) ERJGEJ X ( M) MCREZHJ () ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X () ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X () ERJGEYJ V ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X () ERJGEJ-JPW ERJGEJ X ( M) ERJGEJ X (. k) ERJGEJ X (. k) M. LOCAION./. /../../../. /../../ /././../../../../ /. /. /././../../../../../../../../../../../../../../../../../../. /../../../../../../../../../../. /../../../ /.././../../../../../. /.././../. /../../../../../../. /./../../../. /../../../../../../../../../. /../../../. DESCRIPION M. LOCAION R R R R R R R R R R R R R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* R* ERJGEJ X (. k) ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ-JPW ERJGEJ-JPW ERJGEJ-JPW ERJGEJ X ( k) ERJGEJ X ( k) ERJENF V ( k) ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X () ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X () ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ-JPW ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X (. k) ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X () ERJGEJ X ( k) ERJGEJ X () ERJGEJ X () ERJGEJ X () ERJGEJ X (. k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X (. k) ERJGEJ X (. M) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEYJ V () ERJGEYJ V () ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( M) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ-JPW ERJGEJ X ( k) ERJGEJ-JPW ERJGEJ X ( k) ERJGEJ X ( k) ERJGEJ-JPW./.././. /../../. /. /../../../../. /../../../../../../../../../../../. /../../../././../../../../../../../. /. /. /../. /.././../../. /../../. /./../../../../../../../../../. /./../../../../../../../../. /../../../../. /../../. /../../../../. C C C C C C C J H K- CE S EEEEAWP EEEEAWP EEEEAWP C J H K-./.././.././../ M.=Mounted side (: Mounted on the op side, : Mounted on the ottom side) S.=Surface mount -