SRVI MANUAL MULTIAND FM TRANSIVR
INTRODUTION This service manual describes the latest service information for the I-TA/ at the time of publication. MODL VRSION U.S.A. Australia S..Asia urope U.K. Italy I-TA I-T SYMOL USA- AUS SA UR UK ITA To upgrade quality, all electrical or mechanical parts and internal circuits are subject to change without notice or obligation. DANGR NVR connect the transceiver to an A outlet or to a D power supply that uses more than V. Such a connection could cause a fire hazard and/or electric. DO NOT expose the transceiver to rain, snow or any liquids. DO NOT reverse the polarities of the power supply when connecting the transceiver. DO NOT apply an RF signal of more than 0 dm (00mW) to the antenna connector. This could damage the transceiver's front end. ORDRING PARTS e sure to include the following four points when ordering replacement parts:.... 0-digit order numbers omponent part number and name quipment model name and unit name Quantity required <SL ORDR> 0000 S.I TFN I-TA/ RF UNIT 0000 Screw PH T Mx0 ZK I-TA/ hassis pieces 0 pieces Addresses are provided on the inside back cover for your convenience. RPAIR NOTS....... Make sure a problem is internal before disassembling the transceiver. DO NOT open the transceiver until the transceiver is disconnected from its power source. DO NOT force any of the variable components. Turn them slowly and smoothly. DO NOT short any circuits or electronic parts. An insulated turning tool MUST be used for all adjustments. DO NOT keep power ON for a long time when the transceiver is defective. DO NOT transmit power into a signal generator or a sweep generator. ALWAYS connect a 0 d to 0 d attenuator between the transceiver and a deviation meter or spectrum analyzer when using such test equipment.. RAD the instructions of test equipment thoroughly before connecting equipment to the transceiver.
TAL OF ONTNTS STION SPIFIATIONS STION INSID VIWS STION DISASSMLY INSTRUTIONS STION IRUIT DSRIPTION STION - RIVR IRUITS.....................................................- - TRANSMITTR IRUITS.................................................- - PLL IRUITS...........................................................- - POWR SUPPLY IRUITS................................................- - PORT ALLOATIONS.....................................................- ADJUSTMNT PRODURS - PRPARATION..........................................................- - PLL ADJUSTMNT.......................................................- - RIVR ADJUSTMNT..................................................- - TRANSMITTR ADJUSTMNT..............................................- STION PARTS LIST STION MHANIAL PARTS AND DISASSMLY STION SMI-ONDUTOR INFORMATION STION OARD LAYOUTS - LOGI UNIT............................................................- - RF UNIT...............................................................- - VO OARD............................................................- STION 0 LOK DIAGRAM STION VOLTAG DIAGRAM - LOGI UNIT............................................................- - RF UNIT...............................................................-
STION SPIFIATIONS M GNRAL Frequency range : Version MHz 0 MHz T: T: 0 0* 0 MHz U.S.A. 0. Australia 0. S..Asia 0. urope, U.K. 0 00 MHz. MHz (R only) 0 00 0.* 0 0 0 00 0.* 00.* 0 00 0.* 0 0 0 00 0.* 00.* 0 00 0.* R:.* R: 00.* T:.* R:.* Italy 0 T:.* R:.* * Specifications guaranteed MHz, * Specifications guaranteed 0 0 MHz * Specifications guaranteed 0 0 MHz, * Not guaranteed Mode : FM and AM (R only), WFM (Rx only) No. of memory channels : (incl. 0 pairs of scan edges and call channels) Frequency stability : ± ppm max. ( 0 to 0 ; F to 0 F) Tuning steps : *, 0,., *, 0,, 0, 0 and 00 khz *Not available for 00 MHz band Usable tempareture range : 0 to 0 ; F to 0 F Usable battery pack/case : P-, P-, P-00 and P- Power supply requirement :. V D or specified battery pack Polarity : Negative ground Frequency resplution : khz and. khz (0 khz and. khz for 00 MHz band) urrent drain (at. V D) : (typical value) 0/ MHz 0 MHz 00 MHz High power. A. A 0. A Low power 0. A 0. A Rated output 0. A 0 ma Standby 0 ma (at. V) Power saved 0 ma (at. V) T R Anntena connector : SMA (0 Ω) Dimensions (projections not included) : (W) 0(H).(D) mm; (W) (H) (D) in Weight (with P-/Ant.) : 0 g; 0. oz M TRANSMITTR Output power (at. V D) : High Low.0 W typical (.0 W at 00 MHz band).0 W typical (0. W at 00 MHz band) Modulation system : Variable reactance modulation Max. freq. deviation : ± khz Spurious missions : Less than 0 d (0 MHz, MHz and 0 MHz) Less than 0 d (other) Less than 0 d (urope version at 00 MHz) xternal MI connector : -conductor.(d) mm ( ); kω -
M RIVR Receiver system : Double-conversion superheterodyne Intermediate frequency : st. MHz (. MHz: WFM) nd 0 khz Sensitivity* : (except spurious points; typical values) and FM AM WFM 0 MHz 0. µv 0. µv MHz 0. µv 0 MHz 0. µv 00 MHz 0. µv.0 µv. MHz * FM and WFM are measured at d SINAD, AM is measured at 0 d S/N. Squelch sensitivity : 0,, 0 MHz 00 MHz AM (0 MHz only) WFM Less Less Less Less than than than than 0. µv (Threshold) 0. µv (Threshold) 0. µv (Threshold). µv (Threshold) Selectivity (except WFM) : More than khz/ d Less than 0 khz/ 0 d Spurious and image rejection ratio : 0, MHz More than 0 d 0 MHz More than 0 d 00 MHz More than d (except half IF, nd image, 0 MHz band IF and WFM) Audio output power : 0 mw typical at 0 % distortion with an Ω load All stated specifications are subject to change without notice or obligation. -
STION INSID VIWS LOGI UNIT OTTOM VIW rystal filter (: R-.0MH) PU (I: MMLGP) AF mute switch (Q: SJ) AF volume (I0: MFP) AF power amplifier (I0: TAF) IF I (I0: TAFN) RF UNIT OTTOM VIW TOP VIW Power amplifier (Q: SK0) Drive amplifier (Q: MRF) AP sensor drive amplifier Q: UN Q: P0 ( ) AP control circuit WFM RF amplifier circuit st mixer (I0: µpt) PLL I (I0: µpd0g) VO circuit -
STION DISASSMLY INSTRUTIONS RMOVING TH HASSIS PANL RMOVING TH SHILD PLAT Remove knob A, and unscrew nut. Unscrew screws. Remove the chassis panel in the direction of the arrow. Unsolder 0 points, F, to separate the shield plate and LOGI unit. F hassis panel Shield plate A F F LOGI unit RMOVING TH LOGI UNIT RMOVING TH RF UNIT Unsolder point, G, to separate [ANT] plug. Unscrew screws, H, to separate the RF unit. Remove the RF unit in the direction of the thick arrow. Remove the sealing rubber. Unsolder point, D, to separate a SNSOR control. Unscrew screws,. Unplug J to separate LOGI unit and RF unit. Remove the LOGI unit in the direction of the arrow. D H D Sealing rubber H G J [ANT] plug LOGI unit RF unit hassis panel -
STION IRUIT DSRIPTION Thus, transmit signals are blocked from entering the receiver circuits. The antenna switching circuit employs a /λ type diode switching system. The passed signals are then applied to each RF amplifier circuit. - RIVR IRUITS -- DUPLR IRUIT (RF UNIT) The transceiver has a duplexer (low-pass and high-pass filters) on the frist stage from the antenna connector to separate the signals into below UHF and SHF signals. The highpass filter (L L, and 0) is for SHF (00 MHz) signal and the low-pass filter (, 0, and L L) is for below UHF (0 MHz, MHz, 0 MHz and WFM) signals. The filtered SHF signal is applied to the low-pass fileter (, L and L). -- 0 MHz AND RF IRUIT (RF UNIT) The RF circuit amplifies signals within the range of frequency coverage and filters out-of-band signals. The signals from the antenna switching circuit (D0 and D0) are amplified at the RF amplifier (Q0). The amplified signals pass through the tunable bandpass filter (L0 L0,,, 0, D0, D0) to suppress out-of-band signals, and are then applied to the st mixer circuit (I0, pin ). The RF signals below UHF pass through the duplexer circuit and are separated into VHF (0 MHz, MHz and WFM band) and UHF (0 MHz band) signals. The high-pass filter (, L, L) is for UHF (0 MHz band) signal and the low-pass filter ( 0, L0 L) is for VHF (0 MHz, MHz and WFM band) signals. -- MHz AND WFM ANDS RF IRUITS (RF UNIT) The VHF signals are applied to the another duplexer circuit for separation into 0 MHz and above WFM band signals. The high-pass filter (, and L L) is for MHz and WFM band signals and the low-pass filter ( and L L) is for 0 MHz band signal. The signal from the antenna switching circuit (D0, D0) are applied to the each band-pass fileters and RF amplifier. RF signals MHz band The MHz band signals are applied to the RF amplifier (Q0) via the tunable bandpass filter (L0, L0, 0, D0). The amplified signals pass through the tunable bandpass filter (, D0, D0, L0, L0), and are then applied to the st mixer circuit (I0, pin ). The separated signals are applied to each RF circuits. -- ANTNNA ITHING IRUITS (RF UNIT) The antenna switching circuit functions as a low-pass filter while receiving. However, its impeadance becomes very high while transmitting by applying a current to D0 and D0 (0 MHz), D0 and D0 (MHz and WFM), D0 and D0 (0 MHz), D and D (00 MHz). RF IRUIT ANT SHF band (00 MHz) FI I FI Q RF RF I0 FM mode D0 FI0 D0 Mode. NHz Mode TAL to IF amp. (Q0) RAMI FI0. NHz UHF band (0 MHz) VHF band ( MHz) I0 st mixer st LO WFM band (R only) WFM mode VHF band (0 MHz) FI0 Q0 RF RF D0, D0 Q0 D0 RF D0 Q0 D0 RF D0, D0 Q0 RF D0, D0 ANT D, D ANT D0, D0 ANT D0, D0 ANT HPF HPF HPF LVL Q ONV. "TUN" signal from I, pin (LOGI unit) -
0,, 0 and 00 MHz band The applied RF signals are mixed with st LO signals at the st mixer (I0) to produce a. MHz st IF signal. The st IF signal is output from the st mixer (I0, pin ), and then passed through the crystal bandpass filter (FI0) to suppress unwanted harmonic components. The filtered st IF signal is applied to the IF amplifier (I0). The amplified signal is applied to the nd mixer circuit (LOGI unit; I0, pin ). RF signals WFM band The WFM band signals are applied to the RF amplifier (Q0) via the tunable band-pass filter (D0). The amplified signals pass through the tunable bandpass filter (D0), and are then applied to the st mixer circuit (I0, pin ). Varactor diodes (D0, D0, D0, D0, D0, D0, D0) are employed by the tunable bandpass filter to tune the center frequency of the bandpass filter. These diodes are controlled by the PLL lock voltage and obtain good image response rejection. WFM band The RF signals are mixed with st LO signals at the st mixer (I0) to produce a. MHz st IF signal. The st IF signal is output from the st mixer (I0, pin ), and then passed through the st IF filter (FI0) to suppress unwanted harmonic components. The filtered signal is applied to the nd mixer circuit (LOGI unit; I0, pin ). -- 0 MHz AND RF IRUIT (RF UNIT) The signals from the antenna switching circuit (D0 and D0) are amplified at the RF amplifier (Q0). The amplified signals pass through the bandpass filter (FI0), and are then applied to the st mixer circuit (I0, pin ) after being amplified at another RF amplifier (I0). The st LO signals are gererated at the VO circuit which consists of Q0, Q0, D0, Q, Q, D0, D for 0 MHz, MHz and WFM, Q, Q, D, D for 0 MHz, Q0, D, D for 00 MHz on the VO unit. -- 00 MHz AND RF IRUIT (RF UNIT) The signals from the antenna switching circuit (D and D) are amplified at the RF amplifier (Q). The amplified signals pass through the bandpass filter (FI), and are then applied to the RF amplifier (I). The amplified signal is applied to the st mixer circuit (I0, pin ) via the bandpass filter (FI). The st LO signal for 0,, 0, WFM band The st LO signals which are generated on the VO unit are applied to the buffer-amplifier (Q and D for 0 MHz, MHz and WFM, Q for 0 MHz). The buffer-amplified signals are applied to the LO-amplifier (Q for 0 MHz, MHz and WFM, Q for 0 MHz), and are then applied to the st mixer circuit via the T/R switch (D0 and D0 for 0 MHz, MHz and WFM, D0 and D0 for 0 MHz) on the RF unit. -- ST MIR IRUIT (RF UNIT) The st mixer circuit converts the received RF signals into a fixed frequency of the st IF signal with a st LO output frequency. y changing the PLL frequency, only the desired frequency will pass through at the next stage of the st mixer. st mixer circuit produces the different st IF signal for WFM and other band signals. The st LO signal for 00 MHz band The st LO signals which are generated on the VO unit are applied to the buffer-amplifier (Q). The buffer-amplified signals are applied to the doubler circuit (Q), and passes through the high-pass and low-pass filter. The filtered signals are applied to the st mixer circuit (Q0) on the LOGI unit after being amplified at the LO-amplifier (Q). nd IF AND DMODULATOR IRUITS (LOGI unit) R R R R0 nd IF filter 0 khz FI0 Noise detector Active filter nd Mixer Limiter amp. FM detector Noise comp. RSSI 0 R0 AF signal to AF filter (LOGI unit; I) R R WFM Q0 - I0 TAFN nd IF (. MHz) from Q0 (RF unit) "NOIS" signal to the PU pin 0 0 "nd LO" signal from I0, pin (RF unit) "SD" signal to the PU pin
ven when the squelch is closed, the AF mute switch (Q) opens at the moment of emitting beep tones. -- ND IF AND DMODULATOR IRUITS (RF AND LOGI UNITS) The nd mixer circuit converts the st IF signal to the nd IF signal. A double conversion superheterodyne system (which converts receive signals twice) improves the image rejection ratio and obtain stable receiver gain. TON SQULH The tone squelch circuit detects AF signals and opens the squelch only when receiving a signal containing a matching subaudible tone (TSS). When tone squelch is in use, and a signal with a mismatched or no subaudible tone is received, the tone squelch circuit mutes the AF signals even when noise squelch is open. The FM IF I (LOGI unit; I0) contains nd local oscillator, nd mixer, limiter amplifier, quadrature detector and Smeter detector circuits. A portion of the AF signals from the FM IF I (I0, pin) passes through the AF filter (I) to remove AF (voice) signals and is applied to the TSS decoder inside the PU (I, pin ) via the TIN line to control the AF mute switch. The filtered st IF signal from the st IF filter (RF unit; FI0 or FI0) is mixed with the nd LO signal at the nd mixer (LOGI unit; I0) to produce the 0 khz nd IF signal. The nd IF signal passes through or bypasses (WFM mode signal) nd IF filter (FI0) where unwanted heterodyne signals are suppressed via the mode switch (LOGI unit; D0, D0). The filtered signals are applied to the limiter amplifier section (LOGI unit; I0, pin ), and then applied to the quadrature detector section to demodulate the nd IF signal into AF signals. - TRANSMITTR IRUITS -- MIROPHON LIFIR IRUIIT (LOGI UNIT) The demodulated AF signals are output from pin of the IF I (LOGI unit; I0) and are applied to the AF circuit. The microphone amplifier circuit amplifies the audio signals from the microphone, within d/octave pre-emphasis characteristics (00 Hz khz), to a level needed for the modulation circuit. -- AF LIFIR IRUIT (LOGI UNIT) The AF amplifier circuit which is included a low-pass and high-pass filter, AF mute switch, AF volume controller and AF amplifier amplifies the demodulated AF signals to drive a speaker. The AF signals from the internal microphone (M) or external [MI] jack (J) are applied to the microphone (limiter) amplifier (I0, pin ) which has d/octave pre-emphasis characteristics, and are then passed through the lowpass filter (I0, pin and ). The filetered signals are applied to the modulation circuit for each band in the RF unit via the band switch (Q0: for MHz band, Q0: for UHF band, Q0: for 0 MHz band, Q0: for 0MHz band) as the MOD signal. The demodulated AF signals (DTO signal) from the FM IF I (I0) are passed through the AF filter (low-pass and high-pass filters). The filtered signals are applied to the AF mute switch (Q) which is controlled by RM/MM signals from the PU (I, pin ), and are then applied to the electric volume control circuit (I0, I0). The level controlled AF signals are output from volume I (I0, pin ) and are then applied to the AF amplifier (I0, pin ). The AF signals are then applied to the internal speaker (SP) via the [T SP] jack (LOGI unit; J) when no plug is connected to the jack. -- MODULATION IRUIT (VO AND RF UNIT) The modulation circuit modulates the VO oscillating signal (RF signal) using the microphone AF signals. () 0 MHz band The signals from the limiter amplifier (RF unit; I0) changes the reactance of a diode (RF unit; D) to modulate the oscillated signal at the 0-VO circuit (RF unit; Q, D, L ). The modulated signals are amplified at the buffer-amplifier (Q) and the LO amplifier (Q). The amplified signals are applied to the drive/power amplifier circuits for VHF band. The AF filter circuit (I) removes AF signals below 00 Hz (TSS signals) for clear AF output and these are applied to the PU (I, pin) for TSS squelch detection via the TIN line. --0 SQULH IRUIT (LOGI UNIT) NOIS SQULH The noise squelch circuit cuts out AF signals when no RF signals are received. y detecting noise components in the AF signals, the squelch circuit switches the AF mute switch. () MHz band The signals from the limiter amplifier (RF unit; I0) changes the reactance of a diode (VO unit; D0) to modulate the oscillated signal at the -VO circuit (VO unit; Q, Q, D0, D D). The modulated signals are amplified at the buffer-amplifier (Q, Q) and the LO amplifier (Q). The amplified signals are applied to the drive/power amplifier circuits for VHF band. A portion of the AF signals from the FM IF I (I0, pin ) are applied to the active filter section (I0, pin, ). The active filter section amplifies and filters noise components. The filtered signals are applied to the noise detector section and output from I0 (pin ) as NOIS signal. The NOIS signal from I0 (pin ) is applied to the PU (I, pin ). The PU analyzes the noise condition and outputs the RM/MM signal to AF mute switch (Q). -
The amplified signal is passed through the antenna switching circuit (D0 and D0), low-pass filters and high-pass filters. The signal is applied to the antenna connector. () 0 MHz band The signals from the limiter amplifier (RF unit; I0) changes the reactance of a diode (VO unit; D) to modulate the oscillated signal at the 0-VO circuit (VO unit; Q, Q, D, D, L). The modulated signals are amplified at the buffer-amplifier (Q) and the LO amplifier (Q). The amplified signals are applied to the drive/power amplifier circuits for UHF band. () 0 MHz PA The signal from the LO amplifiers (Q) is passed through the Tx/Rx switch (D0 and D0), and is amplified at the buffer amplifier (Q) and the YGR amplifier (Q). The amplified signal is applied to the driver amplifier (Q), and is then amplified at the power amplifier (Q) to obtain.0 W of RF power. () 00 MHz band The signals from the limiter amplifier (RF unit: I0) changes the reactance of a diode (VO unit; D) to modulate the oscillated signal at the 00-VO circuit (VO unit; Q0, D, D, L0). The modulated signals are amplified at the buffer-ampifier (Q). The amplified signals are applied to the doubler circuit (Q), and then passed through the high-pass ( 0, L, L) and the low-pass (, L, L) filters. The filtered signals are amplified at the buffer-amplifier (Q) and the LO amplifier (Q). The amplified signals are applied to the drive/power amplifier circuits for SHF band. The amplified signal is passed through the antenna switching circuit (D0 and D0), low-pass filters and high-pass filters. The low-pass filtered signal is applied to the antenna connector. () 00 MHz PA The signal from the LO amplifiers (Q) is passed through the Tx/Rx switch (D0 and D0), and is amplified at the buffer-amplifiers (Q and Q) and the YGR amplifier (Q). The amplified signal is applied to the driver amplifiers (Q) to obtain.0 W of RF power. -- DRIV/POWR LIFIR IRUITS (RF UNIT) The amplified signal is passed through the antenna switching circuit (D and D), low-pass filter and high-pass filters. The high-pass filtered signal is applied to the antenna connector. The amplifier circuit amplifies the VO oscillating signal to the output power level. () 0 MHz PA The signal from the LO amplifiers (Q) is amplified at the buffer-amplifier (Q) and the YGR amplifier (Q). The amplified signal is applied to the driver amplifiers (Q), and is then amplified at the power amplifier (Q) to obtain.0 W of RF power. ollector voltages for the drive amplifier (Q) and control voltage for the power amplifier (Q) and YGR amplifier (Q) are controlled by the AP circuit to protect the power module from a mismatched condition as well as to stabilize the output power. The amplified signal is passed through the antenna switching circuit (D0 and D0) and low-pass filters, and is then applied to the antenna connector. -- AP IRUITS (RF UNIT) The AP circuit protects the power amplifier from a mismatched output load and stabilizes the output power. The AP circuit is designed to use VHF, UHF and SHF bands commonly. () MHz PA The signal from the LO amplifiers (Q) is passed through the Tx/Rx switch (D0 and D0), and is amplified at the buffer-amplifier (Q) and the YGR amplifier (Q). The amplified signal is applied to the driver amplifiers (Q), and is then amplified at the power amplifier (Q) to obtain.0 W of RF power. AP ONTROL IRUIT AP SNSOR IRUIT R T YGR 00 MHz amp. Q RF transmit signal Q Q 0 MHz RF transmit signal 0, MHz RF transmit signal D/A ONVRTR YGR amp. Q YGR amp. Q VGG PST I0 I (LOGI unit) Differential amplifier - Drive amp. Q Power amp. Q to the antenna
The applied signal is divided by serial data from the PU (Ndata) and phase-detected with the divided reference frequency ( khz) at the phase detector section in the PLL I. The phase-detected signal is output from I0 (pin ) and converted D voltage at the active filter (Q, Q). The converted D voltage is fed back to the VO board as the VLV signal of the lock voltage. The AP sensor (R) detects driving current from the drive voltage at the YGR (Q), drive (Q) and power (Q) amplifiers. The detected current is converted into D voltage at Q, then applied to the AP control circuit (I0, pin ). The applied voltage is compared with a PST voltage from the PU via the D/A converter (LOGI unit; I), and the AP control circuit outputs VGG voltage from pin to control the YGR, drive and power amplifiers. -- 00MHz AND PLL IRUIT (VO OARD AND RF UNIT) When the driving current is increased, input voltage of the differential amplifier (I0, pin ) will be increased. In such cases, the differential amplifier output voltage (I0, pin ) is decreased to reduce the driving current. The osillated signal at the 00-VO circuit (VO unit; Q0, D and D) is amplified at the buffer-amplifiers (VO unit; Q and Q). The signal passes through the buffer amplifier (Q), the high-pass ( 0, L and L) and the low-pass filter (, L and L). The filtered signal is applied to the PLL I (I0, pin ) via the buffer amplifier (Q). - PLL IRUITS -- 0 MHz AND PLL IRUIT (RF UNIT) The applied signal is divided by serial data from the PU (Ndata) and phase-detected with the divided reference frequency ( khz) at the phase detector section in the PLL I. The phase-detected signal is output from I0 (pin ) and converted D voltage at the active filter (Q, Q). The converted D voltage is fed back to the VO board as the VLV signal of the lock voltage. The osillated signal at the MVO (Q, D) is amplified at the buffer amplifiers (Q, Q). The amplified signal is applied to the PLL I (I0, pin ) via the buffer-amplifier (Q). The signal which is applied to the PLL I (I0) is divided by N-data from the PU and phase-detected with the divided reference frequency ( khz) then output from pin. The output signal is converted into D voltage at the active filter (Q0, Q0) and is fed back to the MVO as the lock voltage. - POWR SUPPLY IRUITS VOLTAG LIN -- MHz AND PLL IRUIT (VO OARD AND RF UNIT) The osillated signal at the -VO circuit (VO unit; Q, Q, D0 and D) is amplified at the buffer amplifiers (VO unit; Q).The amplified signal is applied to the PLL I (I0, pin ) via a buffer-amplifier (Q0). LIN DSRIPTION HV The voltage from the external power supply or attached battery pack. The same voltage as the HV line (external power supply or battery pack) passed through a diode (RF unit; D). ommon V converted from the line by PU regulator I (LOGI unit; I). The PU output voltage is supplied to the regulator circuits, etc. The applied signal is divided by serial data from the PU (Ndata) and phase-detected with the divided reference frequency ( khz) at the phase detector section in the PLL I. The phase-detected signal is output from I0 (pin ) and converted D voltage at the active filter (Q, Q). The converted D voltage is fed back to the VO board as the VLV signal of the lock voltage. While operating in the MHz band, the lock voltage is applied to the PU (LOGI unit; I) via the tune control circuit (Q0) to track the center frequency of the tunable bandpass filters (D0, D0, D0) as the TUN signal. -- 0 MHz AND PLL IRUIT (VO OARD AND RF UNIT) The osillated signal at the 0-VO circuit (VO unit; Q, Q, D and Q) is amplified at the buffer-amplifiers (VO unit; Q).The amplified signal is applied to the PLL I (I0, pin ) via a buffer-amplifier (Q0). - ommon V converted from the line by the regulator circuit (LOGI unit; Q and Q) using the PU regulator (LOGI unit; I.) ommon V converted from the line by the regulator circuit (LOGI unit; I, Q, Q and Q) using the regulator (LOGI unit; Q and Q). R V for receiver circuit converted from the line by the R regulator circuit (RF unit; Q and Q). T V for transmitter circuit converted from the line by the T regulator circuit (RF unit; Q0 Q0 and D0). The T regulator circuit is controlled by the PU (LOGI unit; I, pin ) via the T line.
- PORT ALLOATIONS -- I/O PANDR I (RF UNIT; I) -- I/O PANDR I (RF UNIT; I) Pin Port number name Pin Port number name Description Description Q Outputs VHVO regulator control signal. Q Outputs 00 MHz band R regulator control signal. Q Outputs VLVO regulator control signal. Q Outputs AM mode regulator control signal. Q Outputs MVO regulator control signal. Q Outputs WFM band R switching control signal. Q Outputs VO shift signal for SHF, UHF, MHz and 0 MHz. Q Outputs WFM band R regulator control signal. Q Outputs VO regulator control signal. Q Outputs 0 MHz band T and R regulator control signal. Q Outputs UHVO regulator control signal. Q Outputs VHF band T and R regulator control signal. Q Outputs UHF T and R regulator control signal. Q Outputs 00 MHz T and R regulator control signal. PLL circuit VO OARD 00MHz VO Q0, D, D Q, Q uff. 0 MHz VO Q, Q, D, D Q Q Q, D T/R D0, D0 Amp. Q uff. "LOKV" signal to the I, pin Q uff. uff. I0 (PLL I) Phase detector to st mixer circuit (I0, pin ) to transmitter circuit Q Q, D to transmitter circuit Q0 uff. 0 MHz T VO Loop Q, Loop Q0, filter Q filter Q0 to transmitter circuit to transmitter circuit 0MHz R VO Q0, Q0, D0 TUN TRL. MHz T/R D0, D0 Amp. uff. MHz VO Q, Q, D0, D Q0 D0, D0 T/R Q Amp. Programmable counter Programmable divider Prescaler Shift register PST LK DATA I0 (PLL I) - uff. LK DATA ST Q
-- PU (LOGI UNIT; I) Pin Port number name VIN Input port for the over-voltage detection from connected battery pack or external power supply. Input port for remote control signals RMOT from an optional HM-A microphone via the [MI] jack. SD TIN Pin Port Description number name 0 LONIN Input port for the cloning signal. Description LOKV Input port for the S-meter voltage. Input port for TSS decoded signals. T Outputs T regulator control signal. High : While transmitting. R Outputs R regulator control signal. High : While receiving. PUHV Input port for the reset signal from Q (LOGI unit). HG Outputs control signal for charger circuit (RF unit; Q). High : While battery is charging. AFON Outputs control signal for the AF amplifier requlator circuit. High : Activates the AF amplifier circuit. PON Outputs regulator control signal (LOGI unit; Q and Q). Input port for the PLL lock voltage. Input port for the tranceiver s internal THRM temparature. SATT Input port for the voltage (connected battery voltage). ONT Outputs control signal for the LD contrast. High : The LD contrast is deep. Outputs TSS signals while transtout mitting. TON Outputs control signal for the urope tone and DTMF. Low : Activates the urope tone. High : Activates DTMF. LD 0 Output port for: eep audio signals while receiving. DTMF signals or 0 Hz urope tone signal while transmitting. [UR], [ITA], [UK] Outputs USY LD control singal. Low : The USY LD is ON. LIGHT Outputs LD backlight control signal. High : Lights ON. 0 MI Outputs control signal for the regulator secton of MI amplifier (LOGI unit; I0). Low : Activates the MI amplifier circuit. RM/MM Outputs AF mute and MI mute control signals. High : Mute is ON. POWR Input port for the [POWR] switch. RST PTT Input port for the [PTT] switch. K Outputs clock signal to the PLL I (I0), PLL I (I0), D/A I (I), I/O I (I, I) on the RF unit and PROM I (LOGI unit; I). SIO Data bus line for the PROM (LOGI unit; I). P PPI Input port for the bias control voltage to judge kinds of battery types. High : Supply the bias control voltage. NOIS Input port for the noise signal (pulsetype) from the IF I (RF unit; I 0, pin ). Outputs data signals to the PLL I (RF unit; I0, pin ). PDA/UL Input port for the PLL unlock signal from the PLL I (RF unit; I0, pin ). Outputs data signals to the PLL I (RF unit; I0, pin ). PDA/UL Input port for the PLL unlock signal from the PLL I (RF unit; I0, pin ). DAST Outputs strobe signals to the D/A I (LOGI unit; I, pin). IOST Outputs strobe signals to the I/O I (RF unit; I, pin and I, pin ). PLST Outputs strobe signals to the PLL I (RF unit, I0, pin). PLST Outputs strobe signals to the PLL I (RF unit, I0, pin ).,, LONOUT Output port for the cloning signal. - Input port for the RST signal from I, pin (LOGI unit). KR KR0 Input ports for key matrix. I, I Input ports for Initial matrix. KS KS0 Outputs port for key matrix. DIK, DIUK Input port for the up/down signal from the main dial (LOGI unit; S).
STION ADJUSTMNT PRODURS - PRPARATION RQUIRD TST QUIPMNT QUIPMNT GRAD AND RANG Output voltage urrent capacity :. V D : A or more RF power meter (terminated type) Measuring range Frequency range Impedance R : : : : Frequency counter Frequency range : 0. 00 MHz Frequency accuracy : ± ppm or better Sensitivity : 00 mv or better FM deviation meter Frequency range Measuring range D power supply 0 W 00 MHz 0 Ω Less than. : : 0 00 MHz : 0 to ±0 khz QUIPMNT GRAD AND RANG D voltmeter Input impedance : 0 kω/v D or better Audio generator Frequency range Measuring range : 00 000 Hz : 00 mv Frequency range Output level : 00 MHz : 0. µv mv ( to dm) Oscilloscope Frequency range Measuring range : D 0 MHz : 0.0 0 V A millivoltmeter Measuring range : 0 mv 0 V Attenuator Power attenuation : 0 or 0 d Standard signal generator (SSG) NTRING TH ADJUSTMNT MOD q onnect a kω terminator to the [SP] jack. w Push and hold the [SQL] key, and then turn power ON. Note: The frequency of wide range appears at the display using this operation. ONNTION FM Deviation meter Attenuator 0 d or 0 d to the antenna connector JIG RF power meter 0 W/0 Ω kω Frequency counter Standard signal generator to [SP] jack /" (. mm) -conductor plug AUTION: DO NOT transmit while an SSG is connected to the antenna connector. to [MI] jack Audio generator A millivoltmeter AD-SMA Optional SMA N adaptor Power supply. V / A -
- PLL ADJUSTMNT The following adjustment must be performed at ADJUSTMNT MOD. ADJUSTMNT MASURMNT ADJUSTMNT ONDITION UNIT PLL LOK VOLTAG Displayed frequency :.000 MHz RF UNIT onnect the D. V. V voltmeter or an oscilloscope to MLV. Displayed frequency :.000 MHz onnect the D. V. V voltmeter or an oscilloscope to VLV. Displayed frequency :.000 MHz. V. V Transmitting. V. V onnect the D.0 V. V voltmeter or an oscilloscope to ULV. Transmitting Displayed frequency : 0.000 MHz Transmitting RFRN Displayed frequency : 0.000 MHz FRQUNY Transmitting ADJUST Verify onnect the D 0. V. V voltmeter or an oscilloscope to VLV. Transmitting Displayed frequency : 0.000 MHz DTTR OUTPUT VOLTAG VALU LOATION ADJUSTMNT POINT.0 V. V onnect the D. V. V voltmeter or an oscilloscope to LV. Loosely couple the 0.0000 MHz Top Pannel frequency counter to the antenna connector. Displayed frequency : LOGI onnect a digital-.0 V.000 MHz [USA-] only voltmeter to the.000 MHz [ohter] check point Q. onnect an SSG to the antenna connector and set as: Level : mv* ( dm) Modulation : OFF *This output level of the standard signal generator (SSG) is indicated as SSG s open circuit. - Top panel Push and hold the [SQL] key, then turn the [DIAL] LOGI L0
RF UNIT OTTOM VIW LV PLL lock voltage check point (for 00 MHz) ULV PLL lock voltage check point (for 0 MHz) VLV PLL lock voltage check point (for 0 MHz R, WFM and MHz) RF UNIT TOP VIW MLV PLL lock voltage check point (for 0 MHz T) LOGI UNIT TOP VIW L0 Detector Output voltage adjustment Q Detector Output voltage check point -
- RIVR ADJUSTMNT The following adjustment must be performed at ADJUSTMNT MOD. ADJUSTMNT ADJUSTMNT ONDITION MASURMNT UNIT VALU LOATION ADJUSTMNT POINT UNIT ADJUST Top panel [DIAL] LOGI onnect a multime- Maximum voltage ter to check point SD. Top panel [DIAL] LOGI onnect a multime- Maximum voltage ter to check point SD. Top panel [DIAL] LOGI onnect a multime- Maximum voltage ter to check point SD. Top panel [DIAL] 0 MHz Displayed frequency : LOGI onnect a multime- Maximum voltage SNSITIVITY 0.000 MHz ter to check point onnect an SSG to the antenna SD. connector and a SINAD meter with an Ω load to the [SP] jack. Set an SSG as : Level : µv* ( 0 dm) Deviation : ±. khz Modulation : khz Displayed frequency :.000 MHz [UR], [UK], [ITA] WFM Displayed frequency : SNSITIVITY.000 MHz [SA], [USA-].000 MHz [UR], [UK], [ITA], [AUS] Set an SSG as : Level :. µv* ( dm) Deviation : ±. khz Modulation : khz Displayed frequency : 0.000 MHz AM Displayed frequency : SNSITIVITY 0.000 MHz Set an SSG as : Frequency : 0.000 MHz Level :.0 µv* (AM) ( 0 dm) Modulation : khz Mod. depth : 0 % Displayed frequency :.0 MHz Set an SSG as : Frequency :.0 MHz VHF Displayed frequency : SNSITIVITY.000 MHz Set an SSG as : Level :. µv* ( dm) Deviation : ±. khz Modulation : khz Displayed frequency : 0.000 MHz *This output level of the standard signal generator (SSG) is indicated as SSG s open circuit. -
LOGI UNIT TOP VIW SD 0 MHz, WFM AND, AIR AND and MHz Sensitivity check point -
RIVR ADJUSTMNT (ontinued) The following adjustment must be performed on the normal mode after SNSITIVITY ADJUSTMNT in STION -. ADJUSTMNT ADJUSTMNT ONDITION MASURMNT UNIT Displayed frequency : S-MTR.000 MHz [UR], [UK], [ITA] (0 MHz band).000 MHz [AUS], [SA], [USA-] onnect the SSG to the antenna connector and set as: Level : µv* ( 0 dm) Modulation : khz Deviation : ±. khz onnect a terminator to the [SP] jack. Top panel Increase an SSG output level. Front panel Displayed frequency :.000 MHz [SA], [USA-].000 MHz [UR], [UK],[ITA], [AUS] onnect the SSG to the antenna connector and set as: Level : µv* ( 0 dm) Modulation : khz Deviation : ±. khz onnect a terminator to the [SP] jack. Top panel Increase an SSG output level. Front panel ( MHz band) Displayed frequency :.000 MHz [UR], [UK].000 MHz [ITA], [AUS], [SA], [USA-] onnect the SSG to the antenna connector and set as: Level : 0. µv* ( dm) Modulation : khz Deviation : ±. khz onnect a terminator to the [SP] jack. ADJUSTMNT Push and hold the [SQL] key Set an SSG output level for the S-meter to S. (WFM band) VALU LOATION S-meter 0. µv. µv (-dm -0 dm) Verify Full scale Verify Push and hold the [SQL] key S-meter Full scale Verify Push and hold the [SQL] key Top panel Set an SSG output level for the S-meter to S. SSG Output level 0. µv 0. µv (-dm -0 dm) Verify Increase an SSG output level. Front panel S-meter Full scale Verify *This output level of the standard signal generator (SSG) is indicated as SSG s open circuit. -
RIVR ADJUSTMNT (ontinued) The SQULH LVL adjustment must be performed on the normal mode after S-MTR ADJUSTMNT. ADJUSTMNT ADJUSTMNT ONDITION MASURMNT UNIT S-MTR (0 MHz band) Displayed frequency :.000 MHz [USA-].000 MHz [other] onnect the SSG to the antenna connector and set as: Level : 0. µv* ( dm) Modulation : khz Deviation : ±. khz onnect a terminator to the [SP] jack. UNIT ADJUST Push and hold the [SQL] key Top panel 0 Set an SSG output level for the S-meter to S. SSG Output level 0. µv. µv (-dm -0 dm) Verify Increase an SSG output level. Front panel S-meter Full scale Verify (00 MHz band) Displayed frequency : 0.000 MHz onnect the SSG to the antenna connector and set as: Level : µv* ( 0 dm) Modulation : khz Deviation : ±. khz onnect a terminator to the [SP] jack. SQULH LVL VALU LOATION ADJUSTMNT POINT Push and hold the [SQL] key Top panel Set an SSG output level for the S-meter to S. SSG Output level 0. µv. µv (-0dm - dm) Verify Increase an SSG output level. Front panel S-meter Full scale Verify Displayed frequency : Speaker.000 MHz [USA-].000 MHz [other] onnect the SSG to the antenna connector and set as: Level : 0. µv* ( dm) Modulation : khz Deviation : ±. khz Pre-set the R to maxmum clock-wise. *This output level of the standard signal generator (SSG) is indicated as SSG s open circuit. LOGI UNIT TOP VIW R Squelch level adjustment - LOGI At the point where the AF signal just disappears R
- TRANSMITTR ADJUSTMNT The following adjustment must be performed at ADJUSTMNT MOD. ADJUSTMNT ADJUSTMNT ONDITION MASURMNT UNIT OUTPUT POWR (0 MHz) Displayed frequency :.000 MHz [UR], [UK], [ITA].000 MHz [AUS], [SA], [USA-] Output power : High transmitting Output power Transmitting ( MHz) (0 MHz) (00 MHz) Output power Transmitting Top panel onnect an RF more than W power meter to the antenna connector. [DIAL] [DIAL] 0. W Top panel onnect an RF more than W power meter to the antenna connector. [DIAL] 0. W : Low Displayed frequency : 0.000 MHz Output power : High Transmitting ADJUSTMNT 0. W : Low Displayed frequency :.000 MHz [USA-].000 MHz [Other] Output power : High Transmitting Output power Transmitting onnect an RF more than W power meter to the antenna connector. : Low Displayed frequency :.000 MHz [UR], [UK].000 MHz [ITA], [AUS], [SA], [USA-] Output power : High Transmitting Output power Transmitting Top panel VALU LOATION Top panel onnect an RF more than W power meter to the antenna connector. [DIAL] 0. W : Low LOGI UNIT TOP VIW R DTMF or TON ALL deviation adjustment R 0 MHz FM deviation adjustment R 0 MHz AND FM deviation adjustment R 00 MHz FM deviation adjustment R MHz AND FM deviation adjustment -
TRANSMITTR ADJUSTMNT (ontinued) The following adjustment must be performed after RFRN FRQUNY ADJUSTMNT in STION -. ADJUSTMNT ADJUSTMNT ONDITION MASURMNT UNIT VALU LOATION ADJUSTMNT POINT UNIT ADJUST LOGI R FM DVIATION (0 MHz) Displayed frequency :.000 MHz [UR], [UK], [ITA].000 MHz [AUS], [SA], [USA-] onnect the audio generator to the [MI] connector and set as: mv/.0 khz. Set the FM deviation meter as : HPF : OFF : 0 khz De-emphasis : OFF Detector : (P P)/ Output power : High Transmitting ( MHz) Displayed frequency :.000 MHz [UR], [UK].000 MHz [ITA], [AUS], [SA], [USA-] Transmitting R (0 MHz) Displayed frequency :.000 MHz [USA-].000 MHz [Other] Transmitting R (00 MHz) Displayed frequency : 0.000 MHz Transmitting R DTMF DVIATION (AUS, SA, USA- only) Displayed frequency :.000 MHz [USA-] only.000 MHz [AUS], [SA] only Push [D] key while transmitting. Transmitting Top panel onnect an FM. khz deviation meter to the antenna connector through an attenuator. LOGI R TON ALL DVIATION (UR, UK, ITA only) Displayed frequency :.000 MHz Push [center of the multi-function] key while transmitting. Transmitting Top panel onnect an FM. khz deviation meter to the antenna connector through an attenuator. LOGI R TSS DVIATION (0 MHz) Displayed frequency :.000 MHz [UR], [UK], [ITA].000 MHz [AUS], [SA], [USA-] Tone frequency :. Hz Set an FM deviation meter as : : khz Apply no audio signal to the [MI] jack. Transmitting Top panel onnect an FM 0..0 khz deviation meter to the antenna connector through an attenuator. ( MHz) Displayed frequency :.000 MHz [UR], [UK].000 MHz [ITA], [AUS], [SA], [USA-] Transmitting (0 MHz) Displayed frequency :.000 MHz [USA-].000 MHz [other] Transmitting (00 MHz) Displayed frequency : 0.000 MHz Transmitting Top panel onnect an FM. khz deviation meter to the antenna connector through an attenuator. - Verify
STION PARTS LIST [LOGI UNIT] RF I [LOGI UNIT] ORDR RF DSRIPTION I I I I I I I0 I0 I0 I I0 I0 I 0000 00000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 00000 S.I S.I S.I S.I S.I S.I S.I S.I S.I S.I S.I S.I S.I S.I S.I MGP [USA-] only MML-0GP [other] 0SI-.T A00PR TWFU (TL) MGP 0D S-HG-K-T S-0ALMP-DAR-T TAF (TP) MFP 00 TAS0F (TR) NJM0V-T A0F-T TAFN (D,L) TSF (TR) Q Q Q Q Q Q Q Q Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q Q Q0 Q0 Q0 Q Q Q Q 0000 0000 0000 00000 0000 0000 00000 00000 00000 0000 0000 00000 0000 000000 000000 000000 0000 0000 000000 0000 000000 0000 0000 0000 0000 00000 0000 00000 S.FT S.FT S.FT S.FT S.FT UN (T) P (T) P0-(T) A S T00 R UN0 (T) P0-(T) A S T00 R SD-S (T) S0-S-TL P0-(T) A UN (T) S-R (T) UN (T) SJ-Q (T) SJ-Q (T) SJ-Q (T) UN (T) P0-(T) A SJ-Q (T) UN (T) SJ-Q (T) UN (T) P (T) UN (T) P0-(T) A SD-S (T) UN (T) SD-S (T) D D D D D 00000 0000 0000 00000 00000 00000 00000 D D D D D D D D D D D0 D0 D0 00000 0000 00000 00000 0000 0000 0000 0000 0000 0000 000000 00000 00000 S.ZNR S.ZNR MA (T) MAS-(T) MAS-(T) MAK (T) [UK], [AUS] MAHK (T) [UR], [USA-] MAWK (T) [SA] MAHK (T) [ITA], [AUS], [SA], [USA-] MAWK (T) except [ITA] MAS-(T) except [ITA] MAS (T) MAS (T) MAS-(T) except [ITA] MAS-(T) MAS-(T) MAS-(T) MA00-M (T) MAS-(T) RD.M-T SS (TL) SS (TL) FI0 00000 PF0RDR 00000 S.TAL R- (.0 MHz) ORDR DSRIPTION L L L L0 00000 00000 00000 00000 A-KN-0AQ=P MLF0A RK-T LQH N K 0 LS- (AN-0GW=P) R R R R R R R0 R R R R R R R R R R R R R R R R R0 R R R R R R R R R R R R R R R R R R R R R R R R R R R R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R R R R R R R R R 00000 000000 00000 00000 000000 00000 00000 00000 00000 00000 000000 000000 000000 000000 00000 00000 00000 00000 00000 000000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 000000 000000 00000 00000 00000 00000 00000 000000 00000 00000 000000 000000 000000 00000 00000 00000 00000 000000 00000 000000 00000 00000 000000 000000 000000 000000 00000 000000 00000 00000 00000 00000 00000 00000 000000 00000 00000 000000 000000 S.THRMISTOR NTF0 AH K-T 0 (00 kω) (0 Ω) (0 Ω) 0 (0 kω) (0 kω) ( kω) RR00R--D ( kω) RR00R--D ( kω) RR00R--D ( kω) 0 (0 kω) 0 (00 kω) (. kω) (. kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 ( kω) (. kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 ( kω) 0 (00 kω) 0 (00 kω) (0 Ω) 0 ( MΩ) (0 kω) (0 kω) (0 kω) (. kω) ( kω) RR00R--D ( kω) 0 (0 kω) (. kω) 0 (0 kω) 0 ( MΩ) RR00R-0-D (00 kω) 0 ( kω) ( kω) 0 (0 kω) (0 kω) 0 (0 kω) 00 (0 Ω) (0 Ω) MR0ZHJ Ω (0) MR0ZHJ Ω (0) MR0ZHJ Ω (0) (. kω) 0 ( MΩ) 0 (0 kω) 0 ( kω) RR00R--D ( kω) RR00P-0-D (0 kω) ( kω) RR00R--D ( kω) RR00R-0-D (00 kω) (. kω) 0 ( MΩ) (0 kω) ( kω) ( kω) S.=Surface mount -
[LOGI UNIT] RF R R R R R R0 R R R R R R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R R R R R R R R R R0 R R R R R R R R R R0 R R R R R R R R R R0 R R R R R R R0 R R R R R R R R R R R0 R R R R R R R R R R R R R [LOGI UNIT] ORDR 000000 00000 000000 00000 00000 000000 000000 00000 00000 00000 00000 00000 000000 000000 00000 00000 000000 00000 00000 000000 000000 00000 00000 000000 00000 00000 0000000 00000 00000 00000 000000 000000 00000 00000 000000 00000 00000 00000 00000 00000 00000 00000 00000 000000 00000 00000 000000 00000 00000 00000 000000 000000 000000 000000 000000 00000 00000 000000 000000 000000 000000 000000 00000 000000 000000 00000 00000 000000 00000 000000 000000 0000 00000 00000 00000 00000 000000 00000 0000000 00000 00000 00000 RF DSRIPTION S.TRIMMR S.TRIMMR S.TRIMMR S.TRIMMR S.TRIMMR S.TRIMMR S.THRMISTOR ( kω) (0 kω) 0 (00 kω) (0 kω) (0 kω) 0 (00 kω) ( kω) (0 kω) ( kω) ( kω) 0 (00 Ω) ( kω) 0 (0 kω) ( kω) ( kω) 0 (00 Ω) 0 (00 kω) (. MΩ) (0 kω) (. kω) (. kω) 00 (0 Ω) (0 kω) 0 (00 kω) 0 (00 Ω) ( kω) (0 Ω) (0 kω) 0 ( kω) (. kω) ( kω) (. kω) VM-S0 (0) ( kω) ( kω) VM-S0 (0) VM-S0 (0) VM-S0 (0) (0 kω) (0 kω) (0 kω) (0 kω) ( kω) 0 (0 kω) 0 ( kω) 0 ( kω) 0 (0 kω) (0 kω) VM-S0 (0) (0 kω) 0 (0 kω) 0 (0 kω) 0 (0 kω) ( kω) (. kω) 0 ( MΩ) (0 kω) 0 (0 kω) ( kω) ( kω) (. kω) ( kω) 0 ( kω) ( kω) ( kω) ( kω) ( kω) (. kω) (0 kω) (0 kω) (. kω) VM-S0 (0) ( kω) ( kω) ( kω) TPSRK0HQ 0 (0 kω) (0 kω) (0 Ω) ( kω) 0 ( kω) 0 (00 Ω) ORDR DSRIPTION R R R R0 R0 00000 00000 00000 00000 000000 ( kω) ( kω) (0 kω) 0 ( MΩ) MR0ZHJ 0 Ω () 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000 0000 0000 0000 00000 00000 00000 00000 0000 0000 0000 00000 0000 0000 00000 00000 00000 00000 0000 0000 0000 0000 0000 0000 0000 0000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 000000 00000 0000 S.LTROLYTI S.LTROLYTI S.LTROLYTI TMSVA A M-L UH0JQ UH0JQ TMSVA A M-L 0 J 0KT-N 00 J 0K-T-A 0 J 0KT-N 0 J 0KT-N TMSVA V M-L TMSVA M-L TMSV 0J M-R 0 J 0KT-N TMSV 0J M-L TMSV 0J M-R 00 J 0K-T-A 0 J K-T-A 0 J K-T-A TMSVA A M-L UH0JQ VA0SP V0JA0SP TMSVA A M-L TMSVA A 0M-L V0JAWP ST0JYR TMSVA M-L 0 J 0KT-N 0 J 0KT-N 0 J 0KT-N 0 J 0KT-N 0 J H K-T-A 0 J 0KT-N 0 J K-T-A 0 J 0KT-N 0 J 0KT-N 0 J 0KT-N 0 J 0KT-N UH0JQ 0 J 0KT-N 00 J 0K-T-A 00 J 0K-T-A 0 J H K-T-A 0 J H K-T-A 0 J H K-T-A 0 J H K-T-A 0 J H K-T-A 0 J H K-T-A TMSV 0J M-R S.=Surface mount -
[LOGI UNIT] RF [LOGI UNIT] ORDR RF DSRIPTION 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00000 0000000 0000 0000 0000 00000 0000 00000 00000 00000 00000 0000 00000 00000 00000 0000 0000 00000 00000 00000 00000 00000 00000 00000 00000 00000 0000 00000 00000 00000 00000 0000000 0000 00000 0000 UHJQ 0 J K-T-A UKQ TMSVA A M-L UKQ 0 J H K-T-A TMSVA A M-L 0 J K-T-A 00 J 0K-T-A 0 J K-T-A 0 J 0KT-N UHJQ 00 J 0K-T-A 0 J 0KT-N 0 J 0KT-N ST0JYR UH0JQ 0 J 0KT-N 0 J 0KT-N 0 J 0KT-N 0 J 0KT-N 0 J 0KT-N 0 J K-T-A 0 J 0KT-N 00 J 0K-T-A 0 J 0KT-N UH0JQ 00 J 0K-T-A 0 J 0KT-N 0 J K-T-A 00 J 0K-T-A 0 J K-T-A TMSVA A M-L 0 J 0KT-N UH0JQ J J J 000 S.ONNTOR AKS0P 00000 S.ONNTOR HSJ0-000 0000 ONNTOR HSJ-0000 DS DS DS 00000 S.LD 000000 S.LD 000000 LD L-00YG--TS LTPA LM- M 00000 MIROPHON M-0 ORDR DSRIPTION S S0 S0 0000 S.ITH 000000 S.ITH 000000 S.ITH VQ-WRR00 JPM0-0R JPM0-0R W 0000 WIR //00// P P 000 P D 000 LD ONTAT SRN--SP-N-W [RF UNIT] RF ORDR DSRIPTION I I I I I0 I0 I0 I0 I0 0000 0000 0000 0000 0000 00000 0000 0000 00000 S.I S.I S.I S.I S.I S.I S.I S.I S.I U0FV- U0FV- S-HG-K-T µpt- µpt- µpt- µpd0gs- (DS) TFN (L) NJM0AV-T Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q0 Q0 Q0 Q0 Q0 Q Q Q Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q Q0 Q0 Q0 Q0 Q Q Q Q Q Q Q Q0 Q Q Q Q Q 00000 0000 00000 00000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 00000 000000 0000 00000 0000 0000 00000 0000 0000 0000 0000 0000 0000 0000 00000 00000 00000 00000 000000 0000 00000 000000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 S.FT S.TRANSISTR S.FT S.FT S.FT S.FT S.FT S.FT SD-S (T) P0-(T) A S T00 R S T00 R UN0 (T) HAT0R-L P0 (T) S (TL) UN (T) S-T S-T S-T R S0--TL S R-T S0-O (TR) S R-T MRRT UN (T) SD-S (T) SK (TR) UN (T) SK (TR) P (T) S-O (TRIOM) S-O (TR) S-T R S-T UN (T) S-T P (T) UN (T) P (T) S-O (TR) S-O (TR) SK0-Y (TR) SK0-Y (TR) S-L (TR) S0-O (TR) SK0-Y (TR) S-L (TR) S0-O (TR) S (M) -T R UN (T) P (T) P (T) UN (T) S0--TL S0-O (TR) S0-O (TR) S-T UN (T) S.=Surface mount -
[RF UNIT] RF [RF UNIT] ORDR RF DSRIPTION ORDR DSRIPTION Q Q Q Q Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q Q Q Q Q Q Q Q Q Q Q Q Q Q 0000 0000 0000 0000 0000 00000 00000 0000 00000 0000 00000 0000 00000 0000 00000 0000 0000 00000 00000 00000 0000 0000 0000 0000 0000 00000 0000 00000 S.FT S.FT UND (T) UN (T) UND (T) UN (T) UN (T) SD-S (T) S T00 R UN (T) SA-GR (TR) UN (T) SA-GR (TR) UN (T) SA-GR (TR) UN (T) SA-GR (TR) UN (T) P0-(T) MRF T SK0 (TL) SD-S (T) UN (T) UN (T) UN (T) UN (T) UN (T) SA-GR (TR) P (T) SD-S (T) D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D D D D 0000 0000 0000 0000 0000 0000 00000 00000 00000 0000 00000 0000 0000 0000 00000 00000 0000 0000 0000 0000 S.ZNR MAS0-(T) MAS0-(T) MAS0-(T) MAS0-(T) MAS0-(T) MAS0-(T) MAS (T) MA (T) SV (TPH) MAS0-(T) SV (TPH) SV0 (TPL) SV0 (TPL) MAS0-(T) SV (TPH) SV (TPH) SV0 (TPL) SV0 (TPL) SV0 (TPL) MA0-M (T) FI FI FI0 FI0 FI0 00000 00000 000000 0000000 00000 000000 S.FILTR S.FILTR S.SAW S.SAW S.FILTR LFL0-000 LFL0-000 FHMWNP [USA-] only FHMWNP [other] FL- (.0 MHz) SFV.MA D D D D D0 D D D D D D D0 D0 D0 D0 D0 D0 D D D D D D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D D D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D0 D D0 D0 00000 0000 00000 00000 0000 00000 0000 0000 0000 0000 0000 0000 0000 0000 00000 00000 0000 0000 0000 0000 0000 0000 0000 00000 00000 0000 0000 0000 0000 00000 00000 00000 0000 00000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 00000 0000 00000 00000 00000 00000 00000 0000 S.VARIAP S.VARIAP S.VARIAP S.VARIAP S.VARIAP S.VARIAP S.VARIAP S.VARIAP R00L-0 T- MAS-(T) MA (T) S0-0-T MAS-(T) MAWK (T) MAS0-(T) SV0 (TPL) MAS0-(T) MAS0-(T) SV0 (TPL) SV0 (TPL) SV0 (TPL) MAS0-(T) HVU0TRF HVU0TRF SV0 (TPL) SV0 (TPL) SV0 (TPL) SV0 (TPL) MAS-(T) MAS-(T) SV0 (TPL) MAS000L MAS000L SV0 (TPL) MAS0-(T) MAS0-(T) SV0 (TPL) MASV000L MASV000L MASV000L SV0 (TPL) SV (TPH) MAS0-(T) MAS0-(T) MAS0-(T) SV0 (TPL) MAS-(T) MAS0-(T) SV0 (TPL) SV0 (TPL) SV0 (TPL) SV0 (TPL) MAWK (T) MAS0-(T) MAS (T) SS (TL) SS (TL) SS (TL) MAWK (T) MAS0-(T) 00000 S.TAL R- (.00 MHz) L L L L L L L L L L0 L L L L L L L L L L L L L L L L L L L L L L L0 L0 L0 L0 L0 L L L L L L L L L L L L 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 000000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 000000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 000000 00000 00000 000000 00000 00000 0.0-0.-TR 0.N LQNA ND0 LQNA ND0 0.0-0.-TL N 0.-0.-TR N 0.-0.-TR N 0.0-.0-TR N 0.-.-TL.N 0.0-.-TR N 0.-.-TL N 0.-.-TL N 0.-.-TL N LQNA RJ0 0.-.-TL 0N 0.-.-0TL 0N 0.-.-0TL 0N 0.-.-TL 0.-.-TL 0.-0.-TR.N 0.0-0.-TR.N 0.-0.-TR.N 0.-0.-TR.N 0.-0.-TL.N 0.-0.-TR.N 0.0-0.-TR.N LJR NZ-F LJR NZ-F HF0A P-T LU LU LJR NZ-F NL T-J LQNA RJ0 LQNA RJ0 LJND R0J U LJND RJ 0.U LJND RJ 0.U LJR NZ-F LJR NZ-F LJR NZ-F LJR NZ-F LJR NZ-F MLF0D RK-T LQNA RJ0 LJR NG-F LJR NG-F LQNA NJ0 LJR NZ-F LJR NG-F S.=Surface mount -