Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 1
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- Λάμεχ Βουγιουκλάκης
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1 Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 1
2 ΧΡΟΝΟΣ ΥΠΟΛΟΓΙΣΜΟΥ Υπάρχει πάντοτε µια καθυστέρηση µεταξύ της στιγµής δειγµατοληψίας και της στιγµής που η υπολογισθείσα τιµή ελέγχου εφαρµόζεται στο σύστηµα. Η µεταβλητότητα στη καθυστέρηση υπολογισµού ονοµάζεται control jitter. H καθυστέρηση υπολογισµού πρέπει να είναι πάντοτε µικρότερη της περιόδου δειγµατοληψίας. Τα ψηφιακά συστήµατα ελέγχου είναι συστήµατα πραγµατικού-χρόνου (realtime systems). Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 2
3 ΕΠΙΛΟΓΗ ΣΥΧΝΟΤΗΤΑΣ ΔΕΙΓΜΑΤΟΛΗΨΙΑΣ: Αναλογικό Φίλτρο Εισόδου (antialiasing) We choose the sampling frequency in the range between 5 and 10 times the max frequency of the signal to be sampled. The continuous signal to be sampled must not include significant frequency components greater than the Nyquist frequency Fs/2. It is recommended to low-pass filter the continuous signal before sampling, especially in the presence of high-frequency noise. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 3
4 SAMPLING RATE & ANALOG ANTIALIASING FILTER The antialiasing filter is typically a simple first-order RC filter, but some applications require a higher-order filter such as a Butterworth or a Bessel filter. The cut-off frequency of the low-pass filter must be higher than the bandwidth of the closed-loop system so as not to degrade the transient response. The low-pass filter can be chosen as 10 times the bandwidth of the closed-loop system to minimize its effect on the control system dynamics, and then the sampling frequency can be chosen 10 times higher than the filter cut-off frequency so that there is a sufficient attenuation above the Nyquist frequency. Thus, the sampling frequency is 100 times the bandwidth of the closed-loop system. For a low-pass filter with a high roll-off (i.e., a high-order filter), the sampling frequency is chosen as five times the closed-loop bandwidth. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 4
5 EXAMPLE: Consider a 1 Hz sinusoidal signal of unity amplitude with an additive 50 Hz sinusoidal noise. Verify the effectiveness of an antialiasing filter for the signal sampled at a frequency of 30 Hz. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 5
6 Phase Delay introduced by the ZOH The frequency response of the zero-order hold (ZOH) can be approximated as: This introduces an additional delay in the control loop approximately equal to half of the sampling period. The additional delay reduces the stability margins of the control system, and the reduction is worse as the sampling period is increased. This imposes an upper bound on the value of the sampling period T. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 6
7 ΣΥΣΤΗΜΑΤΑ ΠΟΛΛΩΝ ΕΙΣΟΔΩΝ-ΕΞΟΔΩΝ (ΜΙΜΟ) Πολυπλεξία για τη µείωση του κόστους Προσοχή στον χρονισµό Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 7
8 ΕΠΙΛΟΓΗ ADC & DAC Χρόνοι µετατροπής αµελητέοι σε σχέση µε την περίοδο δειγµατοληψίας. Το µήκος λέξης καθορίζει το σφάλµα κβάντισης (quantization resolution). 8-bit συνεπάγεται σφάλµα 0.4% = 1/ bit συνεπάγεται σφάλµα 0.1% 16-bit συνεπάγεται σφάλµα % H ακρίβεια (resolution) του DAC είναι της ακρίβειας του ADC. H ακρίβεια του σήµατος αναφοράς πρέπει να είναι ίση µε αυτή του ADC και του DAC. Εάν η ακρίβεια του σήµατος αναφοράς είναι υψηλότερη αυτής του ADC, το σφάλµα ελέγχου δεν θα γίνεται ποτέ µηδέν και θα εµφανίζονται limit cycles. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 8
9 QUANTIZATION ERRORS The noise due to quantization can be modeled as a uniformly distributed random process. q is the quantization level, i.e. the range of the ADC divided by 2^n, and n is the number of bits. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 9
10 QUANTIZATION: Roundoff and Truncation without Saturation Arithmetic Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 10
11 QUANTIZATION: Roundoff and Truncation with Saturation Arithmetic Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 11
12 OVERFLOW Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 12
13 Quantization Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 13
14 Quantization & Coding Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 14
15 ADC Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 15
16 QUANTIZATION ERRORS It is proved that: the mean value is independent of the sampling period, is linear in the controller gain for small gains, and is almost independent of the gain for large gains. In any case, the worst value achieved is half the quantization interval. the variance is linear in the sampling period and linear in the controller gain for large gains. Thus, the effect of the quantization noise can be reduced by decreasing the sampling period, once the ADC has been selected. We conclude that decreasing the sampling period has beneficial effects with respect to both aliasing and quantization noise. However, decreasing the sampling period requires more expensive hardware and may aggravate problems because of the finite-word representation of parameters. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 16
17 QUANTIZATION ERRORS The nonlinear quantization operation will sometimes generate (nontrivial) periodic solutions known as overflow oscillations and limit cycles. Overflow oscillations occur when the saturation arithmetic characteristic of the quantizer in invoked; otherwise any nontrivial periodic solution is referred to as limit cycle. Overflow oscillations influence the MSB, whereas limit cycles generally affect only LSB of the states. Thus if overflow occurs, it can cause much more severe signal distortion. Floating point arithmetic usually has sufficient dynamic range to prevent the occurrence of overflow oscillations. In fact, the prevention of overflow is the main reason for using floating point arithmetic and not for improving small scale accuracy! However, limit cycles can also exist in floating point implementations and their amplitude can be large. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 17
18 FINITE WORDLENGTH EFFECTS Rounding or Roundoff can cause the filter output to oscillate forever, even when the filter input sequence is all zeros. This is the so called limit cycles phenomenon. Example: Let's assume this filter rounds the adder's output to the nearest integer value. If the situation ever arises where y( 2)=0, y( 1)=8, and x (0) and all successive x(n) inputs are zero, the filter output goes into endless oscillation. If this filter were to be used in an audio application, when the input signal went silent the listener could end up hearing an audio tone instead of silence. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 18
19 FINITE WORDLENGTH EFFECTS Consider infinite precision computations for 19 Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 19
20 FINITE WORDLENGTH EFFECTS Now the same operation with integer precision 20 Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 20
21 FINITE WORDLENGTH EFFECTS Notice that with infinite precision the response converges to the origin. With finite precision the response does not converge to the origin but assumes cyclically a set of values the Limit Cycle. 21 Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 21
22 FINITE WORDLENGTH ERRORS ADC and Multiplication Errors Parallel realization has a lower multiplication noise amplification than direct realization. Coefficient Errors Parallel and cascade realizations are less sensitive than direct realization. As a general rule, it is best NOT to use the direct realization for finite wordlength. Other Issues Wordlength and sampling rate are interdependent and the selection of a max sampling interval and a min wordlegth is an iterative process. Cost is directly related to the wordlength and sampling rate. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 22
23 FINITE WORDLENGTH EFFECTS Difference Equations Consider the ideal 1 st order difference equation: y(n) = a x(n) + b y(n-1) In general, coefficients a, b cannot be represented exactly with finite precision arithmetic. Even if a, b could be exactly represented, the state y(n-1) can NEVER be exactly represented for all discrete time instants n (unless b=0). To demonstrate this, suppose that a, b, x(n) and the initial state y(0) are all 8 bit fractions. Then, y(1) will in general have a 16 bit fractional part, y(2) will have a 24 bit fractional part, etc. Hence, given any available wordlength, there will be a value of n for which y(n) cannot be exactly represented. Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 23
24 Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 24
25 Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 25
26 We conclude that decreasing the sampling period has beneficial effects with respect to both aliasing and quantization noise. However, decreasing the sampling period requires more expensive hardware and may aggravate problems because of the finite-word representation of parameters. EXAMPLE: Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 26
27 ΑΠΕΥΘΕΙΑΣ ΠΑΡΑΛΛΗΛΗ ΣΕ ΣΕΙΡΑ πραγµατοποίηση συστήµατος ΠΑΡΑΔΕΙΓΜΑ Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 27
28 ΦΙΛΤΡΑ BUTTERWORTH: Τα βαθυπερατά φίλτρα έχουν ΜΟΝΟ πόλους Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 28
29 ΠΑΡΑΡΤΗΜΑ 1: ΑΡΙΘΜΟΙ ΣΤΑΘΕΡΗΣ ΥΠΟΔΙΑΣΤΟΛΗΣ (Fixed-point representation) Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 29
30 ΠΑΡΑΡΤΗΜΑ 1: ΑΡΙΘΜΟΙ ΚΙΝΗΤΗΣ ΥΠΟΔΙΑΣΤΟΛΗΣ (Floating-point representation) Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 30
31 Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 31
32 Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 32
33 Α. ΣΚΟΔΡΑΣ ΨΗΦΙΑΚΟΣ ΕΛΕΓΧΟΣ ΔΙΑΛΕΞΗ 9 ΔΙΑΦΑΝΕΙΑ 33
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